git.efficios.com Git - deliverable/binutils-gdb.git/commit

author	H.J. Lu <hjl.tools@gmail.com>
	Sun, 17 Mar 2019 19:50:45 +0000 (03:50 +0800)
committer	H.J. Lu <hjl.tools@gmail.com>
	Sun, 17 Mar 2019 19:51:50 +0000 (03:51 +0800)
commit	99112332cda2e63d33959ac8ea2ed13524b09bd6
tree	5dc762d698d2a2b62d4552a505516c7b91b78b76	tree \| snapshot
parent	d4cbef22ba406707a4fcb30a7a57308447626f14	commit \| diff

x86: Encode 256-bit/512-bit VEX/EVEX insns with 128-bit VEX

Since all AVX512 processors support AVX, we can encode 256-bit/512-bit
VEX/EVEX vector register clearing instructions with 128-bit VEX vector
register clearing instructions at -O1.

* config/tc-i386.c (optimize_encoding): Encode 256-bit/512-bit
VEX/EVEX vector register clearing instructions with 128-bit VEX
vector register clearing instructions at -O1.
* doc/c-i386.texi: Update -O1 and -O2 documentation.
* testsuite/gas/i386/i386.exp: Run optimize-1a and
x86-64-optimize-2a.
* testsuite/gas/i386/optimize-1a.d: New file.
* testsuite/gas/i386/x86-64-optimize-2a.d: Likewise.

gas/ChangeLog		diff \| blob \| blame \| history
gas/config/tc-i386.c		diff \| blob \| blame \| history
gas/doc/c-i386.texi		diff \| blob \| blame \| history
gas/testsuite/gas/i386/i386.exp		diff \| blob \| blame \| history
gas/testsuite/gas/i386/optimize-1a.d	[new file with mode: 0644]	blob
gas/testsuite/gas/i386/x86-64-optimize-2a.d	[new file with mode: 0644]	blob