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(parent: 931d03b) | patch
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
authorJan Beulich <jbeulich@novell.com>
Tue, 6 Nov 2018 10:43:55 +0000 (11:43 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 6 Nov 2018 10:43:55 +0000 (11:43 +0100)
commitb50c9f31661be05bcd73fb1158e02f606e696948
tree80c3662241c3d1bc92b3e45c5e86dbf081bb6e2dtree | snapshot
parent931d03b75aa934abc10a70f1aa3ca1192f32ed3dcommit | diff
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*

PEXTR{B,W} and PINSR{B,W}, just like for AVX512BW, are WIG, no matter
that the SDM uses a nonstandard description of that fact.

PEXTRD, even with EVEX.W set, ignores that bit outside of 64-bit mode,
just like its AVX counterpart.
13 files changed:
gas/ChangeLog diff | blob | blame | history
gas/testsuite/gas/i386/avx-wig.d diff | blob | blame | history
gas/testsuite/gas/i386/avx-wig.s diff | blob | blame | history
gas/testsuite/gas/i386/evex-wig.s diff | blob | blame | history
gas/testsuite/gas/i386/evex-wig1-intel.d diff | blob | blame | history
gas/testsuite/gas/i386/evex-wig1.d diff | blob | blame | history
gas/testsuite/gas/i386/x86-64-avx-wig.d diff | blob | blame | history
gas/testsuite/gas/i386/x86-64-avx-wig.s diff | blob | blame | history
opcodes/ChangeLog diff | blob | blame | history
opcodes/i386-dis-evex.h diff | blob | blame | history
opcodes/i386-dis.c diff | blob | blame | history
opcodes/i386-opc.tbl diff | blob | blame | history
opcodes/i386-tbl.h diff | blob | blame | history
GDB Binutils - Deliverables
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