AArch64: Add SVE DWARF registers
authorTamar Christina <tamar.christina@arm.com>
Tue, 21 May 2019 10:03:45 +0000 (11:03 +0100)
committerTamar Christina <tamar.christina@arm.com>
Tue, 21 May 2019 10:05:22 +0000 (11:05 +0100)
commitfab7c86ea474291776621eba042132f47af124e1
treec9f78606a3d9f134d95c863e5dd4ba09b9079b5d
parentce3ebcaae382a3f95530d633e6875f97e53ef273
AArch64: Add SVE DWARF registers

The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).

This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].

[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support

binutils/ChangeLog:

* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.
binutils/ChangeLog
binutils/dwarf.c
binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d [new file with mode: 0644]
binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s [new file with mode: 0644]
This page took 0.023831 seconds and 4 git commands to generate.