disasssembly using @option{-M notes}.
For the x86, some of the options duplicate functions of the @option{-m}
-switch, but allow finer grained control. Multiple selections from the
-following may be specified as a comma separated string.
+switch, but allow finer grained control.
@table @code
@item x86-64
@itemx i386
appear later in the option string.
@item suffix
-When in AT&T mode, instructs the disassembler to print a mnemonic
-suffix even when the suffix could be inferred by the operands.
+When in AT&T mode and also for a limited set of instructions when in Intel
+mode, instructs the disassembler to print a mnemonic suffix even when the
+suffix could be inferred by the operands or, for certain instructions, the
+execution mode's defaults.
@end table
For PowerPC, the @option{-M} argument @option{raw} selects
--- /dev/null
+#objdump: -dwMsuffix,i386
+#name: i386 .nops 1 w/ suffix and forced arch
+#source: nop-1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <single>:
+ +[a-f0-9]+: 90 nop
+
+0+1 <pseudo_1>:
+ +[a-f0-9]+: 90 nop
+
+0+2 <pseudo_8>:
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 90 nop
+
+0+a <pseudo_8_4>:
+ +[a-f0-9]+: 8d 74 26 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d 74 26 00 leal 0x0\(%esi,%eiz,1\),%esi
+
+0+12 <pseudo_20>:
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b6 00 00 00 00 leal 0x0\(%esi\),%esi
+
+0+26 <pseudo_30>:
+ +[a-f0-9]+: eb 1c jmp 44 <pseudo_129>
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+
+0+44 <pseudo_129>:
+ +[a-f0-9]+: eb 7f jmp c5 <end>
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 8d b4 26 00 00 00 00 leal 0x0\(%esi,%eiz,1\),%esi
+ +[a-f0-9]+: 90 nop
+
+0+c5 <end>:
+ +[a-f0-9]+: 31 c0 xorl %eax,%eax
+#pass
else if (CONST_STRNEQ (p, "x86-64"))
{
address_mode = mode_64bit;
- priv.orig_sizeflag = AFLAG | DFLAG;
+ priv.orig_sizeflag |= AFLAG | DFLAG;
}
else if (CONST_STRNEQ (p, "i386"))
{
address_mode = mode_32bit;
- priv.orig_sizeflag = AFLAG | DFLAG;
+ priv.orig_sizeflag |= AFLAG | DFLAG;
}
else if (CONST_STRNEQ (p, "i8086"))
{
address_mode = mode_16bit;
- priv.orig_sizeflag = 0;
+ priv.orig_sizeflag &= ~(AFLAG | DFLAG);
}
else if (CONST_STRNEQ (p, "intel"))
{