+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * vms-alpha.c (_bfd_vms_slurp_egsd): Ensure minimum size even
+ for "ignored" records.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * wasm-module.c (wasm_scan_name_function_section): Formatting.
+ Delete asect name check. Move asect NULL check to wasm_object_p.
+ Correct bounds check of sizes against end. Replace uses of
+ bfd_zalloc with bfd_alloc, zeroing only necessary bytes. Use
+ just one bfd_release.
+ (wasm_scan): Don't use malloc/strdup for section names,
+ bfd_alloc instead. Simplify code prefixing section name.
+ Formatting. Don't attempt to free memory here..
+ (wasm_object_p): ..do so here.
+
2020-01-10 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR ld/22269
In releases, the date is not included in either version strings or
sonames. */
-#define BFD_VERSION_DATE 20200112
+#define BFD_VERSION_DATE 20200113
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@
return FALSE;
}
+ if (gsd_size < 4)
+ {
+ too_small:
+ _bfd_error_handler (_("corrupt EGSD record type %d: size (%#x) "
+ "is too small"),
+ gsd_type, gsd_size);
+ bfd_set_error (bfd_error_bad_value);
+ return FALSE;
+ }
+
switch (gsd_type)
{
case EGSD__C_PSC:
asection *section;
if (offsetof (struct vms_egps, flags) + 2 > gsd_size)
- {
- too_small:
- _bfd_error_handler (_("corrupt EGSD record type %d: size (%#x) "
- "is too small"),
- gsd_type, gsd_size);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
+ goto too_small;
vms_flags = bfd_getl16 (egps->flags);
if ((vms_flags & EGPS__V_REL) == 0)
asymbol *symbols = NULL;
sec_ptr space_function_index;
- if (! asect)
- return FALSE;
-
- if (strcmp (asect->name, WASM_NAME_SECTION) != 0)
- return FALSE;
-
p = asect->contents;
end = asect->contents + asect->size;
- if (! p)
+ if (!p)
return FALSE;
while (p < end)
READ_LEB128 (payload_size, p, end);
- if (p > p + payload_size)
+ if (payload_size > (size_t) (end - p))
return FALSE;
p += payload_size;
READ_LEB128 (payload_size, p, end);
- if (p > p + payload_size)
- return FALSE;
-
- if (p + payload_size > end)
+ if (payload_size > (size_t) (end - p))
return FALSE;
end = p + payload_size;
READ_LEB128 (symcount, p, end);
/* Sanity check: each symbol has at least two bytes. */
- if (symcount > payload_size/2)
+ if (symcount > payload_size / 2)
return FALSE;
tdata->symcount = symcount;
- space_function_index = bfd_make_section_with_flags
- (abfd, WASM_SECTION_FUNCTION_INDEX, SEC_READONLY | SEC_CODE);
+ space_function_index
+ = bfd_make_section_with_flags (abfd, WASM_SECTION_FUNCTION_INDEX,
+ SEC_READONLY | SEC_CODE);
- if (! space_function_index)
- space_function_index = bfd_get_section_by_name (abfd, WASM_SECTION_FUNCTION_INDEX);
+ if (!space_function_index)
+ space_function_index
+ = bfd_get_section_by_name (abfd, WASM_SECTION_FUNCTION_INDEX);
- if (! space_function_index)
+ if (!space_function_index)
return FALSE;
- symbols = bfd_zalloc (abfd, tdata->symcount * sizeof (asymbol));
- if (! symbols)
+ symbols = bfd_alloc2 (abfd, tdata->symcount, sizeof (asymbol));
+ if (!symbols)
return FALSE;
for (symcount = 0; p < end && symcount < tdata->symcount; symcount++)
READ_LEB128 (idx, p, end);
READ_LEB128 (len, p, end);
- if (p + len < p || p + len > end)
+ if (len > (size_t) (end - p))
goto error_return;
- name = bfd_zalloc (abfd, len + 1);
- if (! name)
+ name = bfd_alloc (abfd, len + 1);
+ if (!name)
goto error_return;
memcpy (name, p, len);
+ name[len] = 0;
p += len;
sym = &symbols[symcount];
return TRUE;
error_return:
- while (symcount)
- bfd_release (abfd, (void *)symbols[--symcount].name);
bfd_release (abfd, symbols);
return FALSE;
}
bfd_vma vma = 0x80000000;
int section_code;
unsigned int bytes_read;
- char *name = NULL;
asection *bfdsec;
if (bfd_seek (abfd, (file_ptr) 0, SEEK_SET) != 0)
goto error_return;
- if (! wasm_read_header (abfd, &error))
+ if (!wasm_read_header (abfd, &error))
goto error_return;
while ((section_code = wasm_read_byte (abfd, &error)) != EOF)
{
const char *sname = wasm_section_code_to_name (section_code);
- if (! sname)
+ if (!sname)
goto error_return;
- name = strdup (sname);
- bfdsec = bfd_make_section_anyway_with_flags (abfd, name, SEC_HAS_CONTENTS);
+ bfdsec = bfd_make_section_anyway_with_flags (abfd, sname,
+ SEC_HAS_CONTENTS);
if (bfdsec == NULL)
goto error_return;
- name = NULL;
bfdsec->vma = vma;
bfdsec->lma = vma;
bfd_vma payload_len;
file_ptr section_start;
bfd_vma namelen;
+ char *name;
char *prefix = WASM_SECTION_PREFIX;
- char *p;
- int ret;
+ size_t prefixlen = strlen (prefix);
payload_len = wasm_read_leb128 (abfd, &error, &bytes_read, FALSE);
if (error)
namelen = wasm_read_leb128 (abfd, &error, &bytes_read, FALSE);
if (error || namelen > payload_len)
goto error_return;
- name = bfd_zmalloc (namelen + strlen (prefix) + 1);
- if (! name)
- goto error_return;
- p = name;
- ret = sprintf (p, "%s", prefix);
- if (ret < 0 || (bfd_vma) ret != strlen (prefix))
+ name = bfd_alloc (abfd, namelen + prefixlen + 1);
+ if (!name)
goto error_return;
- p += ret;
- if (bfd_bread (p, namelen, abfd) != namelen)
+ memcpy (name, prefix, prefixlen);
+ if (bfd_bread (name + prefixlen, namelen, abfd) != namelen)
goto error_return;
+ name[prefixlen + namelen] = 0;
- bfdsec = bfd_make_section_anyway_with_flags (abfd, name, SEC_HAS_CONTENTS);
+ bfdsec = bfd_make_section_anyway_with_flags (abfd, name,
+ SEC_HAS_CONTENTS);
if (bfdsec == NULL)
goto error_return;
- name = NULL;
bfdsec->vma = vma;
bfdsec->lma = vma;
if (bfdsec->size != 0)
{
- bfdsec->contents = bfd_zalloc (abfd, bfdsec->size);
- if (! bfdsec->contents)
+ bfdsec->contents = bfd_alloc (abfd, bfdsec->size);
+ if (!bfdsec->contents)
goto error_return;
if (bfd_bread (bfdsec->contents, bfdsec->size, abfd) != bfdsec->size)
return TRUE;
error_return:
- if (name)
- free (name);
-
- for (bfdsec = abfd->sections; bfdsec; bfdsec = bfdsec->next)
- free ((void *) bfdsec->name);
-
return FALSE;
}
wasm_object_p (bfd *abfd)
{
bfd_boolean error;
+ asection *s;
if (bfd_seek (abfd, (file_ptr) 0, SEEK_SET) != 0)
return NULL;
- if (! wasm_read_header (abfd, &error))
+ if (!wasm_read_header (abfd, &error))
{
bfd_set_error (bfd_error_wrong_format);
return NULL;
}
- if (! wasm_mkobject (abfd) || ! wasm_scan (abfd))
+ if (!wasm_mkobject (abfd))
return NULL;
- if (! bfd_default_set_arch_mach (abfd, bfd_arch_wasm32, 0))
- return NULL;
+ if (!wasm_scan (abfd)
+ || !bfd_default_set_arch_mach (abfd, bfd_arch_wasm32, 0))
+ {
+ bfd_release (abfd, abfd->tdata.any);
+ abfd->tdata.any = NULL;
+ return NULL;
+ }
- if (wasm_scan_name_function_section (abfd, bfd_get_section_by_name (abfd, WASM_NAME_SECTION)))
+ s = bfd_get_section_by_name (abfd, WASM_NAME_SECTION);
+ if (s != NULL && wasm_scan_name_function_section (abfd, s))
abfd->flags |= HAS_SYMS;
return abfd->xvec;
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
+ left shift signed values.
+
2020-01-06 Alan Modra <amodra@gmail.com>
* m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
(df f-disp8 "8 bit signed offset" () 4 8 INT #f #f)
(df f-disp9 "9 bit signed offset" () 4 8 INT
((value pc) (sra WI value (const 1)))
- ((value pc) (sll WI value (const 1)))
+ ((value pc) (mul WI value (const 2)))
)
(df f-disp10 "10 bit signed offset" () 4 8 INT
((value pc) (sra WI value (const 2)))
- ((value pc) (sll WI value (const 2)))
+ ((value pc) (mul WI value (const 4)))
)
(df f-s10 "10 bit signed offset" () 8 8 INT
((value pc) (sra WI value (const 2)))
- ((value pc) (sll WI value (const 2)))
+ ((value pc) (mul WI value (const 4)))
)
(df f-u10 "10 bit unsigned offset" () 8 8 UINT
((value pc) (srl UWI value (const 2)))
)
(df f-rel9 "9 pc relative signed offset" (PCREL-ADDR) 8 8 INT
((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
- ((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
+ ((value pc) (add WI (mul WI value (const 2)) (add WI pc (const 2))))
)
(dnf f-dir8 "8 bit direct address" () 8 8)
(df f-dir9 "9 bit direct address" () 8 8 UINT
)
(df f-rel12 "12 bit pc relative signed offset" (PCREL-ADDR) 5 11 INT
((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
- ((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
+ ((value pc) (add WI (mul WI value (const 2)) (add WI pc (const 2))))
)
(dnf f-reglist_hi_st "8 bit register mask for stm" () 8 8)
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
+ insertion.
+
2020-01-10 Alan Modra <amodra@gmail.com>
* testsuite/gas/elf/pr14891.s: Don't start directives in first column.
}
else if (exp->X_add_number < 32 && IS_CPU_TIC3X (tic4x_cpu))
{
- INSERTU (opcode, exp->X_add_number | 0x20, 4, 0);
+ INSERTU (opcode, exp->X_add_number | 0x20, 5, 0);
continue;
}
else
+2020-01-12 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * gdbsupport/gdb_wait.c: Include gdb_wait.h.
+
2020-01-12 Pedro Alves <palves@redhat.com>
* bsd-kvm.c (bsd_kvm_target::close): Call exit_inferior_silent
+2020-01-12 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * linux-arm-tdesc.c: Include linux-arm-tdesc.h.
+ * linux-arm-tdesc.h: Include arch/arm.h.
+
+2020-01-12 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * linux-aarch64-low.c (aarch64_write_goto_address): Make static.
+
+2020-01-12 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * linux-aarch32-tdesc.c: Include linux-aarch32-tdesc.h.
+ * linux-aarch64-tdesc.c: Include linux-aarch64-tdesc.h.
+
2020-01-10 Pedro Alves <palves@redhat.com>
* fork-child.c (post_fork_inferior): Pass target down to
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "server.h"
+
+#include "linux-aarch32-tdesc.h"
+
#include "tdesc.h"
#include "arch/aarch32.h"
#include <inttypes.h>
/* Implementation of emit_ops method "write_goto_address". */
-void
+static void
aarch64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
{
uint32_t insn;
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "server.h"
+
+#include "linux-aarch64-tdesc.h"
+
#include "tdesc.h"
#include "arch/aarch64.h"
#include "linux-aarch32-low.h"
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "server.h"
+
+#include "linux-arm-tdesc.h"
+
#include "tdesc.h"
#include "arch/arm.h"
#include <inttypes.h>
#ifndef GDBSERVER_LINUX_ARM_TDESC_H
#define GDBSERVER_LINUX_ARM_TDESC_H
+#include "arch/arm.h"
+
/* Return the Arm target description with fp registers FP_TYPE. */
const target_desc * arm_linux_read_description (arm_fp_type fp_type);
#include "common-defs.h"
+#include "gdb_wait.h"
+
#ifdef __MINGW32__
/* The underlying idea is that when a Windows program is terminated by
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * opcode/tic4x.h (EXTR): Delete.
+ (EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
+ extension using shifts. Do trim INSERTU value to specified bitfield.
+
2020-01-10 Alan Modra <amodra@gmail.com>
* opcode/spu.h: Formatting.
#define IS_CPU_TIC4X(v) ((v) == 0 || (v) == 40 || (v) == 44)
/* Define some bitfield extraction/insertion macros. */
-#define EXTR(inst, m, l) ((inst) << (31 - (m)) >> (31 - ((m) - (l))))
-#define EXTRU(inst, m, l) EXTR ((unsigned long)(inst), (m), (l))
-#define EXTRS(inst, m, l) EXTR ((long)(inst), (m), (l))
-#define INSERTU(inst, val, m, l) (inst |= ((val) << (l)))
-#define INSERTS(inst, val, m, l) INSERTU (inst, ((val) & ((1 << ((m) - (l) + 1)) - 1)), m, l)
+#define EXTRU(inst, m, l) \
+ (((inst) >> (l)) & ((2u << ((m) - (l))) - 1))
+#define EXTRS(inst, m, l) \
+ ((int) ((EXTRU (inst, m, l) ^ (1u << ((m) - (l)))) - (1u << ((m) - (l)))))
+#define INSERTU(inst, val, m, l) \
+ ((inst) |= ((val) & ((2u << ((m) - (l))) - 1)) << (l))
+#define INSERTS INSERTU
/* Define register numbers. */
typedef enum
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * score-dis.c: Formatting.
+ * score7-dis.c: Formatting.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * score-dis.c (print_insn_score48): Use unsigned variables for
+ unsigned values. Don't left shift negative values.
+ (print_insn_score32): Likewise.
+ * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * tic4x-dis.c (tic4x_print_register): Remove dead code.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * fr30-ibld.c: Regenerate.
+
+2020-01-13 Alan Modra <amodra@gmail.com>
+
+ * xgate-dis.c (print_insn): Don't left shift signed value.
+ (ripBits): Formatting, use 1u.
+
2020-01-10 Alan Modra <amodra@gmail.com>
* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
- value = ((value) << (2));
+ value = ((value) * (4));
fields->f_disp10 = value;
}
break;
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
- value = ((value) << (1));
+ value = ((value) * (2));
fields->f_disp9 = value;
}
break;
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
- value = ((((value) << (1))) + (((pc) + (2))));
+ value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel12 = value;
}
break;
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
- value = ((((value) << (1))) + (((pc) + (2))));
+ value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel9 = value;
}
break;
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
- value = ((value) << (2));
+ value = ((value) * (4));
fields->f_s10 = value;
}
break;
struct score_opcode
{
bfd_vma value;
- bfd_vma mask; /* Recognise instruction if (op & mask) == value. */
- char *assembler; /* Disassembly string. */
+ bfd_vma mask; /* Recognise instruction if (op & mask) == value. */
+ char *assembler; /* Disassembly string. */
};
/* Note: There is a partial ordering in this table - it must be searched from
for (insn = score_opcodes; insn->assembler; insn++)
{
/* Using insn->mask &0xff00000000 to distinguish 48/32 bit. */
- if (((insn->mask & 0xff0000000000LL)!=0) && (given & insn->mask) == insn->value)
- {
- info->bytes_per_chunk = 2;
- info->bytes_per_line =6;
-
- char *c;
-
- for (c = insn->assembler; *c; c++)
- {
- if (*c == '%')
- {
- switch (*++c)
- {
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- {
- int bitstart = *c++ - '0';
- int bitend = 0;
-
- while (*c >= '0' && *c <= '9')
- bitstart = (bitstart * 10) + *c++ - '0';
-
- switch (*c)
- {
- case '-':
- c++;
- while (*c >= '0' && *c <= '9')
- bitend = (bitend * 10) + *c++ - '0';
-
- if (!bitend)
- abort ();
-
- switch (*c)
- {
- case 'r':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%s", score_regnames[reg]);
- }
- break;
- case 'd':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'i':
- {
- long reg;
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
- reg = ((reg ^ (1u << (bitend - bitstart)))
+ if ((insn->mask & 0xff0000000000LL) != 0
+ && (given & insn->mask) == insn->value)
+ {
+ info->bytes_per_chunk = 2;
+ info->bytes_per_line =6;
+
+ char *c;
+
+ for (c = insn->assembler; *c; c++)
+ {
+ if (*c == '%')
+ {
+ switch (*++c)
+ {
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ {
+ int bitstart = *c++ - '0';
+ int bitend = 0;
+
+ while (*c >= '0' && *c <= '9')
+ bitstart = (bitstart * 10) + *c++ - '0';
+
+ switch (*c)
+ {
+ case '-':
+ c++;
+ while (*c >= '0' && *c <= '9')
+ bitend = (bitend * 10) + *c++ - '0';
+
+ if (!bitend)
+ abort ();
+
+ switch (*c)
+ {
+ case 'r':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%s", score_regnames[reg]);
+ }
+ break;
+ case 'd':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'i':
+ {
+ long reg;
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ reg = ((reg ^ (1u << (bitend - bitstart)))
- (1u << (bitend - bitstart)));
- /* Fix bug: s3_testsuite 64-bit.
- Remove high 32 bits. */
- reg = (int) reg;
-
- if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
- || ((given & insn->mask) == 0x0c000012) /* ldc2 */
- || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
- || ((given & insn->mask) == 0x0c00000b) /* stc1 */
- || ((given & insn->mask) == 0x0c000013) /* stc2 */
- || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
- reg <<= 2;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'x':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%lx", reg);
- }
- break;
- case 'w':
- {
- long reg;
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
- reg <<= 2;
- func (stream, "%lx", reg);
- }
- break;
-
- default:
- abort ();
- }
- break;
-
- case '`':
- c++;
- if ((given & (1u << bitstart)) == 0)
- func (stream, "%c", *c);
- break;
- case '\'':
- c++;
- if ((given & (1u << bitstart)) != 0)
- func (stream, "%c", *c);
- break;
- default:
- abort ();
- }
- break;
- }
- default:
+ /* Fix bug: s3_testsuite 64-bit.
+ Remove high 32 bits. */
+ reg = (int) reg;
+
+ if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
+ || ((given & insn->mask) == 0x0c000012) /* ldc2 */
+ || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
+ || ((given & insn->mask) == 0x0c00000b) /* stc1 */
+ || ((given & insn->mask) == 0x0c000013) /* stc2 */
+ || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
+ reg *= 4;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'x':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%lx", reg);
+ }
+ break;
+ case 'w':
+ {
+ unsigned long reg;
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ reg <<= 2;
+ func (stream, "%lx", reg);
+ }
+ break;
+
+ default:
+ abort ();
+ }
+ break;
+
+ case '`':
+ c++;
+ if ((given & (1u << bitstart)) == 0)
+ func (stream, "%c", *c);
+ break;
+ case '\'':
+ c++;
+ if ((given & (1u << bitstart)) != 0)
+ func (stream, "%c", *c);
+ break;
+ default:
+ abort ();
+ }
+ break;
+ }
+ default:
abort ();
- }
- }
- else
- func (stream, "%c", *c);
- }
- return 6;
- }
+ }
+ }
+ else
+ func (stream, "%c", *c);
+ }
+ return 6;
+ }
}
#if (SCORE_SIMULATOR_ACTIVE)
{
struct score_opcode *insn;
void *stream = info->stream;
- int rb_equal_zero=1;
+ int rb_equal_zero = 1;
fprintf_ftype func = info->fprintf_func;
for (insn = score_opcodes; insn->assembler; insn++)
{
- if (((insn->mask & 0xff0000000000LL)==0)&&(insn->mask & 0xffff0000) && (given & insn->mask) == insn->value)
- {
- /* check for bcmpeq / bcmpeqz / bcmpne / bcmpnez */
- /* given &0x7c00 is for to test if rb is zero ,
- rb_equal_zero =1 : index to bcmpeqz
- rb_equal_zero =0 , index to bcmpeq
- this checking rule only for branch compare ( insn->mask ==0x3e00007e*/
- if (((given & 0x7c00) !=0)&&(rb_equal_zero ==1)&&(insn->mask == 0x3e00007e)
- && (insn->value == 0x0000004c || insn->value == 0x0000004e))
- {
- rb_equal_zero =0;
- continue;
- }
-
- char *c;
-
- for (c = insn->assembler; *c; c++)
- {
- if (*c == '%')
- {
- switch (*++c)
- {
- case 'j':
- {
- int target;
-
- if (info->flags & INSN_HAS_RELOC)
- pc = 0;
- target = (pc & 0xfe000000) | (given & 0x01fffffe);
- (*info->print_address_func) (target, info);
- }
- break;
- case 'b':
- {
- /* Sign-extend a 20-bit number. */
-#define SEXT20(x) ((((x) & 0xfffff) ^ (~ 0x7ffff)) + 0x80000)
- int disp = ((given & 0x01ff8000) >> 5) | (given & 0x3fe);
- int target = (pc + SEXT20 (disp));
-
- (*info->print_address_func) (target, info);
- }
- break;
- case 'z':
- {
-#define SEXT10(x) ((((x) & 0x3ff) ^ (~ 0x1ff)) + 0x200)
- if ((given & 0x7c00 ) == 0)
- {
- /* Sign-extend a 20-bit number. */
- /* disp : [24 -20] , [9-7 ] , [0] */
- int disp = (given&1)<<1 |((given>>7)&7)<<2 |((given>>20)&0x1f)<<5;
- int target = (pc + SEXT10 (disp));
- (*info->print_address_func) (target, info);
- }
- else
- {
- long reg;
- int bitstart = 10;
- int bitend = 14;
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
- /* Sign-extend a 20-bit number. */
- int disp = (given&1)<<1 |((given>>7)&7)<<2 |((given>>20)&0x1f)<<5;
- int target = (pc + SEXT10 (disp));
- func (stream, "%s ,", score_regnames[reg] );
- (*info->print_address_func) (target, info);
-
- }
-
- }
- break;
- case 'm':
- {
- /* disp : [24 -20] , [9-7 ] , [0] */
- int disp = (given&1)<<2 |((given>>7)&7)<<3 |((given>>20)&0x1f)<<6;
- (*info->print_address_func) (disp, info);
- }
- break;
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- {
- int bitstart = *c++ - '0';
- int bitend = 0;
-
- while (*c >= '0' && *c <= '9')
- bitstart = (bitstart * 10) + *c++ - '0';
-
- switch (*c)
- {
- case '-':
- c++;
- while (*c >= '0' && *c <= '9')
- bitend = (bitend * 10) + *c++ - '0';
-
- if (!bitend)
- abort ();
-
- switch (*c)
- {
- case 'r':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%s", score_regnames[reg]);
- }
- break;
- case 'd':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'i':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
- reg = ((reg ^ (1u << (bitend - bitstart)))
+ if ((insn->mask & 0xff0000000000LL) == 0
+ && (insn->mask & 0xffff0000) != 0
+ && (given & insn->mask) == insn->value)
+ {
+ /* check for bcmpeq / bcmpeqz / bcmpne / bcmpnez
+ given & 0x7c00 is to test if rb is zero,
+ rb_equal_zero = 1 : index to bcmpeqz
+ rb_equal_zero = 0 , index to bcmpeq
+ only for branch compare (insn->mask == 0x3e00007e). */
+ if ((given & 0x7c00) != 0
+ && rb_equal_zero
+ && insn->mask == 0x3e00007e
+ && (insn->value == 0x0000004c || insn->value == 0x0000004e))
+ {
+ rb_equal_zero =0;
+ continue;
+ }
+
+ char *c;
+
+ for (c = insn->assembler; *c; c++)
+ {
+ if (*c == '%')
+ {
+ switch (*++c)
+ {
+ case 'j':
+ {
+ int target;
+
+ if (info->flags & INSN_HAS_RELOC)
+ pc = 0;
+ target = (pc & 0xfe000000) | (given & 0x01fffffe);
+ (*info->print_address_func) (target, info);
+ }
+ break;
+ case 'b':
+ {
+ /* Sign-extend a 20-bit number. */
+#define SEXT20(x) ((((x) & 0xfffff) ^ (~ 0x7ffff)) + 0x80000)
+ int disp = (((given & 0x01ff8000) >> 5)
+ | (given & 0x3fe));
+ int target = (pc + SEXT20 (disp));
+
+ (*info->print_address_func) (target, info);
+ }
+ break;
+ case 'z':
+ {
+#define SEXT10(x) ((((x) & 0x3ff) ^ (~ 0x1ff)) + 0x200)
+ if ((given & 0x7c00 ) == 0)
+ {
+ /* Sign-extend a 20-bit number. */
+ /* disp : [24 -20] , [9-7 ] , [0] */
+ int disp = ((given & 1) << 1
+ | ((given >> 7) & 7) << 2
+ | ((given >> 20) & 0x1f) <<5);
+ int target = (pc + SEXT10 (disp));
+ (*info->print_address_func) (target, info);
+ }
+ else
+ {
+ unsigned long reg;
+ int bitstart = 10;
+ int bitend = 14;
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ /* Sign-extend a 20-bit number. */
+ int disp = ((given & 1) << 1
+ | ((given >> 7) & 7) << 2
+ | ((given >> 20) & 0x1f) <<5);
+ int target = (pc + SEXT10 (disp));
+ func (stream, "%s ,", score_regnames[reg] );
+ (*info->print_address_func) (target, info);
+
+ }
+
+ }
+ break;
+ case 'm':
+ {
+ /* disp : [24 -20] , [9-7 ] , [0] */
+ int disp = ((given & 1) << 2
+ | ((given >> 7) & 7) << 3
+ | ((given >> 20) & 0x1f) << 6);
+ (*info->print_address_func) (disp, info);
+ }
+ break;
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ {
+ int bitstart = *c++ - '0';
+ int bitend = 0;
+
+ while (*c >= '0' && *c <= '9')
+ bitstart = (bitstart * 10) + *c++ - '0';
+
+ switch (*c)
+ {
+ case '-':
+ c++;
+ while (*c >= '0' && *c <= '9')
+ bitend = (bitend * 10) + *c++ - '0';
+
+ if (!bitend)
+ abort ();
+
+ switch (*c)
+ {
+ case 'r':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%s", score_regnames[reg]);
+ }
+ break;
+ case 'd':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'i':
+ {
+ long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ reg = ((reg ^ (1u << (bitend - bitstart)))
- (1u << (bitend - bitstart)));
- if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
- || ((given & insn->mask) == 0x0c000012) /* ldc2 */
- || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
- || ((given & insn->mask) == 0x0c00000b) /* stc1 */
- || ((given & insn->mask) == 0x0c000013) /* stc2 */
- || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
- reg <<= 2;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'x':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- func (stream, "%lx", reg);
- }
- break;
- default:
- abort ();
- }
- break;
-
- case '`':
- c++;
- if ((given & (1u << bitstart)) == 0)
- func (stream, "%c", *c);
- break;
- case '\'':
- c++;
- if ((given & (1u << bitstart)) != 0)
- func (stream, "%c", *c);
- break;
- default:
- abort ();
- }
- break;
- }
- default:
+ if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
+ || ((given & insn->mask) == 0x0c000012) /* ldc2 */
+ || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
+ || ((given & insn->mask) == 0x0c00000b) /* stc1 */
+ || ((given & insn->mask) == 0x0c000013) /* stc2 */
+ || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
+ reg *= 4;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'x':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%lx", reg);
+ }
+ break;
+ default:
+ abort ();
+ }
+ break;
+
+ case '`':
+ c++;
+ if ((given & (1u << bitstart)) == 0)
+ func (stream, "%c", *c);
+ break;
+ case '\'':
+ c++;
+ if ((given & (1u << bitstart)) != 0)
+ func (stream, "%c", *c);
+ break;
+ default:
+ abort ();
+ }
+ break;
+ }
+ default:
abort ();
- }
- }
- else
- func (stream, "%c", *c);
- }
- return 4;
- }
+ }
+ }
+ else
+ func (stream, "%c", *c);
+ }
+ return 4;
+ }
}
#if (SCORE_SIMULATOR_ACTIVE)
given &= 0xffff;
for (insn = score_opcodes; insn->assembler; insn++)
{
- if (((insn->mask & 0xff0000000000LL)==0) &&!(insn->mask & 0xffff0000) && (given & insn->mask) == insn->value)
- {
- char *c = insn->assembler;
-
- info->bytes_per_chunk = 2;
- info->bytes_per_line = 4;
- given &= 0xffff;
-
- for (; *c; c++)
- {
- if (*c == '%')
- {
- switch (*++c)
- {
-
- case 'j':
- {
- int target;
-
- if (info->flags & INSN_HAS_RELOC)
- pc = 0;
-
- target = (pc & 0xfffff000) | (given & 0x00000ffe);
- (*info->print_address_func) (target, info);
- }
- break;
- case 'b':
- {
- /* Sign-extend a 9-bit number. */
-#define SEXT10(x) ((((x) & 0x3ff) ^ (~ 0x1ff)) + 0x200)
- int disp = (given & 0x1ff) << 1;
- int target = (pc + SEXT10 (disp));
-
- (*info->print_address_func) (target, info);
- }
- break;
-
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- {
- int bitstart = *c++ - '0';
- int bitend = 0;
-
- while (*c >= '0' && *c <= '9')
- bitstart = (bitstart * 10) + *c++ - '0';
-
- switch (*c)
- {
- case '-':
- {
- long reg;
-
- c++;
- while (*c >= '0' && *c <= '9')
- bitend = (bitend * 10) + *c++ - '0';
- if (!bitend)
- abort ();
- reg = given >> bitstart;
- reg &= (2u << (bitend - bitstart)) - 1;
-
- switch (*c)
- {
- case 'R':
- func (stream, "%s", score_regnames[reg + 16]);
- break;
- case 'r':
- func (stream, "%s", score_regnames[reg]);
- break;
- case 'd':
+ if ((insn->mask & 0xff0000000000LL) == 0
+ && !(insn->mask & 0xffff0000)
+ && (given & insn->mask) == insn->value)
+ {
+ char *c = insn->assembler;
+
+ info->bytes_per_chunk = 2;
+ info->bytes_per_line = 4;
+ given &= 0xffff;
+
+ for (; *c; c++)
+ {
+ if (*c == '%')
+ {
+ switch (*++c)
+ {
+ case 'j':
+ {
+ int target;
+
+ if (info->flags & INSN_HAS_RELOC)
+ pc = 0;
+
+ target = (pc & 0xfffff000) | (given & 0x00000ffe);
+ (*info->print_address_func) (target, info);
+ }
+ break;
+
+ case 'b':
+ {
+ /* Sign-extend a 9-bit number. */
+#define SEXT10(x) ((((x) & 0x3ff) ^ (~ 0x1ff)) + 0x200)
+ int disp = (given & 0x1ff) << 1;
+ int target = (pc + SEXT10 (disp));
+
+ (*info->print_address_func) (target, info);
+ }
+ break;
+
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ {
+ int bitstart = *c++ - '0';
+ int bitend = 0;
+
+ while (*c >= '0' && *c <= '9')
+ bitstart = (bitstart * 10) + *c++ - '0';
+
+ switch (*c)
+ {
+ case '-':
+ {
+ long reg;
+
+ c++;
+ while (*c >= '0' && *c <= '9')
+ bitend = (bitend * 10) + *c++ - '0';
+ if (!bitend)
+ abort ();
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ switch (*c)
+ {
+ case 'R':
+ func (stream, "%s", score_regnames[reg + 16]);
+ break;
+ case 'r':
+ func (stream, "%s", score_regnames[reg]);
+ break;
+ case 'd':
/* Check rpush rd, 0 and rpop! rd, 0.
If 0, then print 32. */
if (((given & 0x00007c00) == 0x00006c00
&& reg == 0)
reg = 32;
- if (*(c + 1) == '\0')
- func (stream, "%ld", reg);
- else
- {
- c++;
- if (*c == '1')
- func (stream, "%ld", reg << 1);
- else if (*c == '2')
- func (stream, "%ld", reg << 2);
- }
- break;
-
- case 'x':
- if (*(c + 1) == '\0')
- func (stream, "%lx", reg);
- else
- {
- c++;
- if (*c == '1')
- func (stream, "%lx", reg << 1);
- else if (*c == '2')
- func (stream, "%lx", reg << 2);
- }
- break;
- case 'i':
- reg = (reg ^ (1u << bitend)) - (1u << bitend);
- func (stream, "%ld", reg);
- break;
- default:
- abort ();
- }
- }
- break;
-
- case '\'':
- c++;
- if ((given & (1u << bitstart)) != 0)
- func (stream, "%c", *c);
- break;
- default:
- abort ();
- }
- }
- break;
- default:
- abort ();
- }
- }
- else
- func (stream, "%c", *c);
- }
-
- return 2;
- }
+ if (*(c + 1) == '\0')
+ func (stream, "%ld", reg);
+ else
+ {
+ c++;
+ if (*c == '1')
+ func (stream, "%ld", reg << 1);
+ else if (*c == '2')
+ func (stream, "%ld", reg << 2);
+ }
+ break;
+
+ case 'x':
+ if (*(c + 1) == '\0')
+ func (stream, "%lx", reg);
+ else
+ {
+ c++;
+ if (*c == '1')
+ func (stream, "%lx", reg << 1);
+ else if (*c == '2')
+ func (stream, "%lx", reg << 2);
+ }
+ break;
+ case 'i':
+ reg = (reg ^ (1u << bitend)) - (1u << bitend);
+ func (stream, "%ld", reg);
+ break;
+ default:
+ abort ();
+ }
+ }
+ break;
+
+ case '\'':
+ c++;
+ if ((given & (1u << bitstart)) != 0)
+ func (stream, "%c", *c);
+ break;
+ default:
+ abort ();
+ }
+ }
+ break;
+ default:
+ abort ();
+ }
+ }
+ else
+ func (stream, "%c", *c);
+ }
+
+ return 2;
+ }
}
#if (SCORE_SIMULATOR_ACTIVE)
func (stream, _("<illegal instruction>"));
s3_print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little)
{
unsigned char b[6];
- bfd_vma given,given_h , given_l, given_16, given_32, given_48;
+ bfd_vma given, given_h, given_l, given_16, given_32, given_48;
bfd_vma ridparity;
int status;
void *stream = info->stream;
info->display_endian = little ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
info->bytes_per_chunk = 2;
- status = info->read_memory_func (pc, (bfd_byte *) & b[0], 4, info);
+ status = info->read_memory_func (pc, (bfd_byte *) &b[0], 4, info);
if (status != 0)
{
info->bytes_per_chunk = 2;
status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
b[3] = b[2] = 0;
if (status != 0)
- {
- info->memory_error_func (status, pc, info);
- return -1;
- }
+ {
+ info->memory_error_func (status, pc, info);
+ return -1;
+ }
}
if (little)
- {
- given = b[0] | (b[1] << 8);
- }
+ given = b[0] | (b[1] << 8);
else
- {
- given = (b[0] << 8) | b[1];
- }
+ given = (b[0] << 8) | b[1];
/* Set given_16. */
given_16 = given;
/* Judge if now is insn_16_p. */
if ((given & 0x8000)==0)
- return print_insn_score16 (pc, info, given);
-
+ return print_insn_score16 (pc, info, given);
else
{
if (little)
- {
- given = ((bfd_vma)b[2]) | ((bfd_vma)b[3] << 8) | ((bfd_vma)b[0] << 16) | ((bfd_vma)b[1] << 24);
- }
+ given = ((bfd_vma) b[2] | (bfd_vma) b[3] << 8
+ | (bfd_vma) b[0] << 16 | (bfd_vma) b[1] << 24);
else
- {
- given = ((bfd_vma)b[0] << 24) | ((bfd_vma)b[1] << 16) | ((bfd_vma)b[2] << 8) | ((bfd_vma)b[3]);
- }
+ given = ((bfd_vma) b[0] << 24 | (bfd_vma) b[1] << 16
+ | (bfd_vma) b[2] << 8 | (bfd_vma) b[3]);
/* Set given_32. */
given_32 = given;
/* Judge if now is insn_32. */
- if ((given &0x80008000)==0x80000000)
- {
- /* Get rid of parity. */
- ridparity = (given & 0x7FFF);
- ridparity |= (given & 0x7FFF0000) >> 1;
- given = ridparity;
- return print_insn_score32 (pc, info, given);
- }
+ if ((given & 0x80008000) == 0x80000000)
+ {
+ /* Get rid of parity. */
+ ridparity = (given & 0x7FFF);
+ ridparity |= (given & 0x7FFF0000) >> 1;
+ given = ridparity;
+ return print_insn_score32 (pc, info, given);
+ }
}
/* The insn is 48 bit. */
- status = info->read_memory_func (pc, (bfd_byte *) & b[0], 6, info);
+ status = info->read_memory_func (pc, (bfd_byte *) &b[0], 6, info);
if (status != 0)
{
info->memory_error_func (status, pc, info);
}
if (little)
- {
- given = ((bfd_vma)b[4]) | ((bfd_vma)b[5] << 8) | ((bfd_vma)b[2] << 16) | ((bfd_vma)b[3] << 24)
- | ((bfd_vma)b[0] << 32) | ((bfd_vma)b[1] << 40);
- }
+ given = ((bfd_vma) b[4] | (bfd_vma) b[5] << 8
+ | (bfd_vma) b[2] << 16 | (bfd_vma) b[3] << 24
+ | (bfd_vma) b[0] << 32 | (bfd_vma) b[1] << 40);
else
{
- given_l = ((bfd_vma)b[5]) | ((bfd_vma)b[4] << 8) | ((bfd_vma)b[3] << 16) | ((bfd_vma)b[2] << 24) ;
- given_h = ((bfd_vma)b[1] )|((bfd_vma)b[0] <<8);
- given = ((bfd_vma)given_h<<32) | (bfd_vma)given_l ;
+ given_l = ((bfd_vma) b[5] | (bfd_vma) b[4] << 8
+ | (bfd_vma) b[3] << 16 | (bfd_vma) b[2] << 24);
+ given_h = (bfd_vma) b[1] | (bfd_vma) b[0] << 8;
+ given = (bfd_vma) given_h << 32 | (bfd_vma) given_l ;
+ }
+
+ /* Set given_48. */
+ given_48 = given;
+ if ((given & 0x800080008000LL) == 0x800080000000LL)
+ {
+ /* Get rid of parity. */
+ ridparity = (given & 0x7FFF);
+ ridparity |= (given & 0x7FFF0000) >> 1;
+ ridparity |= (given & 0x7FFF00000000LL) >> 2;
+ given = ridparity;
+ status = print_insn_score48 (info, given);
+ return status;
}
- /* Set given_48. */
- given_48 = given;
-
- if ((given & 0x800080008000LL) == 0x800080000000LL)
- {
- /* Get rid of parity. */
- ridparity = (given & 0x7FFF);
- ridparity |= (given & 0x7FFF0000) >> 1;
- ridparity |= (given & 0x7FFF00000000LL) >> 2;
- given = ridparity;
- status = print_insn_score48 (info, given);
- return status;
- }
-
- /* Check 0x800080008000, 0x80008000, 0x8000. */
- if ((given_48 & 0x800080008000LL) != 0x800080000000LL)
- {
+ /* Check 0x800080008000, 0x80008000, 0x8000. */
+ if ((given_48 & 0x800080008000LL) != 0x800080000000LL)
+ {
#if (SCORE_SIMULATOR_ACTIVE)
- func (stream, _("<illegal instruction>"));
- return 6;
+ func (stream, _("<illegal instruction>"));
+ return 6;
#endif
- }
- if (((given_32 & 0xffff00000000LL) == 0) && ((given_32 & 0x80008000) != 0x80000000))
- {
+ }
+ if ((given_32 & 0xffff00000000LL) == 0
+ && ((given_32 & 0x80008000) != 0x80000000))
+ {
#if (SCORE_SIMULATOR_ACTIVE)
- func (stream, _("<illegal instruction>"));
- return 4;
+ func (stream, _("<illegal instruction>"));
+ return 4;
#endif
- }
- if (((given_16 & 0xffffffff0000LL) == 0) && ((given_16 & 0x8000) != 0))
- {
+ }
+ if (((given_16 & 0xffffffff0000LL) == 0) && ((given_16 & 0x8000) != 0))
+ {
#if (SCORE_SIMULATOR_ACTIVE)
- func (stream, _("<illegal instruction>"));
- return 2;
+ func (stream, _("<illegal instruction>"));
+ return 2;
#endif
- }
- else
- {
- return 0;
- }
+ }
+ else
+ return 0;
}
static unsigned long
#else /* not BFD64 */
int
print_insn_big_score (bfd_vma pc ATTRIBUTE_UNUSED,
- struct disassemble_info * info ATTRIBUTE_UNUSED)
+ struct disassemble_info *info ATTRIBUTE_UNUSED)
{
abort ();
}
int
print_insn_little_score (bfd_vma pc ATTRIBUTE_UNUSED,
- struct disassemble_info * info ATTRIBUTE_UNUSED)
+ struct disassemble_info *info ATTRIBUTE_UNUSED)
{
abort ();
}
struct score_opcode
{
unsigned long value;
- unsigned long mask; /* Recognise instruction if (op & mask) == value. */
- char *assembler; /* Disassembly string. */
+ unsigned long mask; /* Recognise instruction if (op & mask) == value. */
+ char *assembler; /* Disassembly string. */
};
/* Note: There is a partial ordering in this table - it must be searched from
for (insn = score_opcodes; insn->assembler; insn++)
{
if ((insn->mask & 0xffff0000) && (given & insn->mask) == insn->value)
- {
- char *c;
-
- for (c = insn->assembler; *c; c++)
- {
- if (*c == '%')
- {
- switch (*++c)
- {
- case 'j':
- {
- int target;
-
- if (info->flags & INSN_HAS_RELOC)
- pc = 0;
- target = (pc & 0xfe000000) | (given & 0x01fffffe);
- (*info->print_address_func) (target, info);
- }
- break;
- case 'b':
- {
- /* Sign-extend a 20-bit number. */
-#define SEXT20(x) ((((x) & 0xfffff) ^ (~ 0x7ffff)) + 0x80000)
- int disp = ((given & 0x01ff8000) >> 5) | (given & 0x3fe);
- int target = (pc + SEXT20 (disp));
-
- (*info->print_address_func) (target, info);
- }
- break;
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- {
- int bitstart = *c++ - '0';
- int bitend = 0;
-
- while (*c >= '0' && *c <= '9')
- bitstart = (bitstart * 10) + *c++ - '0';
-
- switch (*c)
- {
- case '-':
- c++;
- while (*c >= '0' && *c <= '9')
- bitend = (bitend * 10) + *c++ - '0';
-
- if (!bitend)
- abort ();
-
- switch (*c)
- {
- case 'r':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2 << (bitend - bitstart)) - 1;
-
- func (stream, "%s", score_regnames[reg]);
- }
- break;
- case 'd':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2 << (bitend - bitstart)) - 1;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'i':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2 << (bitend - bitstart)) - 1;
- reg = ((reg ^ (1 << (bitend - bitstart))) -
- (1 << (bitend - bitstart)));
-
- if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
- || ((given & insn->mask) == 0x0c000012) /* ldc2 */
- || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
- || ((given & insn->mask) == 0x0c00000b) /* stc1 */
- || ((given & insn->mask) == 0x0c000013) /* stc2 */
- || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
- reg <<= 2;
-
- func (stream, "%ld", reg);
- }
- break;
- case 'x':
- {
- long reg;
-
- reg = given >> bitstart;
- reg &= (2 << (bitend - bitstart)) - 1;
-
- func (stream, "%lx", reg);
- }
- break;
- default:
- abort ();
- }
- break;
- case '`':
- c++;
- if ((given & (1 << bitstart)) == 0)
- func (stream, "%c", *c);
- break;
- case '\'':
- c++;
- if ((given & (1 << bitstart)) != 0)
- func (stream, "%c", *c);
- break;
- default:
- abort ();
- }
- break;
- }
- default:
+ {
+ char *c;
+
+ for (c = insn->assembler; *c; c++)
+ {
+ if (*c == '%')
+ {
+ switch (*++c)
+ {
+ case 'j':
+ {
+ int target;
+
+ if (info->flags & INSN_HAS_RELOC)
+ pc = 0;
+ target = (pc & 0xfe000000) | (given & 0x01fffffe);
+ (*info->print_address_func) (target, info);
+ }
+ break;
+ case 'b':
+ {
+ /* Sign-extend a 20-bit number. */
+#define SEXT20(x) ((((x) & 0xfffff) ^ (~ 0x7ffff)) + 0x80000)
+ int disp = (given & 0x01ff8000) >> 5 | (given & 0x3fe);
+ int target = (pc + SEXT20 (disp));
+
+ (*info->print_address_func) (target, info);
+ }
+ break;
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ {
+ int bitstart = *c++ - '0';
+ int bitend = 0;
+
+ while (*c >= '0' && *c <= '9')
+ bitstart = (bitstart * 10) + *c++ - '0';
+
+ switch (*c)
+ {
+ case '-':
+ c++;
+ while (*c >= '0' && *c <= '9')
+ bitend = (bitend * 10) + *c++ - '0';
+
+ if (!bitend)
+ abort ();
+
+ switch (*c)
+ {
+ case 'r':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%s", score_regnames[reg]);
+ }
+ break;
+ case 'd':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'i':
+ {
+ long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ reg = ((reg ^ (1 << (bitend - bitstart)))
+ - (1 << (bitend - bitstart)));
+
+ if (((given & insn->mask) == 0x0c00000a) /* ldc1 */
+ || ((given & insn->mask) == 0x0c000012) /* ldc2 */
+ || ((given & insn->mask) == 0x0c00001c) /* ldc3 */
+ || ((given & insn->mask) == 0x0c00000b) /* stc1 */
+ || ((given & insn->mask) == 0x0c000013) /* stc2 */
+ || ((given & insn->mask) == 0x0c00001b)) /* stc3 */
+ reg *= 4;
+
+ func (stream, "%ld", reg);
+ }
+ break;
+ case 'x':
+ {
+ unsigned long reg;
+
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+
+ func (stream, "%lx", reg);
+ }
+ break;
+ default:
+ abort ();
+ }
+ break;
+ case '`':
+ c++;
+ if ((given & (1u << bitstart)) == 0)
+ func (stream, "%c", *c);
+ break;
+ case '\'':
+ c++;
+ if ((given & (1u << bitstart)) != 0)
+ func (stream, "%c", *c);
+ break;
+ default:
+ abort ();
+ }
+ break;
+ }
+ default:
abort ();
- }
- }
- else
- func (stream, "%c", *c);
- }
- return 4;
- }
+ }
+ }
+ else
+ func (stream, "%c", *c);
+ }
+ return 4;
+ }
}
#if (SCORE_SIMULATOR_ACTIVE)
for (insn = score_opcodes; insn->assembler; insn++)
{
if (!(insn->mask & 0xffff0000) && (given & insn->mask) == insn->value)
- {
- char *c = insn->assembler;
-
- info->bytes_per_chunk = 2;
- info->bytes_per_line = 4;
- given &= 0xffff;
-
- for (; *c; c++)
- {
- if (*c == '%')
- {
- switch (*++c)
- {
-
- case 'j':
- {
- int target;
-
- if (info->flags & INSN_HAS_RELOC)
- pc = 0;
-
- target = (pc & 0xfffff000) | (given & 0x00000ffe);
- (*info->print_address_func) (target, info);
- }
- break;
- case 'b':
- {
- /* Sign-extend a 9-bit number. */
-#define SEXT9(x) ((((x) & 0x1ff) ^ (~ 0xff)) + 0x100)
- int disp = (given & 0xff) << 1;
- int target = (pc + SEXT9 (disp));
-
- (*info->print_address_func) (target, info);
- }
- break;
-
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- {
- int bitstart = *c++ - '0';
- int bitend = 0;
-
- while (*c >= '0' && *c <= '9')
- bitstart = (bitstart * 10) + *c++ - '0';
-
- switch (*c)
- {
- case '-':
- {
- long reg;
-
- c++;
- while (*c >= '0' && *c <= '9')
- bitend = (bitend * 10) + *c++ - '0';
- if (!bitend)
- abort ();
- reg = given >> bitstart;
- reg &= (2 << (bitend - bitstart)) - 1;
- switch (*c)
- {
- case 'R':
- func (stream, "%s", score_regnames[reg + 16]);
- break;
- case 'r':
- func (stream, "%s", score_regnames[reg]);
- break;
- case 'd':
- if (*(c + 1) == '\0')
- func (stream, "%ld", reg);
- else
- {
- c++;
- if (*c == '1')
- func (stream, "%ld", reg << 1);
- else if (*c == '2')
- func (stream, "%ld", reg << 2);
- }
- break;
-
- case 'x':
- if (*(c + 1) == '\0')
- func (stream, "%lx", reg);
- else
- {
- c++;
- if (*c == '1')
- func (stream, "%lx", reg << 1);
- else if (*c == '2')
- func (stream, "%lx", reg << 2);
- }
- break;
- case 'i':
- reg = ((reg ^ (1 << bitend)) - (1 << bitend));
- func (stream, "%ld", reg);
- break;
- default:
- abort ();
- }
- }
- break;
-
- case '\'':
- c++;
- if ((given & (1 << bitstart)) != 0)
- func (stream, "%c", *c);
- break;
- default:
- abort ();
- }
- }
- break;
- default:
- abort ();
- }
- }
- else
- func (stream, "%c", *c);
- }
-
- return 2;
- }
+ {
+ char *c = insn->assembler;
+
+ info->bytes_per_chunk = 2;
+ info->bytes_per_line = 4;
+ given &= 0xffff;
+
+ for (; *c; c++)
+ {
+ if (*c == '%')
+ {
+ switch (*++c)
+ {
+
+ case 'j':
+ {
+ int target;
+
+ if (info->flags & INSN_HAS_RELOC)
+ pc = 0;
+
+ target = (pc & 0xfffff000) | (given & 0x00000ffe);
+ (*info->print_address_func) (target, info);
+ }
+ break;
+ case 'b':
+ {
+ /* Sign-extend a 9-bit number. */
+#define SEXT9(x) ((((x) & 0x1ff) ^ (~ 0xff)) + 0x100)
+ int disp = (given & 0xff) << 1;
+ int target = (pc + SEXT9 (disp));
+
+ (*info->print_address_func) (target, info);
+ }
+ break;
+
+ case '0':
+ case '1':
+ case '2':
+ case '3':
+ case '4':
+ case '5':
+ case '6':
+ case '7':
+ case '8':
+ case '9':
+ {
+ int bitstart = *c++ - '0';
+ int bitend = 0;
+
+ while (*c >= '0' && *c <= '9')
+ bitstart = (bitstart * 10) + *c++ - '0';
+
+ switch (*c)
+ {
+ case '-':
+ {
+ long reg;
+
+ c++;
+ while (*c >= '0' && *c <= '9')
+ bitend = (bitend * 10) + *c++ - '0';
+ if (!bitend)
+ abort ();
+ reg = given >> bitstart;
+ reg &= (2u << (bitend - bitstart)) - 1;
+ switch (*c)
+ {
+ case 'R':
+ func (stream, "%s", score_regnames[reg + 16]);
+ break;
+ case 'r':
+ func (stream, "%s", score_regnames[reg]);
+ break;
+ case 'd':
+ if (*(c + 1) == '\0')
+ func (stream, "%ld", reg);
+ else
+ {
+ c++;
+ if (*c == '1')
+ func (stream, "%ld", reg << 1);
+ else if (*c == '2')
+ func (stream, "%ld", reg << 2);
+ }
+ break;
+
+ case 'x':
+ if (*(c + 1) == '\0')
+ func (stream, "%lx", reg);
+ else
+ {
+ c++;
+ if (*c == '1')
+ func (stream, "%lx", reg << 1);
+ else if (*c == '2')
+ func (stream, "%lx", reg << 2);
+ }
+ break;
+ case 'i':
+ reg = ((reg ^ (1 << bitend)) - (1 << bitend));
+ func (stream, "%ld", reg);
+ break;
+ default:
+ abort ();
+ }
+ }
+ break;
+
+ case '\'':
+ c++;
+ if ((given & (1u << bitstart)) != 0)
+ func (stream, "%c", *c);
+ break;
+ default:
+ abort ();
+ }
+ }
+ break;
+ default:
+ abort ();
+ }
+ }
+ else
+ func (stream, "%c", *c);
+ }
+
+ return 2;
+ }
}
#if (SCORE_SIMULATOR_ACTIVE)
func (stream, _("<illegal instruction>"));
abort ();
}
-/*****************************************************************************/
/* s3_s7: exported functions. */
/* NOTE: There are no checks in these routines that
else
{
info->bytes_per_chunk = 4;
- status = info->read_memory_func (pc, (bfd_byte *) & b[0], 4, info);
+ status = info->read_memory_func (pc, (bfd_byte *) &b[0], 4, info);
if (status != 0)
- {
- info->bytes_per_chunk = 2;
- status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
- b[3] = b[2] = 0;
- insn_16_p = TRUE;
- }
+ {
+ info->bytes_per_chunk = 2;
+ status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
+ b[3] = b[2] = 0;
+ insn_16_p = TRUE;
+ }
}
if (status != 0)
}
if (little)
- {
- given = (b[0]) | (b[1] << 8) | (b[2] << 16) | ((unsigned) b[3] << 24);
- }
+ given = b[0] | b[1] << 8 | b[2] << 16 | (unsigned) b[3] << 24;
else
- {
- given = ((unsigned) b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
- }
+ given = (unsigned) b[0] << 24 | b[1] << 16 | b[2] << 8 | b[3];
if ((given & 0x80008000) == 0x80008000)
{
insn_16_p = FALSE;
}
else if ((given & 0x8000) == 0x8000)
- {
- insn_pce_p = TRUE;
- }
+ insn_pce_p = TRUE;
else
- {
- insn_16_p = TRUE;
- }
+ insn_16_p = TRUE;
/* 16 bit instruction. */
if (insn_16_p)
{
if (little)
- {
- given = b[0] | (b[1] << 8);
- }
+ given = b[0] | (b[1] << 8);
else
- {
- given = (b[0] << 8) | b[1];
- }
+ given = (b[0] << 8) | b[1];
status = print_insn_score16 (pc, info, given);
}
status = print_insn_score16 (pc, info, given);
print_insn_parallel_sym (info);
status += print_insn_score16 (pc, info, other);
- /* disassemble_bytes() will output 4 byte per chunk for pce instructio. */
+ /* disassemble_bytes() will output 4 byte per chunk for pce
+ instruction. */
info->bytes_per_chunk = 4;
}
/* 32 bit instruction. */
return status;
}
-
-/*****************************************************************************/
= (tic4x_register_t *)(tic4x_registers + i);
}
}
- if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX)
- || registertable[regno] == NULL)
+ if (regno > (IS_CPU_TIC4X (tic4x_version) ? TIC4X_REG_MAX : TIC3X_REG_MAX))
return 0;
if (info != NULL)
(*info->fprintf_func) (info->stream, "%s", registertable[regno]->name);
relAddr = XGATE_NINE_BITS >> 1; /* Clip sign bit. */
relAddr = ~relAddr; /* Make signed. */
relAddr |= (raw_code & 0xFF) + 1; /* Apply our value. */
- relAddr <<= 1; /* Multiply by two as per processor docs. */
+ relAddr *= 2; /* Multiply by two as per processor docs. */
}
else
{
relAddr = raw_code & 0xff;
- relAddr = (relAddr << 1) + 2;
+ relAddr = relAddr * 2 + 2;
}
(*info->fprintf_func)(info->stream, " *%d", relAddr);
(*info->fprintf_func)(info->stream, " Abs* 0x");
relAddr = XGATE_TEN_BITS >> 1; /* Clip sign bit. */
relAddr = ~relAddr; /* Make signed. */
relAddr |= (raw_code & 0x1FF) + 1; /* Apply our value. */
- relAddr <<= 1; /* Multiply by two as per processor docs. */
+ relAddr *= 2; /* Multiply by two as per processor docs. */
}
else
{
relAddr = raw_code & 0x1FF;
- relAddr = (relAddr << 1) + 2;
+ relAddr = relAddr * 2 + 2;
}
(*info->fprintf_func)(info->stream, " *%d", relAddr);
(*info->fprintf_func)(info->stream, " Abs* 0x");
unsigned int memory)
{
unsigned int currentBit;
- int operand;
+ unsigned int operand = 0;
int numBitsFound;
- for (operand = 0, numBitsFound = 0, currentBit = 1
- << ((opcodePTR->size * 8) - 1);
- (numBitsFound < numBitsRequested) && currentBit; currentBit >>= 1)
+ for (numBitsFound = 0, currentBit = 1u << ((opcodePTR->size * 8) - 1);
+ numBitsFound < numBitsRequested && currentBit != 0;
+ currentBit >>= 1)
{
if (currentBit & *operandBitsRemaining)
{
projects / deliverable / binutils-gdb.git / commitdiff
