.#define bfd_mach_amdgcn_gfx906 0x02f
.#define bfd_mach_amdgcn_gfx908 0x030
.#define bfd_mach_amdgcn_gfx909 0x031
+.#define bfd_mach_amdgcn_gfx1010 0x033
+.#define bfd_mach_amdgcn_gfx1011 0x034
+.#define bfd_mach_amdgcn_gfx1012 0x035
. bfd_arch_last
. };
*/
#define bfd_mach_amdgcn_gfx906 0x02f
#define bfd_mach_amdgcn_gfx908 0x030
#define bfd_mach_amdgcn_gfx909 0x031
+#define bfd_mach_amdgcn_gfx1010 0x033
+#define bfd_mach_amdgcn_gfx1011 0x034
+#define bfd_mach_amdgcn_gfx1012 0x035
bfd_arch_last
};
N (bfd_mach_amdgcn_gfx902, "amdgcn:gfx902", FALSE, NN(2)),
N (bfd_mach_amdgcn_gfx904, "amdgcn:gfx904", FALSE, NN(3)),
N (bfd_mach_amdgcn_gfx906, "amdgcn:gfx906", FALSE, NN(4)),
- N (bfd_mach_amdgcn_gfx908, "amdgcn:gfx908", FALSE, 0),
+ N (bfd_mach_amdgcn_gfx908, "amdgcn:gfx908", FALSE, NN(5)),
+ N (bfd_mach_amdgcn_gfx1010, "amdgcn:gfx1010", FALSE, NN(6)),
+ N (bfd_mach_amdgcn_gfx1011, "amdgcn:gfx1011", FALSE, NN(7)),
+ N (bfd_mach_amdgcn_gfx1012, "amdgcn:gfx1012", FALSE, 0),
};
const bfd_arch_info_type bfd_amdgcn_arch =
case 906: mach = bfd_mach_amdgcn_gfx906; break;
case 908: mach = bfd_mach_amdgcn_gfx908; break;
case 909: mach = bfd_mach_amdgcn_gfx909; break;
+ case 1010: mach = bfd_mach_amdgcn_gfx1010; break;
+ case 1011: mach = bfd_mach_amdgcn_gfx1011; break;
+ case 1012: mach = bfd_mach_amdgcn_gfx1012; break;
default: mach = bfd_mach_amdgcn_unknown; break;
}
}