-Wimplicit-fallthrough warning fixes
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
2016-10-05  Alan Modra-Wimplicit-fallthrough warning fixes
2016-09-30  H.J. LuDon't assign alt twice
2016-08-24  H.J. LuX86: Add ptwrite instruction
2016-06-03  H.J. LuHandle indirect branches for AMD64 and Intel64
2016-05-10  Alexander FominEnable Intel RDPID instruction.
2016-04-23  H.J. LuSkip if size of bfd_vma is smaller than address size
2016-02-16  H.J. LuAdd parentheses to prevent truncated addresses
2016-01-01  Alan ModraCopyright update for binutils
2015-12-09  H.J. LuImplement Intel OSPKE instructions
2015-08-24  Jan StancekFix the partial disassembly of a broken three byte...
2015-08-21  Alexander FominPR binutils/18257: Properly decode x86/Intel mask instr...
2015-07-30  H.J. LuProperly disassemble movnti in Intel mode
2015-07-23  Alan ModraFix ubsan signed integer overflow
2015-06-30  Amit PawarAdd support for monitorx/mwaitx instructions
2015-06-01  Jan Beulichx86/Intel: disassemble vcvt{,u}si2s{d,s} with correct...
2015-05-15  H.J. LuSupport AMD64/Intel ISAs in assembler/disassembler
2015-05-09  H.J. LuIgnore 0x66 prefix for call/jmp/jcc in 64-bit mode
2015-04-23  Jan Beulichx86: disambiguate disassembly of certain AVX512 insns
2015-04-15  H.J. LuRemove the unused PREFIX_UD_XXX
2015-04-15  H.J. LuCheck dp->prefix_requirement instead
2015-04-15  H.J. LuHandle invalid prefixes for rdrand and rdseed
2015-04-15  H.J. LuReplace mandatory_prefix with prefix_requirement
2015-04-06  Ilya Tocarx86: Use individual prefix control for each opcode.
2015-03-17  Ganesh Gopalasubra... Add znver1 processor
2015-01-01  Alan ModraChangeLog rotatation and copyright year update
2014-11-17  Ilya TocarAdd AVX512VBMI instructions
2014-11-17  Ilya TocarAdd AVX512IFMA instructions
2014-11-17  Ilya TocarAdd pcommit instruction
2014-11-17  Ilya TocarAdd clwb instruction
2014-09-22  H.J. LuIgnore MOD field for control/debug register move
2014-09-10  H.J. LuProperly handle suffix for iret and sysret
2014-07-22  Ilya TocarAdd AVX512DQ instructions and their AVX512VL variants.
2014-07-22  Ilya TocarAdd support for AVX512BW instructions and their AVX512V...
2014-07-22  Ilya TocarAdd support for AVX512VL. Add AVX512VL versions of...
2014-06-10  H.J. LuOnly print prefixes before fwait
2014-05-09  H.J. LuProperly display extra data/address size prefixes
2014-05-05  H.J. LuProperly handle multiple opcode prefixes
2014-05-02  H.J. LuUse sigsetjmp/siglongjmp in opcodes
2014-05-01  H.J. LuHandle prefixes before fwait
2014-04-04  Ilya TocarAdd support for Intel SGX instructions
2014-03-20  Ilya TocarFix memory size for gather/scatter instructions
2014-03-05  Alan ModraUpdate copyright years
2014-02-12  Ilya TocarAdd clflushopt, xsaves, xsavec, xrstors
2014-01-30  Michael ZolotukhinFix shift for AVX512F gather/scatter instructions
2014-01-09  Roland McGrathFix buffer underrun in i386-dis.c.
2013-12-17  Michael ZolotukhinProperly handle ljmp/lcall with invalid MODRM byte
2013-10-12  H.J. LuOnly allow 32-bit/64-bit registers for bndcl/bndcu...
2013-10-11  Roland McGrathopcodes/
2013-08-19  H.J. LuRemove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3F
2013-07-26  H.J. LuAdd Intel AVX-512 support
2013-07-25  H.J. LuSupport Intel SHA
2013-07-24  H.J. LuSupport Intel MPX
2013-03-27  H.J. LuProperly check address mode for SIB
2013-02-19  H.J. LuImplement Intel SMAP instructions
2012-10-24  Roland McGrathgas/testsuite/
2012-08-07  Roland McGrathgas/testsuite/
2012-08-06  Roland McGrathgas/testsuite/
2012-08-06  Roland McGrathgas/testsuite/
2012-07-19  H.J. LuUse vex_len_table in xop_table
2012-07-16  H.J. LuImplement RDRSEED, ADX and PRFCHW instructions
2012-02-08  H.J. LuImplement Intel Transactional Synchronization Extensions
2012-01-13  H.J. LuAdd vmfunc
2011-10-26  Nick Clifton PR binutils/13348
2011-08-02  Quentin Neillopcodes/
2011-08-01  H.J. LuCheck R_X86_64_32 overflow and allow R_X86_64_64 for...
2011-07-22  H.J. LuAdd initial Intel K1OM support.
2011-07-01  H.J. LuUpdate rorxS.
2011-06-30  H.J. LuFix rorx in BMI2.
2011-06-21  H.J. LuRe-indent prefix_table.
2011-06-10  H.J. LuSupport AVX Programming Reference (June, 2011).
2011-02-09  Michael Snyder2011-02-09 Michael Snyder <msnyder@vmware.com>
2011-01-18  H.J. LuProperly sign-extend byte.
2011-01-17  Quentin NeillAdd support for TBM instructions.
2011-01-05  H.J. LuImplement BMI instructions.
2011-01-04  H.J. LuAdd VexGdq.
2010-12-31  H.J. LuAdd x86-64 ILP32 support.
2010-10-02  H.J. LuRemove duplicated RMAL.
2010-08-31  H.J. LuFix "pushw imm16" for x86-64 disassembler.
2010-08-17  H.J. LuReplace Eb with Mb on prefetch and prefetchw.
2010-08-06  H.J. LuAdd ud1 to x86.
2010-07-28  H.J. LuAdd 0F to VEX opcode enums.
2010-07-05  H.J. LuReplace rdrnd with rdrand.
2010-07-01  H.J. LuSupport AVX Programming Reference (June, 2010)
2010-05-26  H.J. LuAdd SIB.
2010-04-16  H.J. LuRemove extra breack.
2010-04-16  H.J. LuReturn bad_opcode on unknown bits in opcode.
2010-04-09  Nick Cliftonbfd/ChangeLog
2010-03-23  Sebastian Pop2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
2010-02-11  H.J. LuUpdate copyright.
2010-02-11  Sebastian Pop2010-02-10 Quentin Neill <quentin.neill@amd.com>
2010-01-28  H.J. LuAllow VL=1 on scalar FMA instructions.
2010-01-27  H.J. LuAllow VL=1 on AVX scalar instructions.
2010-01-24  H.J. LuRemove trailing { Bad_Opcode }.
2010-01-24  H.J. LuRemove trailing { Bad_Opcode } in vex_len_table.
2010-01-24  H.J. LuRemove trailing { Bad_Opcode }.
2010-01-24  H.J. LuRemove trailing "(bad)" entries and replace { "(bad...
2010-01-21  H.J. LuAdd xsave64 and xrstor64.
2010-01-14  H.J. LuAdd names_mm, names_xmm and names_ymm.
2010-01-13  H.J. LuUpdate comments
2010-01-13  H.J. LuRemove rex_original
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