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[ARC] Improve parsing instruction operands.
2020-01-07  Claudiu Zissulescu[ARC] Improve parsing instruction operands.
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2020-01-07  Shahab Vahedi[ARC] Add finer details for LLOCK and SCOND
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2019-08-30  Claudiu Zissulescu[ARC] [COMMITTED] Fix FASTMATH field.
2019-08-30 Claudiu Zissulescu <claziss@gmail.com>
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2019-07-24  Claudiu Zissulescu[ARC] [COMMITTED] Fix formatting.
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2019-07-24  Claudiu Zissulescu[ARC] Update disassembler opcode selection
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2019-07-24  Claudiu Zissulescu[ARC] Update ARC opcode table
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2019-07-24  Claudiu Zissulescu[ARC] Add linker relaxation.
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2019-02-09  Claudiu Zissulescu[ARC] don't force _init/_fini as DT_INIT/DT_FINI.
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2018-11-09  Claudiu Zissulescu[ARC] Update ld tests.
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2018-11-09  Claudiu Zissulescu[ARC] Fix local got entry list.
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2018-08-06  Claudiu ZissulescuUpdate binutils/MAINTAINERS for ARC.
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2018-08-06  claziss[ARC] Check if an input asm file is rf16 compliant
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2018-08-06  Claudiu Zissulescu[ARC] Update warning reporting.
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2018-08-06  claziss[ARC] Update merging attributes.
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2018-08-06  claziss[ARC] Add Tag_ARC_ATR_version.
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2018-08-06  claziss[ARC] Update handling AUX-registers.
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2018-07-23  Claudiu Zissulescu[ARC] Fix decoding of w6 signed short immediate.
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2018-07-23  Claudiu Zissulescu[ARC] Allow vewt instruction for ARC EM family.
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2018-07-23  claziss[ARC] Fix case-sensitivity for extension instructions.
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GDB Binutils - Deliverables
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