Fix: rseq: arm branch to failure
[deliverable/linux.git] / Documentation / DMA-API.txt
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1 Dynamic DMA mapping using the generic device
2 ============================================
3
4 James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
5
6This document describes the DMA API. For a more gentle introduction
77f2ea2f 7of the API (and actual examples), see Documentation/DMA-API-HOWTO.txt.
1da177e4 8
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9This API is split into two pieces. Part I describes the basic API.
10Part II describes extensions for supporting non-consistent memory
11machines. Unless you know that your driver absolutely has to support
12non-consistent platforms (this is usually only legacy platforms) you
13should only use the API described in part I.
1da177e4 14
f5a69f4c 15Part I - dma_ API
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16-------------------------------------
17
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18To get the dma_ API, you must #include <linux/dma-mapping.h>. This
19provides dma_addr_t and the interfaces described below.
1da177e4 20
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21A dma_addr_t can hold any valid DMA address for the platform. It can be
22given to a device to use as a DMA source or target. A CPU cannot reference
23a dma_addr_t directly because there may be translation between its physical
24address space and the DMA address space.
1da177e4 25
77f2ea2f 26Part Ia - Using large DMA-coherent buffers
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27------------------------------------------
28
29void *
30dma_alloc_coherent(struct device *dev, size_t size,
a12e2c6c 31 dma_addr_t *dma_handle, gfp_t flag)
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32
33Consistent memory is memory for which a write by either the device or
34the processor can immediately be read by the processor or device
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35without having to worry about caching effects. (You may however need
36to make sure to flush the processor's write buffers before telling
37devices to read that memory.)
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38
39This routine allocates a region of <size> bytes of consistent memory.
1da177e4 40
77f2ea2f 41It returns a pointer to the allocated region (in the processor's virtual
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42address space) or NULL if the allocation failed.
43
77f2ea2f 44It also returns a <dma_handle> which may be cast to an unsigned integer the
3a9ad0b4 45same width as the bus and given to the device as the DMA address base of
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46the region.
47
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48Note: consistent memory can be expensive on some platforms, and the
49minimum allocation length may be as big as a page, so you should
50consolidate your requests for consistent memory as much as possible.
51The simplest way to do that is to use the dma_pool calls (see below).
52
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53The flag parameter (dma_alloc_coherent() only) allows the caller to
54specify the GFP_ flags (see kmalloc()) for the allocation (the
a12e2c6c 55implementation may choose to ignore flags that affect the location of
f5a69f4c 56the returned memory, like GFP_DMA).
1da177e4 57
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58void *
59dma_zalloc_coherent(struct device *dev, size_t size,
60 dma_addr_t *dma_handle, gfp_t flag)
61
62Wraps dma_alloc_coherent() and also zeroes the returned memory if the
63allocation attempt succeeded.
64
1da177e4 65void
a12e2c6c 66dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
1da177e4 67 dma_addr_t dma_handle)
1da177e4 68
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69Free a region of consistent memory you previously allocated. dev,
70size and dma_handle must all be the same as those passed into
71dma_alloc_coherent(). cpu_addr must be the virtual address returned by
72the dma_alloc_coherent().
1da177e4 73
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74Note that unlike their sibling allocation calls, these routines
75may only be called with IRQs enabled.
76
1da177e4 77
77f2ea2f 78Part Ib - Using small DMA-coherent buffers
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79------------------------------------------
80
81To get this part of the dma_ API, you must #include <linux/dmapool.h>
82
77f2ea2f 83Many drivers need lots of small DMA-coherent memory regions for DMA
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84descriptors or I/O buffers. Rather than allocating in units of a page
85or more using dma_alloc_coherent(), you can use DMA pools. These work
77f2ea2f 86much like a struct kmem_cache, except that they use the DMA-coherent allocator,
1da177e4 87not __get_free_pages(). Also, they understand common hardware constraints
a12e2c6c 88for alignment, like queue heads needing to be aligned on N-byte boundaries.
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89
90
91 struct dma_pool *
92 dma_pool_create(const char *name, struct device *dev,
93 size_t size, size_t align, size_t alloc);
94
77f2ea2f 95dma_pool_create() initializes a pool of DMA-coherent buffers
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96for use with a given device. It must be called in a context which
97can sleep.
98
e18b890b 99The "name" is for diagnostics (like a struct kmem_cache name); dev and size
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100are like what you'd pass to dma_alloc_coherent(). The device's hardware
101alignment requirement for this type of data is "align" (which is expressed
102in bytes, and must be a power of two). If your device has no boundary
103crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated
104from this pool must not cross 4KByte boundaries.
105
106
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107 void *dma_pool_zalloc(struct dma_pool *pool, gfp_t mem_flags,
108 dma_addr_t *handle)
109
110Wraps dma_pool_alloc() and also zeroes the returned memory if the
111allocation attempt succeeded.
112
113
a12e2c6c 114 void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
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115 dma_addr_t *dma_handle);
116
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117This allocates memory from the pool; the returned memory will meet the
118size and alignment requirements specified at creation time. Pass
119GFP_ATOMIC to prevent blocking, or if it's permitted (not
120in_interrupt, not holding SMP locks), pass GFP_KERNEL to allow
121blocking. Like dma_alloc_coherent(), this returns two values: an
f311a724 122address usable by the CPU, and the DMA address usable by the pool's
77f2ea2f 123device.
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124
125
126 void dma_pool_free(struct dma_pool *pool, void *vaddr,
127 dma_addr_t addr);
128
1da177e4 129This puts memory back into the pool. The pool is what was passed to
f311a724 130dma_pool_alloc(); the CPU (vaddr) and DMA addresses are what
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131were returned when that routine allocated the memory being freed.
132
133
134 void dma_pool_destroy(struct dma_pool *pool);
135
77f2ea2f 136dma_pool_destroy() frees the resources of the pool. It must be
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137called in a context which can sleep. Make sure you've freed all allocated
138memory back to the pool before you destroy it.
139
140
141Part Ic - DMA addressing limitations
142------------------------------------
143
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144int
145dma_set_mask_and_coherent(struct device *dev, u64 mask)
146
147Checks to see if the mask is possible and updates the device
148streaming and coherent DMA mask parameters if it is.
149
150Returns: 0 if successful and a negative error if not.
151
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152int
153dma_set_mask(struct device *dev, u64 mask)
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154
155Checks to see if the mask is possible and updates the device
156parameters if it is.
157
158Returns: 0 if successful and a negative error if not.
159
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160int
161dma_set_coherent_mask(struct device *dev, u64 mask)
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162
163Checks to see if the mask is possible and updates the device
164parameters if it is.
165
166Returns: 0 if successful and a negative error if not.
167
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168u64
169dma_get_required_mask(struct device *dev)
170
175add19
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171This API returns the mask that the platform requires to
172operate efficiently. Usually this means the returned mask
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173is the minimum required to cover all of memory. Examining the
174required mask gives drivers with variable descriptor sizes the
175opportunity to use smaller descriptors as necessary.
176
177Requesting the required mask does not alter the current mask. If you
175add19
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178wish to take advantage of it, you should issue a dma_set_mask()
179call to set the mask to the value returned.
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180
181
182Part Id - Streaming DMA mappings
183--------------------------------
184
185dma_addr_t
186dma_map_single(struct device *dev, void *cpu_addr, size_t size,
187 enum dma_data_direction direction)
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188
189Maps a piece of processor virtual memory so it can be accessed by the
3a9ad0b4 190device and returns the DMA address of the memory.
1da177e4 191
77f2ea2f 192The direction for both APIs may be converted freely by casting.
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193However the dma_ API uses a strongly typed enumerator for its
194direction:
195
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196DMA_NONE no direction (used for debugging)
197DMA_TO_DEVICE data is going from the memory to the device
198DMA_FROM_DEVICE data is coming from the device to the memory
199DMA_BIDIRECTIONAL direction isn't known
1da177e4 200
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201Notes: Not all memory regions in a machine can be mapped by this API.
202Further, contiguous kernel virtual space may not be contiguous as
203physical memory. Since this API does not provide any scatter/gather
204capability, it will fail if the user tries to map a non-physically
205contiguous piece of memory. For this reason, memory to be mapped by
206this API should be obtained from sources which guarantee it to be
207physically contiguous (like kmalloc).
208
3a9ad0b4 209Further, the DMA address of the memory must be within the
77f2ea2f 210dma_mask of the device (the dma_mask is a bit mask of the
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211addressable region for the device, i.e., if the DMA address of
212the memory ANDed with the dma_mask is still equal to the DMA
77f2ea2f 213address, then the device can perform DMA to the memory). To
1da177e4 214ensure that the memory allocated by kmalloc is within the dma_mask,
a12e2c6c 215the driver may specify various platform-dependent flags to restrict
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216the DMA address range of the allocation (e.g., on x86, GFP_DMA
217guarantees to be within the first 16MB of available DMA addresses,
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218as required by ISA devices).
219
220Note also that the above constraints on physical contiguity and
221dma_mask may not apply if the platform has an IOMMU (a device which
3a9ad0b4 222maps an I/O DMA address to a physical memory address). However, to be
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223portable, device driver writers may *not* assume that such an IOMMU
224exists.
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225
226Warnings: Memory coherency operates at a granularity called the cache
227line width. In order for memory mapped by this API to operate
228correctly, the mapped region must begin exactly on a cache line
229boundary and end exactly on one (to prevent two separately mapped
230regions from sharing a single cache line). Since the cache line size
231may not be known at compile time, the API will not enforce this
232requirement. Therefore, it is recommended that driver writers who
233don't take special care to determine the cache line size at run time
234only map virtual regions that begin and end on page boundaries (which
235are guaranteed also to be cache line boundaries).
236
237DMA_TO_DEVICE synchronisation must be done after the last modification
238of the memory region by the software and before it is handed off to
000afe89 239the device. Once this primitive is used, memory covered by this
a12e2c6c 240primitive should be treated as read-only by the device. If the device
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241may write to it at any point, it should be DMA_BIDIRECTIONAL (see
242below).
243
244DMA_FROM_DEVICE synchronisation must be done before the driver
245accesses data that may be changed by the device. This memory should
a12e2c6c 246be treated as read-only by the driver. If the driver needs to write
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247to it at any point, it should be DMA_BIDIRECTIONAL (see below).
248
249DMA_BIDIRECTIONAL requires special handling: it means that the driver
250isn't sure if the memory was modified before being handed off to the
251device and also isn't sure if the device will also modify it. Thus,
252you must always sync bidirectional memory twice: once before the
253memory is handed off to the device (to make sure all memory changes
254are flushed from the processor) and once before the data may be
255accessed after being used by the device (to make sure any processor
a12e2c6c 256cache lines are updated with data that the device may have changed).
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257
258void
259dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
260 enum dma_data_direction direction)
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261
262Unmaps the region previously mapped. All the parameters passed in
263must be identical to those passed in (and returned) by the mapping
264API.
265
266dma_addr_t
267dma_map_page(struct device *dev, struct page *page,
268 unsigned long offset, size_t size,
269 enum dma_data_direction direction)
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270void
271dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
272 enum dma_data_direction direction)
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273
274API for mapping and unmapping for pages. All the notes and warnings
275for the other mapping APIs apply here. Also, although the <offset>
276and <size> parameters are provided to do partial page mapping, it is
277recommended that you never use these unless you really know what the
278cache width is.
279
280int
8d8bb39b 281dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
1da177e4 282
77f2ea2f 283In some circumstances dma_map_single() and dma_map_page() will fail to create
1da177e4 284a mapping. A driver can check for these errors by testing the returned
77f2ea2f 285DMA address with dma_mapping_error(). A non-zero return value means the mapping
a12e2c6c 286could not be created and the driver should take appropriate action (e.g.
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287reduce current DMA mapping usage or delay and try again later).
288
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289 int
290 dma_map_sg(struct device *dev, struct scatterlist *sg,
291 int nents, enum dma_data_direction direction)
1da177e4 292
3a9ad0b4 293Returns: the number of DMA address segments mapped (this may be shorter
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294than <nents> passed in if some elements of the scatter/gather list are
295physically or virtually adjacent and an IOMMU maps them with a single
296entry).
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297
298Please note that the sg cannot be mapped again if it has been mapped once.
299The mapping process is allowed to destroy information in the sg.
300
77f2ea2f 301As with the other mapping interfaces, dma_map_sg() can fail. When it
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302does, 0 is returned and a driver must take appropriate action. It is
303critical that the driver do something, in the case of a block driver
304aborting the request or even oopsing is better than doing nothing and
305corrupting the filesystem.
306
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307With scatterlists, you use the resulting mapping like this:
308
309 int i, count = dma_map_sg(dev, sglist, nents, direction);
310 struct scatterlist *sg;
311
79eb0145 312 for_each_sg(sglist, sg, count, i) {
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313 hw_address[i] = sg_dma_address(sg);
314 hw_len[i] = sg_dma_len(sg);
315 }
316
317where nents is the number of entries in the sglist.
318
319The implementation is free to merge several consecutive sglist entries
320into one (e.g. with an IOMMU, or if several pages just happen to be
321physically contiguous) and returns the actual number of sg entries it
322mapped them to. On failure 0, is returned.
323
324Then you should loop count times (note: this can be less than nents times)
325and use sg_dma_address() and sg_dma_len() macros where you previously
326accessed sg->address and sg->length as shown above.
327
328 void
329 dma_unmap_sg(struct device *dev, struct scatterlist *sg,
7bc590b2 330 int nents, enum dma_data_direction direction)
1da177e4 331
a12e2c6c 332Unmap the previously mapped scatter/gather list. All the parameters
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333must be the same as those and passed in to the scatter/gather mapping
334API.
335
336Note: <nents> must be the number you passed in, *not* the number of
3a9ad0b4 337DMA address entries returned.
1da177e4 338
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339void
340dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
341 enum dma_data_direction direction)
342void
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343dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
344 enum dma_data_direction direction)
345void
7bc590b2 346dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
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347 enum dma_data_direction direction)
348void
7bc590b2 349dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
9705ef7e 350 enum dma_data_direction direction)
9705ef7e 351
f311a724 352Synchronise a single contiguous or scatter/gather mapping for the CPU
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353and device. With the sync_sg API, all the parameters must be the same
354as those passed into the single mapping API. With the sync_single API,
355you can use dma_handle and size parameters that aren't identical to
356those passed into the single mapping API to do a partial sync.
357
358Notes: You must do this:
359
360- Before reading values that have been written by DMA from the device
361 (use the DMA_FROM_DEVICE direction)
362- After writing values that will be written to the device using DMA
363 (use the DMA_TO_DEVICE) direction
364- before *and* after handing memory to the device if the memory is
365 DMA_BIDIRECTIONAL
366
367See also dma_map_single().
368
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369dma_addr_t
370dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size,
371 enum dma_data_direction dir,
00085f1e 372 unsigned long attrs)
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373
374void
375dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr,
376 size_t size, enum dma_data_direction dir,
00085f1e 377 unsigned long attrs)
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378
379int
380dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
381 int nents, enum dma_data_direction dir,
00085f1e 382 unsigned long attrs)
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383
384void
385dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
386 int nents, enum dma_data_direction dir,
00085f1e 387 unsigned long attrs)
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388
389The four functions above are just like the counterpart functions
390without the _attrs suffixes, except that they pass an optional
00085f1e 391dma_attrs.
a75b0a2f 392
77f2ea2f 393The interpretation of DMA attributes is architecture-specific, and
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394each attribute should be documented in Documentation/DMA-attributes.txt.
395
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396If dma_attrs are 0, the semantics of each of these functions
397is identical to those of the corresponding function
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398without the _attrs suffix. As a result dma_map_single_attrs()
399can generally replace dma_map_single(), etc.
400
401As an example of the use of the *_attrs functions, here's how
402you could pass an attribute DMA_ATTR_FOO when mapping memory
403for DMA:
404
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405#include <linux/dma-mapping.h>
406/* DMA_ATTR_FOO should be defined in linux/dma-mapping.h and
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407 * documented in Documentation/DMA-attributes.txt */
408...
409
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410 unsigned long attr;
411 attr |= DMA_ATTR_FOO;
a75b0a2f 412 ....
00085f1e 413 n = dma_map_sg_attrs(dev, sg, nents, DMA_TO_DEVICE, attr);
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414 ....
415
416Architectures that care about DMA_ATTR_FOO would check for its
417presence in their implementations of the mapping and unmapping
418routines, e.g.:
419
420void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
421 size_t size, enum dma_data_direction dir,
00085f1e 422 unsigned long attrs)
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423{
424 ....
00085f1e 425 if (attrs & DMA_ATTR_FOO)
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426 /* twizzle the frobnozzle */
427 ....
428
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429
430Part II - Advanced dma_ usage
431-----------------------------
432
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433Warning: These pieces of the DMA API should not be used in the
434majority of cases, since they cater for unlikely corner cases that
435don't belong in usual drivers.
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436
437If you don't understand how cache line coherency works between a
438processor and an I/O device, you should not be using this part of the
439API at all.
440
441void *
442dma_alloc_noncoherent(struct device *dev, size_t size,
a12e2c6c 443 dma_addr_t *dma_handle, gfp_t flag)
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444
445Identical to dma_alloc_coherent() except that the platform will
446choose to return either consistent or non-consistent memory as it sees
447fit. By using this API, you are guaranteeing to the platform that you
448have all the correct and necessary sync points for this memory in the
449driver should it choose to return non-consistent memory.
450
451Note: where the platform can return consistent memory, it will
452guarantee that the sync points become nops.
453
454Warning: Handling non-consistent memory is a real pain. You should
77f2ea2f 455only use this API if you positively know your driver will be
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456required to work on one of the rare (usually non-PCI) architectures
457that simply cannot make consistent memory.
458
459void
460dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
461 dma_addr_t dma_handle)
462
a12e2c6c 463Free memory allocated by the nonconsistent API. All parameters must
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464be identical to those passed in (and returned by
465dma_alloc_noncoherent()).
466
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467int
468dma_get_cache_alignment(void)
469
a12e2c6c 470Returns the processor cache alignment. This is the absolute minimum
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471alignment *and* width that you must observe when either mapping
472memory or doing partial flushes.
473
474Notes: This API may return a number *larger* than the actual cache
475line, but it will guarantee that one or more cache lines fit exactly
476into the width returned by this call. It will also always be a power
a12e2c6c 477of two for easy alignment.
1da177e4 478
1da177e4 479void
d3fa72e4 480dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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481 enum dma_data_direction direction)
482
483Do a partial sync of memory that was allocated by
484dma_alloc_noncoherent(), starting at virtual address vaddr and
485continuing on for size. Again, you *must* observe the cache line
486boundaries when doing this.
487
488int
88a984ba 489dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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490 dma_addr_t device_addr, size_t size, int
491 flags)
492
77f2ea2f 493Declare region of memory to be handed out by dma_alloc_coherent() when
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494it's asked for coherent memory for this device.
495
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496phys_addr is the CPU physical address to which the memory is currently
497assigned (this will be ioremapped so the CPU can access the region).
1da177e4 498
3a9ad0b4 499device_addr is the DMA address the device needs to be programmed
88a984ba 500with to actually address this memory (this will be handed out as the
a12e2c6c 501dma_addr_t in dma_alloc_coherent()).
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502
503size is the size of the area (must be multiples of PAGE_SIZE).
504
77f2ea2f 505flags can be ORed together and are:
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506
507DMA_MEMORY_MAP - request that the memory returned from
4ae0edc2 508dma_alloc_coherent() be directly writable.
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509
510DMA_MEMORY_IO - request that the memory returned from
77f2ea2f 511dma_alloc_coherent() be addressable using read()/write()/memcpy_toio() etc.
1da177e4 512
a12e2c6c 513One or both of these flags must be present.
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514
515DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by
516dma_alloc_coherent of any child devices of this one (for memory residing
517on a bridge).
518
519DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
520Do not allow dma_alloc_coherent() to fall back to system memory when
521it's out of memory in the declared region.
522
523The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
524must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
525if only DMA_MEMORY_MAP were passed in) for success or zero for
526failure.
527
528Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
529dma_alloc_coherent() may no longer be accessed directly, but instead
530must be accessed using the correct bus functions. If your driver
531isn't prepared to handle this contingency, it should not specify
532DMA_MEMORY_IO in the input flags.
533
534As a simplification for the platforms, only *one* such region of
535memory may be declared per device.
536
537For reasons of efficiency, most platforms choose to track the declared
538region only at the granularity of a page. For smaller allocations,
539you should use the dma_pool() API.
540
541void
542dma_release_declared_memory(struct device *dev)
543
544Remove the memory region previously declared from the system. This
545API performs *no* in-use checking for this region and will return
546unconditionally having removed all the required structures. It is the
a12e2c6c 547driver's job to ensure that no parts of this memory region are
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548currently in use.
549
550void *
551dma_mark_declared_memory_occupied(struct device *dev,
552 dma_addr_t device_addr, size_t size)
553
554This is used to occupy specific regions of the declared space
555(dma_alloc_coherent() will hand out the first free region it finds).
556
a12e2c6c 557device_addr is the *device* address of the region requested.
1da177e4 558
a12e2c6c 559size is the size (and should be a page-sized multiple).
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560
561The return value will be either a pointer to the processor virtual
562address of the memory, or an error (via PTR_ERR()) if any part of the
563region is occupied.
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564
565Part III - Debug drivers use of the DMA-API
566-------------------------------------------
567
77f2ea2f 568The DMA-API as described above has some constraints. DMA addresses must be
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569released with the corresponding function with the same size for example. With
570the advent of hardware IOMMUs it becomes more and more important that drivers
571do not violate those constraints. In the worst case such a violation can
572result in data corruption up to destroyed filesystems.
573
574To debug drivers and find bugs in the usage of the DMA-API checking code can
575be compiled into the kernel which will tell the developer about those
576violations. If your architecture supports it you can select the "Enable
577debugging of DMA-API usage" option in your kernel configuration. Enabling this
578option has a performance impact. Do not enable it in production kernels.
579
580If you boot the resulting kernel will contain code which does some bookkeeping
581about what DMA memory was allocated for which device. If this code detects an
582error it prints a warning message with some details into your kernel log. An
583example warning message may look like this:
584
585------------[ cut here ]------------
586WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
587 check_unmap+0x203/0x490()
588Hardware name:
589forcedeth 0000:00:08.0: DMA-API: device driver frees DMA memory with wrong
590 function [device address=0x00000000640444be] [size=66 bytes] [mapped as
591single] [unmapped as page]
592Modules linked in: nfsd exportfs bridge stp llc r8169
593Pid: 0, comm: swapper Tainted: G W 2.6.28-dmatest-09289-g8bb99c0 #1
594Call Trace:
595 <IRQ> [<ffffffff80240b22>] warn_slowpath+0xf2/0x130
596 [<ffffffff80647b70>] _spin_unlock+0x10/0x30
597 [<ffffffff80537e75>] usb_hcd_link_urb_to_ep+0x75/0xc0
598 [<ffffffff80647c22>] _spin_unlock_irqrestore+0x12/0x40
599 [<ffffffff8055347f>] ohci_urb_enqueue+0x19f/0x7c0
600 [<ffffffff80252f96>] queue_work+0x56/0x60
601 [<ffffffff80237e10>] enqueue_task_fair+0x20/0x50
602 [<ffffffff80539279>] usb_hcd_submit_urb+0x379/0xbc0
603 [<ffffffff803b78c3>] cpumask_next_and+0x23/0x40
604 [<ffffffff80235177>] find_busiest_group+0x207/0x8a0
605 [<ffffffff8064784f>] _spin_lock_irqsave+0x1f/0x50
606 [<ffffffff803c7ea3>] check_unmap+0x203/0x490
607 [<ffffffff803c8259>] debug_dma_unmap_page+0x49/0x50
608 [<ffffffff80485f26>] nv_tx_done_optimized+0xc6/0x2c0
609 [<ffffffff80486c13>] nv_nic_irq_optimized+0x73/0x2b0
610 [<ffffffff8026df84>] handle_IRQ_event+0x34/0x70
611 [<ffffffff8026ffe9>] handle_edge_irq+0xc9/0x150
612 [<ffffffff8020e3ab>] do_IRQ+0xcb/0x1c0
613 [<ffffffff8020c093>] ret_from_intr+0x0/0xa
614 <EOI> <4>---[ end trace f6435a98e2a38c0e ]---
615
616The driver developer can find the driver and the device including a stacktrace
617of the DMA-API call which caused this warning.
618
619Per default only the first error will result in a warning message. All other
620errors will only silently counted. This limitation exist to prevent the code
621from flooding your kernel log. To support debugging a device driver this can
622be disabled via debugfs. See the debugfs interface documentation below for
623details.
624
625The debugfs directory for the DMA-API debugging code is called dma-api/. In
626this directory the following files can currently be found:
627
628 dma-api/all_errors This file contains a numeric value. If this
629 value is not equal to zero the debugging code
630 will print a warning for every error it finds
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631 into the kernel log. Be careful with this
632 option, as it can easily flood your logs.
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633
634 dma-api/disabled This read-only file contains the character 'Y'
635 if the debugging code is disabled. This can
636 happen when it runs out of memory or if it was
637 disabled at boot time
638
639 dma-api/error_count This file is read-only and shows the total
640 numbers of errors found.
641
642 dma-api/num_errors The number in this file shows how many
643 warnings will be printed to the kernel log
644 before it stops. This number is initialized to
645 one at system boot and be set by writing into
646 this file
647
648 dma-api/min_free_entries
649 This read-only file can be read to get the
650 minimum number of free dma_debug_entries the
651 allocator has ever seen. If this value goes
652 down to zero the code will disable itself
653 because it is not longer reliable.
654
655 dma-api/num_free_entries
656 The current number of free dma_debug_entries
657 in the allocator.
658
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659 dma-api/driver-filter
660 You can write a name of a driver into this file
661 to limit the debug output to requests from that
662 particular driver. Write an empty string to
663 that file to disable the filter and see
664 all errors again.
665
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666If you have this code compiled into your kernel it will be enabled by default.
667If you want to boot without the bookkeeping anyway you can provide
668'dma_debug=off' as a boot parameter. This will disable DMA-API debugging.
669Notice that you can not enable it again at runtime. You have to reboot to do
670so.
671
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672If you want to see debug messages only for a special device driver you can
673specify the dma_debug_driver=<drivername> parameter. This will enable the
674driver filter at boot time. The debug code will only print errors for that
675driver afterwards. This filter can be disabled or changed later using debugfs.
676
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677When the code disables itself at runtime this is most likely because it ran
678out of dma_debug_entries. These entries are preallocated at boot. The number
679of preallocated entries is defined per architecture. If it is too low for you
680boot with 'dma_debug_entries=<your_desired_number>' to overwrite the
681architectural default.
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682
683void debug_dmap_mapping_error(struct device *dev, dma_addr_t dma_addr);
684
685dma-debug interface debug_dma_mapping_error() to debug drivers that fail
77f2ea2f 686to check DMA mapping errors on addresses returned by dma_map_single() and
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687dma_map_page() interfaces. This interface clears a flag set by
688debug_dma_map_page() to indicate that dma_mapping_error() has been called by
689the driver. When driver does unmap, debug_dma_unmap() checks the flag and if
690this flag is still set, prints warning message that includes call trace that
691leads up to the unmap. This interface can be called from dma_mapping_error()
77f2ea2f 692routines to enable DMA mapping error check debugging.
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