[deliverable/linux.git] / arch / arm64 / kernel / debug-monitors.c

/*
 * ARMv8 single-step debug support and mdscr context switching.
 *
 * Copyright (C) 2012 ARM Limited
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 *
 * Author: Will Deacon <will.deacon@arm.com>
 */

#include <linux/cpu.h>
#include <linux/debugfs.h>
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/ptrace.h>
#include <linux/stat.h>
#include <linux/uaccess.h>

#include <asm/debug-monitors.h>
#include <asm/cputype.h>
#include <asm/system_misc.h>

/* Determine debug architecture. */
u8 debug_monitors_arch(void)
{
	return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
}

/*
 * MDSCR access routines.
 */
static void mdscr_write(u32 mdscr)
{
	unsigned long flags;
	local_dbg_save(flags);
	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
	local_dbg_restore(flags);
}

static u32 mdscr_read(void)
{
	u32 mdscr;
	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
	return mdscr;
}

/*
 * Allow root to disable self-hosted debug from userspace.
 * This is useful if you want to connect an external JTAG debugger.
 */
static u32 debug_enabled = 1;

static int create_debug_debugfs_entry(void)
{
	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
	return 0;
}
fs_initcall(create_debug_debugfs_entry);

static int __init early_debug_disable(char *buf)
{
	debug_enabled = 0;
	return 0;
}

early_param("nodebugmon", early_debug_disable);

/*
 * Keep track of debug users on each core.
 * The ref counts are per-cpu so we use a local_t type.
 */
static DEFINE_PER_CPU(int, mde_ref_count);
static DEFINE_PER_CPU(int, kde_ref_count);

void enable_debug_monitors(enum dbg_active_el el)
{
	u32 mdscr, enable = 0;

	WARN_ON(preemptible());

	if (this_cpu_inc_return(mde_ref_count) == 1)
		enable = DBG_MDSCR_MDE;

	if (el == DBG_ACTIVE_EL1 &&
	    this_cpu_inc_return(kde_ref_count) == 1)
		enable |= DBG_MDSCR_KDE;

	if (enable && debug_enabled) {
		mdscr = mdscr_read();
		mdscr |= enable;
		mdscr_write(mdscr);
	}
}

void disable_debug_monitors(enum dbg_active_el el)
{
	u32 mdscr, disable = 0;

	WARN_ON(preemptible());

	if (this_cpu_dec_return(mde_ref_count) == 0)
		disable = ~DBG_MDSCR_MDE;

	if (el == DBG_ACTIVE_EL1 &&
	    this_cpu_dec_return(kde_ref_count) == 0)
		disable &= ~DBG_MDSCR_KDE;

	if (disable) {
		mdscr = mdscr_read();
		mdscr &= disable;
		mdscr_write(mdscr);
	}
}

/*
 * OS lock clearing.
 */
static void clear_os_lock(void *unused)
{
	asm volatile("msr oslar_el1, %0" : : "r" (0));
}

static int os_lock_notify(struct notifier_block *self,
				    unsigned long action, void *data)
{
	int cpu = (unsigned long)data;
	if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
		smp_call_function_single(cpu, clear_os_lock, NULL, 1);
	return NOTIFY_OK;
}

static struct notifier_block os_lock_nb = {
	.notifier_call = os_lock_notify,
};

static int debug_monitors_init(void)
{
	cpu_notifier_register_begin();

	/* Clear the OS lock. */
	on_each_cpu(clear_os_lock, NULL, 1);
	isb();
	local_dbg_enable();

	/* Register hotplug handler. */
	__register_cpu_notifier(&os_lock_nb);

	cpu_notifier_register_done();
	return 0;
}
postcore_initcall(debug_monitors_init);

/*
 * Single step API and exception handling.
 */
static void set_regs_spsr_ss(struct pt_regs *regs)
{
	unsigned long spsr;

	spsr = regs->pstate;
	spsr &= ~DBG_SPSR_SS;
	spsr |= DBG_SPSR_SS;
	regs->pstate = spsr;
}

static void clear_regs_spsr_ss(struct pt_regs *regs)
{
	unsigned long spsr;

	spsr = regs->pstate;
	spsr &= ~DBG_SPSR_SS;
	regs->pstate = spsr;
}

/* EL1 Single Step Handler hooks */
static LIST_HEAD(step_hook);
static DEFINE_RWLOCK(step_hook_lock);

void register_step_hook(struct step_hook *hook)
{
	write_lock(&step_hook_lock);
	list_add(&hook->node, &step_hook);
	write_unlock(&step_hook_lock);
}

void unregister_step_hook(struct step_hook *hook)
{
	write_lock(&step_hook_lock);
	list_del(&hook->node);
	write_unlock(&step_hook_lock);
}

/*
 * Call registered single step handlers
 * There is no Syndrome info to check for determining the handler.
 * So we call all the registered handlers, until the right handler is
 * found which returns zero.
 */
static int call_step_hook(struct pt_regs *regs, unsigned int esr)
{
	struct step_hook *hook;
	int retval = DBG_HOOK_ERROR;

	read_lock(&step_hook_lock);

	list_for_each_entry(hook, &step_hook, node)	{
		retval = hook->fn(regs, esr);
		if (retval == DBG_HOOK_HANDLED)
			break;
	}

	read_unlock(&step_hook_lock);

	return retval;
}

static int single_step_handler(unsigned long addr, unsigned int esr,
			       struct pt_regs *regs)
{
	siginfo_t info;

	/*
	 * If we are stepping a pending breakpoint, call the hw_breakpoint
	 * handler first.
	 */
	if (!reinstall_suspended_bps(regs))
		return 0;

	if (user_mode(regs)) {
		info.si_signo = SIGTRAP;
		info.si_errno = 0;
		info.si_code  = TRAP_HWBKPT;
		info.si_addr  = (void __user *)instruction_pointer(regs);
		force_sig_info(SIGTRAP, &info, current);

		/*
		 * ptrace will disable single step unless explicitly
		 * asked to re-enable it. For other clients, it makes
		 * sense to leave it enabled (i.e. rewind the controls
		 * to the active-not-pending state).
		 */
		user_rewind_single_step(current);
	} else {
		if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
			return 0;

		pr_warning("Unexpected kernel single-step exception at EL1\n");
		/*
		 * Re-enable stepping since we know that we will be
		 * returning to regs.
		 */
		set_regs_spsr_ss(regs);
	}

	return 0;
}

/*
 * Breakpoint handler is re-entrant as another breakpoint can
 * hit within breakpoint handler, especically in kprobes.
 * Use reader/writer locks instead of plain spinlock.
 */
static LIST_HEAD(break_hook);
static DEFINE_SPINLOCK(break_hook_lock);

void register_break_hook(struct break_hook *hook)
{
	spin_lock(&break_hook_lock);
	list_add_rcu(&hook->node, &break_hook);
	spin_unlock(&break_hook_lock);
}

void unregister_break_hook(struct break_hook *hook)
{
	spin_lock(&break_hook_lock);
	list_del_rcu(&hook->node);
	spin_unlock(&break_hook_lock);
	synchronize_rcu();
}

static int call_break_hook(struct pt_regs *regs, unsigned int esr)
{
	struct break_hook *hook;
	int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;

	rcu_read_lock();
	list_for_each_entry_rcu(hook, &break_hook, node)
		if ((esr & hook->esr_mask) == hook->esr_val)
			fn = hook->fn;
	rcu_read_unlock();

	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
}

static int brk_handler(unsigned long addr, unsigned int esr,
		       struct pt_regs *regs)
{
	siginfo_t info;

	if (user_mode(regs)) {
		info = (siginfo_t) {
			.si_signo = SIGTRAP,
			.si_errno = 0,
			.si_code  = TRAP_BRKPT,
			.si_addr  = (void __user *)instruction_pointer(regs),
		};

		force_sig_info(SIGTRAP, &info, current);
	} else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
		pr_warning("Unexpected kernel BRK exception at EL1\n");
		return -EFAULT;
	}

	return 0;
}

int aarch32_break_handler(struct pt_regs *regs)
{
	siginfo_t info;
	u32 arm_instr;
	u16 thumb_instr;
	bool bp = false;
	void __user *pc = (void __user *)instruction_pointer(regs);

	if (!compat_user_mode(regs))
		return -EFAULT;

	if (compat_thumb_mode(regs)) {
		/* get 16-bit Thumb instruction */
		get_user(thumb_instr, (u16 __user *)pc);
		thumb_instr = le16_to_cpu(thumb_instr);
		if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
			/* get second half of 32-bit Thumb-2 instruction */
			get_user(thumb_instr, (u16 __user *)(pc + 2));
			thumb_instr = le16_to_cpu(thumb_instr);
			bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
		} else {
			bp = thumb_instr == AARCH32_BREAK_THUMB;
		}
	} else {
		/* 32-bit ARM instruction */
		get_user(arm_instr, (u32 __user *)pc);
		arm_instr = le32_to_cpu(arm_instr);
		bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
	}

	if (!bp)
		return -EFAULT;

	info = (siginfo_t) {
		.si_signo = SIGTRAP,
		.si_errno = 0,
		.si_code  = TRAP_BRKPT,
		.si_addr  = pc,
	};

	force_sig_info(SIGTRAP, &info, current);
	return 0;
}

static int __init debug_traps_init(void)
{
	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
			      TRAP_HWBKPT, "single-step handler");
	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
			      TRAP_BRKPT, "ptrace BRK handler");
	return 0;
}
arch_initcall(debug_traps_init);

/* Re-enable single step for syscall restarting. */
void user_rewind_single_step(struct task_struct *task)
{
	/*
	 * If single step is active for this thread, then set SPSR.SS
	 * to 1 to avoid returning to the active-pending state.
	 */
	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
		set_regs_spsr_ss(task_pt_regs(task));
}

void user_fastforward_single_step(struct task_struct *task)
{
	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
		clear_regs_spsr_ss(task_pt_regs(task));
}

/* Kernel API */
void kernel_enable_single_step(struct pt_regs *regs)
{
	WARN_ON(!irqs_disabled());
	set_regs_spsr_ss(regs);
	mdscr_write(mdscr_read() | DBG_MDSCR_SS);
	enable_debug_monitors(DBG_ACTIVE_EL1);
}

void kernel_disable_single_step(void)
{
	WARN_ON(!irqs_disabled());
	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
	disable_debug_monitors(DBG_ACTIVE_EL1);
}

int kernel_active_single_step(void)
{
	WARN_ON(!irqs_disabled());
	return mdscr_read() & DBG_MDSCR_SS;
}

/* ptrace API */
void user_enable_single_step(struct task_struct *task)
{
	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
	set_regs_spsr_ss(task_pt_regs(task));
}

void user_disable_single_step(struct task_struct *task)
{
	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
}
Commit	Line	Data
478fcb2c WD	1	/*
	2	* ARMv8 single-step debug support and mdscr context switching.
	3	*
	4	* Copyright (C) 2012 ARM Limited
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	17	*
	18	* Author: Will Deacon <will.deacon@arm.com>
	19	*/
	20
	21	#include <linux/cpu.h>
	22	#include <linux/debugfs.h>
	23	#include <linux/hardirq.h>
	24	#include <linux/init.h>
	25	#include <linux/ptrace.h>
	26	#include <linux/stat.h>
1442b6ed	27	#include <linux/uaccess.h>
478fcb2c WD	28
478fcb2c WD	29	#include <asm/debug-monitors.h>
478fcb2c WD	30	#include <asm/cputype.h>
	31	#include <asm/system_misc.h>
	32
478fcb2c WD	33	/* Determine debug architecture. */
	34	u8 debug_monitors_arch(void)
	35	{
	36	return read_cpuid(ID_AA64DFR0_EL1) & 0xf;
	37	}
	38
	39	/*
	40	* MDSCR access routines.
	41	*/
	42	static void mdscr_write(u32 mdscr)
	43	{
	44	unsigned long flags;
	45	local_dbg_save(flags);
	46	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
	47	local_dbg_restore(flags);
	48	}
	49
	50	static u32 mdscr_read(void)
	51	{
	52	u32 mdscr;
	53	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
	54	return mdscr;
	55	}
	56
	57	/*
	58	* Allow root to disable self-hosted debug from userspace.
	59	* This is useful if you want to connect an external JTAG debugger.
	60	*/
	61	static u32 debug_enabled = 1;
	62
	63	static int create_debug_debugfs_entry(void)
	64	{
	65	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
	66	return 0;
	67	}
	68	fs_initcall(create_debug_debugfs_entry);
	69
	70	static int __init early_debug_disable(char *buf)
	71	{
	72	debug_enabled = 0;
	73	return 0;
	74	}
	75
	76	early_param("nodebugmon", early_debug_disable);
	77
	78	/*
	79	* Keep track of debug users on each core.
	80	* The ref counts are per-cpu so we use a local_t type.
	81	*/
1436c1aa CL	82	static DEFINE_PER_CPU(int, mde_ref_count);
1436c1aa CL	83	static DEFINE_PER_CPU(int, kde_ref_count);
478fcb2c	84
6f883d10	85	void enable_debug_monitors(enum dbg_active_el el)
478fcb2c WD	86	{
	87	u32 mdscr, enable = 0;
	88
	89	WARN_ON(preemptible());
	90
1436c1aa	91	if (this_cpu_inc_return(mde_ref_count) == 1)
478fcb2c WD	92	enable = DBG_MDSCR_MDE;
	93
	94	if (el == DBG_ACTIVE_EL1 &&
1436c1aa	95	this_cpu_inc_return(kde_ref_count) == 1)
478fcb2c WD	96	enable \|= DBG_MDSCR_KDE;
	97
	98	if (enable && debug_enabled) {
	99	mdscr = mdscr_read();
	100	mdscr \|= enable;
	101	mdscr_write(mdscr);
	102	}
	103	}
	104
6f883d10	105	void disable_debug_monitors(enum dbg_active_el el)
478fcb2c WD	106	{
	107	u32 mdscr, disable = 0;
	108
	109	WARN_ON(preemptible());
	110
1436c1aa	111	if (this_cpu_dec_return(mde_ref_count) == 0)
478fcb2c WD	112	disable = ~DBG_MDSCR_MDE;
	113
	114	if (el == DBG_ACTIVE_EL1 &&
1436c1aa	115	this_cpu_dec_return(kde_ref_count) == 0)
478fcb2c WD	116	disable &= ~DBG_MDSCR_KDE;
	117
	118	if (disable) {
	119	mdscr = mdscr_read();
	120	mdscr &= disable;
	121	mdscr_write(mdscr);
	122	}
	123	}
	124
	125	/*
	126	* OS lock clearing.
	127	*/
	128	static void clear_os_lock(void *unused)
	129	{
478fcb2c	130	asm volatile("msr oslar_el1, %0" : : "r" (0));
478fcb2c WD	131	}
478fcb2c WD	132
b8c6453a	133	static int os_lock_notify(struct notifier_block *self,
478fcb2c WD	134	unsigned long action, void *data)
	135	{
	136	int cpu = (unsigned long)data;
e56d82a1	137	if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
478fcb2c WD	138	smp_call_function_single(cpu, clear_os_lock, NULL, 1);
	139	return NOTIFY_OK;
	140	}
	141
b8c6453a	142	static struct notifier_block os_lock_nb = {
478fcb2c WD	143	.notifier_call = os_lock_notify,
	144	};
	145
b8c6453a	146	static int debug_monitors_init(void)
478fcb2c	147	{
4b0b68af SB	148	cpu_notifier_register_begin();
4b0b68af SB	149
478fcb2c	150	/* Clear the OS lock. */
d8ed442a VK	151	on_each_cpu(clear_os_lock, NULL, 1);
	152	isb();
	153	local_dbg_enable();
478fcb2c WD	154
478fcb2c WD	155	/* Register hotplug handler. */
4b0b68af SB	156	__register_cpu_notifier(&os_lock_nb);
	157
	158	cpu_notifier_register_done();
478fcb2c WD	159	return 0;
	160	}
	161	postcore_initcall(debug_monitors_init);
	162
	163	/*
	164	* Single step API and exception handling.
	165	*/
	166	static void set_regs_spsr_ss(struct pt_regs *regs)
	167	{
	168	unsigned long spsr;
	169
	170	spsr = regs->pstate;
	171	spsr &= ~DBG_SPSR_SS;
	172	spsr \|= DBG_SPSR_SS;
	173	regs->pstate = spsr;
	174	}
	175
	176	static void clear_regs_spsr_ss(struct pt_regs *regs)
	177	{
	178	unsigned long spsr;
	179
	180	spsr = regs->pstate;
	181	spsr &= ~DBG_SPSR_SS;
	182	regs->pstate = spsr;
	183	}
	184
ee6214ce SP	185	/* EL1 Single Step Handler hooks */
ee6214ce SP	186	static LIST_HEAD(step_hook);
242c04bc	187	static DEFINE_RWLOCK(step_hook_lock);
ee6214ce SP	188
	189	void register_step_hook(struct step_hook *hook)
	190	{
	191	write_lock(&step_hook_lock);
	192	list_add(&hook->node, &step_hook);
	193	write_unlock(&step_hook_lock);
	194	}
	195
	196	void unregister_step_hook(struct step_hook *hook)
	197	{
	198	write_lock(&step_hook_lock);
	199	list_del(&hook->node);
	200	write_unlock(&step_hook_lock);
	201	}
	202
	203	/*
95485fdc	204	* Call registered single step handlers
ee6214ce SP	205	* There is no Syndrome info to check for determining the handler.
	206	* So we call all the registered handlers, until the right handler is
	207	* found which returns zero.
	208	*/
	209	static int call_step_hook(struct pt_regs *regs, unsigned int esr)
	210	{
	211	struct step_hook *hook;
	212	int retval = DBG_HOOK_ERROR;
	213
	214	read_lock(&step_hook_lock);
	215
	216	list_for_each_entry(hook, &step_hook, node) {
	217	retval = hook->fn(regs, esr);
	218	if (retval == DBG_HOOK_HANDLED)
	219	break;
	220	}
	221
	222	read_unlock(&step_hook_lock);
	223
	224	return retval;
	225	}
	226
478fcb2c WD	227	static int single_step_handler(unsigned long addr, unsigned int esr,
	228	struct pt_regs *regs)
	229	{
	230	siginfo_t info;
	231
	232	/*
	233	* If we are stepping a pending breakpoint, call the hw_breakpoint
	234	* handler first.
	235	*/
	236	if (!reinstall_suspended_bps(regs))
	237	return 0;
	238
	239	if (user_mode(regs)) {
	240	info.si_signo = SIGTRAP;
	241	info.si_errno = 0;
	242	info.si_code = TRAP_HWBKPT;
	243	info.si_addr = (void __user *)instruction_pointer(regs);
	244	force_sig_info(SIGTRAP, &info, current);
	245
	246	/*
	247	* ptrace will disable single step unless explicitly
	248	* asked to re-enable it. For other clients, it makes
	249	* sense to leave it enabled (i.e. rewind the controls
	250	* to the active-not-pending state).
	251	*/
	252	user_rewind_single_step(current);
	253	} else {
ee6214ce SP	254	if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
	255	return 0;
	256
478fcb2c WD	257	pr_warning("Unexpected kernel single-step exception at EL1\n");
	258	/*
	259	* Re-enable stepping since we know that we will be
	260	* returning to regs.
	261	*/
	262	set_regs_spsr_ss(regs);
	263	}
	264
	265	return 0;
	266	}
	267
ee6214ce SP	268	/*
	269	* Breakpoint handler is re-entrant as another breakpoint can
	270	* hit within breakpoint handler, especically in kprobes.
	271	* Use reader/writer locks instead of plain spinlock.
	272	*/
	273	static LIST_HEAD(break_hook);
62c6c61a	274	static DEFINE_SPINLOCK(break_hook_lock);
ee6214ce SP	275
	276	void register_break_hook(struct break_hook *hook)
	277	{
62c6c61a YS	278	spin_lock(&break_hook_lock);
	279	list_add_rcu(&hook->node, &break_hook);
	280	spin_unlock(&break_hook_lock);
ee6214ce SP	281	}
	282
	283	void unregister_break_hook(struct break_hook *hook)
	284	{
62c6c61a YS	285	spin_lock(&break_hook_lock);
	286	list_del_rcu(&hook->node);
	287	spin_unlock(&break_hook_lock);
	288	synchronize_rcu();
ee6214ce SP	289	}
	290
	291	static int call_break_hook(struct pt_regs *regs, unsigned int esr)
	292	{
	293	struct break_hook *hook;
	294	int (fn)(struct pt_regs regs, unsigned int esr) = NULL;
	295
62c6c61a YS	296	rcu_read_lock();
62c6c61a YS	297	list_for_each_entry_rcu(hook, &break_hook, node)
ee6214ce SP	298	if ((esr & hook->esr_mask) == hook->esr_val)
ee6214ce SP	299	fn = hook->fn;
62c6c61a	300	rcu_read_unlock();
ee6214ce SP	301
	302	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
	303	}
	304
1442b6ed WD	305	static int brk_handler(unsigned long addr, unsigned int esr,
	306	struct pt_regs *regs)
	307	{
	308	siginfo_t info;
	309
c878e0cf WD	310	if (user_mode(regs)) {
	311	info = (siginfo_t) {
	312	.si_signo = SIGTRAP,
	313	.si_errno = 0,
	314	.si_code = TRAP_BRKPT,
	315	.si_addr = (void __user *)instruction_pointer(regs),
	316	};
ee6214ce	317
c878e0cf WD	318	force_sig_info(SIGTRAP, &info, current);
	319	} else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
	320	pr_warning("Unexpected kernel BRK exception at EL1\n");
1442b6ed	321	return -EFAULT;
c878e0cf	322	}
1442b6ed	323
1442b6ed WD	324	return 0;
	325	}
	326
	327	int aarch32_break_handler(struct pt_regs *regs)
	328	{
	329	siginfo_t info;
2dacab73 ML	330	u32 arm_instr;
2dacab73 ML	331	u16 thumb_instr;
1442b6ed WD	332	bool bp = false;
	333	void __user pc = (void __user )instruction_pointer(regs);
	334
	335	if (!compat_user_mode(regs))
	336	return -EFAULT;
	337
	338	if (compat_thumb_mode(regs)) {
	339	/* get 16-bit Thumb instruction */
2dacab73 ML	340	get_user(thumb_instr, (u16 __user *)pc);
	341	thumb_instr = le16_to_cpu(thumb_instr);
	342	if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
1442b6ed	343	/* get second half of 32-bit Thumb-2 instruction */
2dacab73 ML	344	get_user(thumb_instr, (u16 __user *)(pc + 2));
	345	thumb_instr = le16_to_cpu(thumb_instr);
	346	bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
1442b6ed	347	} else {
2dacab73	348	bp = thumb_instr == AARCH32_BREAK_THUMB;
1442b6ed WD	349	}
	350	} else {
	351	/* 32-bit ARM instruction */
2dacab73 ML	352	get_user(arm_instr, (u32 __user *)pc);
	353	arm_instr = le32_to_cpu(arm_instr);
	354	bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
1442b6ed WD	355	}
	356
	357	if (!bp)
	358	return -EFAULT;
	359
	360	info = (siginfo_t) {
	361	.si_signo = SIGTRAP,
	362	.si_errno = 0,
	363	.si_code = TRAP_BRKPT,
	364	.si_addr = pc,
	365	};
	366
	367	force_sig_info(SIGTRAP, &info, current);
	368	return 0;
	369	}
	370
	371	static int __init debug_traps_init(void)
478fcb2c WD	372	{
	373	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
	374	TRAP_HWBKPT, "single-step handler");
1442b6ed WD	375	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
1442b6ed WD	376	TRAP_BRKPT, "ptrace BRK handler");
478fcb2c WD	377	return 0;
478fcb2c WD	378	}
1442b6ed	379	arch_initcall(debug_traps_init);
478fcb2c WD	380
	381	/* Re-enable single step for syscall restarting. */
	382	void user_rewind_single_step(struct task_struct *task)
	383	{
	384	/*
	385	* If single step is active for this thread, then set SPSR.SS
	386	* to 1 to avoid returning to the active-pending state.
	387	*/
	388	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
	389	set_regs_spsr_ss(task_pt_regs(task));
	390	}
	391
	392	void user_fastforward_single_step(struct task_struct *task)
	393	{
	394	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
	395	clear_regs_spsr_ss(task_pt_regs(task));
	396	}
	397
	398	/* Kernel API */
	399	void kernel_enable_single_step(struct pt_regs *regs)
	400	{
	401	WARN_ON(!irqs_disabled());
	402	set_regs_spsr_ss(regs);
	403	mdscr_write(mdscr_read() \| DBG_MDSCR_SS);
	404	enable_debug_monitors(DBG_ACTIVE_EL1);
	405	}
	406
	407	void kernel_disable_single_step(void)
	408	{
	409	WARN_ON(!irqs_disabled());
	410	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
	411	disable_debug_monitors(DBG_ACTIVE_EL1);
	412	}
	413
	414	int kernel_active_single_step(void)
	415	{
	416	WARN_ON(!irqs_disabled());
	417	return mdscr_read() & DBG_MDSCR_SS;
	418	}
	419
	420	/* ptrace API */
	421	void user_enable_single_step(struct task_struct *task)
	422	{
	423	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
	424	set_regs_spsr_ss(task_pt_regs(task));
	425	}
	426
	427	void user_disable_single_step(struct task_struct *task)
	428	{
	429	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
	430	}