dma-mapping: always provide the dma_map_ops based implementation
[deliverable/linux.git] / arch / powerpc / include / asm / dma-mapping.h
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1da177e4 1/*
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2 * Copyright (C) 2004 IBM
3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
1da177e4 6 */
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7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
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9#ifdef __KERNEL__
10
11#include <linux/types.h>
12#include <linux/cache.h>
13/* need struct page definitions */
14#include <linux/mm.h>
15#include <linux/scatterlist.h>
3affedc4 16#include <linux/dma-attrs.h>
46bab4e4 17#include <linux/dma-debug.h>
33ff910f 18#include <asm/io.h>
ec3cf2ec 19#include <asm/swiotlb.h>
33ff910f 20
efa21e43 21#ifdef CONFIG_PPC64
33ff910f 22#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
efa21e43 23#endif
33ff910f 24
ec3cf2ec 25/* Some dma direct funcs must be visible for use in other dma_ops */
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26extern void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
27 dma_addr_t *dma_handle, gfp_t flag,
28 struct dma_attrs *attrs);
29extern void __dma_direct_free_coherent(struct device *dev, size_t size,
30 void *vaddr, dma_addr_t dma_handle,
bfbf7d61 31 struct dma_attrs *attrs);
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32extern int dma_direct_mmap_coherent(struct device *dev,
33 struct vm_area_struct *vma,
34 void *cpu_addr, dma_addr_t handle,
35 size_t size, struct dma_attrs *attrs);
ec3cf2ec 36
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37#ifdef CONFIG_NOT_COHERENT_CACHE
38/*
39 * DMA-consistent mapping functions for PowerPCs that don't support
40 * cache snooping. These allocate/free a region of uncached mapped
41 * memory space for use with DMA devices. Alternatively, you could
42 * allocate the space "normally" and use the cache management functions
43 * to ensure it is consistent.
44 */
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45struct device;
46extern void *__dma_alloc_coherent(struct device *dev, size_t size,
47 dma_addr_t *handle, gfp_t gfp);
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48extern void __dma_free_coherent(size_t size, void *vaddr);
49extern void __dma_sync(void *vaddr, size_t size, int direction);
50extern void __dma_sync_page(struct page *page, unsigned long offset,
51 size_t size, int direction);
6090912c 52extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
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53
54#else /* ! CONFIG_NOT_COHERENT_CACHE */
55/*
56 * Cache coherent cores.
57 */
58
8b31e49d 59#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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60#define __dma_free_coherent(size, addr) ((void)0)
61#define __dma_sync(addr, size, rw) ((void)0)
62#define __dma_sync_page(pg, off, sz, rw) ((void)0)
63
64#endif /* ! CONFIG_NOT_COHERENT_CACHE */
65
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66static inline unsigned long device_to_mask(struct device *dev)
67{
68 if (dev->dma_mask && *dev->dma_mask)
69 return *dev->dma_mask;
70 /* Assume devices without mask can take 32 bit addresses */
71 return 0xfffffffful;
72}
73
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74/*
75 * Available generic sets of operations
76 */
77#ifdef CONFIG_PPC64
45223c54 78extern struct dma_map_ops dma_iommu_ops;
4fc665b8 79#endif
45223c54 80extern struct dma_map_ops dma_direct_ops;
4fc665b8 81
45223c54 82static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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83{
84 /* We don't handle the NULL dev case for ISA for now. We could
85 * do it via an out of line call but it is not needed for now. The
86 * only ISA DMA device we support is the floppy and we have a hack
87 * in the floppy driver directly to get a device for us.
88 */
4ae0ff60 89 if (unlikely(dev == NULL))
33ff910f 90 return NULL;
4fc665b8 91
33ff910f 92 return dev->archdata.dma_ops;
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93}
94
45223c54 95static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
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96{
97 dev->archdata.dma_ops = ops;
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98}
99
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100/*
101 * get_dma_offset()
102 *
103 * Get the dma offset on configurations where the dma address can be determined
104 * from the physical address by looking at a simple offset. Direct dma and
105 * swiotlb use this function, but it is typically not used by implementations
106 * with an iommu.
107 */
738ef42e 108static inline dma_addr_t get_dma_offset(struct device *dev)
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109{
110 if (dev)
2db4928b 111 return dev->archdata.dma_offset;
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112
113 return PCI_DRAM_OFFSET;
114}
115
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116static inline void set_dma_offset(struct device *dev, dma_addr_t off)
117{
118 if (dev)
2db4928b 119 dev->archdata.dma_offset = off;
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120}
121
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122/* this will be removed soon */
123#define flush_write_buffers()
124
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125#define HAVE_ARCH_DMA_SET_MASK 1
126extern int dma_set_mask(struct device *dev, u64 dma_mask);
127
cd15b048 128extern int __dma_set_mask(struct device *dev, u64 dma_mask);
fe7e85c6 129extern u64 __dma_get_required_mask(struct device *dev);
33ff910f 130
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131static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
132{
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133#ifdef CONFIG_SWIOTLB
134 struct dev_archdata *sd = &dev->archdata;
9a937c91 135
762afb73 136 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
acdb6685 137 return false;
762afb73 138#endif
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139
140 if (!dev->dma_mask)
acdb6685 141 return false;
9a937c91 142
ac2b3e67 143 return addr + size - 1 <= *dev->dma_mask;
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144}
145
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146static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
147{
1cebd7a0 148 return paddr + get_dma_offset(dev);
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149}
150
151static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
152{
1cebd7a0 153 return daddr - get_dma_offset(dev);
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154}
155
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156#define ARCH_HAS_DMA_MMAP_COHERENT
157
d3fa72e4 158static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
78b09735 159 enum dma_data_direction direction)
1da177e4 160{
78b09735 161 BUG_ON(direction == DMA_NONE);
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162 __dma_sync(vaddr, size, (int)direction);
163}
164
88ced031 165#endif /* __KERNEL__ */
78b09735 166#endif /* _ASM_DMA_MAPPING_H */
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