[deliverable/linux.git] / arch / powerpc / kvm / book3s_emulate.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <asm/kvm_ppc.h>
#include <asm/disassemble.h>
#include <asm/kvm_book3s.h>
#include <asm/reg.h>
#include <asm/switch_to.h>
#include <asm/time.h>
#include "book3s.h"

#define OP_19_XOP_RFID		18
#define OP_19_XOP_RFI		50

#define OP_31_XOP_MFMSR		83
#define OP_31_XOP_MTMSR		146
#define OP_31_XOP_MTMSRD	178
#define OP_31_XOP_MTSR		210
#define OP_31_XOP_MTSRIN	242
#define OP_31_XOP_TLBIEL	274
#define OP_31_XOP_TLBIE		306
/* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */
#define OP_31_XOP_FAKE_SC1	308
#define OP_31_XOP_SLBMTE	402
#define OP_31_XOP_SLBIE		434
#define OP_31_XOP_SLBIA		498
#define OP_31_XOP_MFSR		595
#define OP_31_XOP_MFSRIN	659
#define OP_31_XOP_DCBA		758
#define OP_31_XOP_SLBMFEV	851
#define OP_31_XOP_EIOIO		854
#define OP_31_XOP_SLBMFEE	915

/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
#define OP_31_XOP_DCBZ		1010

#define OP_LFS			48
#define OP_LFD			50
#define OP_STFS			52
#define OP_STFD			54

#define SPRN_GQR0		912
#define SPRN_GQR1		913
#define SPRN_GQR2		914
#define SPRN_GQR3		915
#define SPRN_GQR4		916
#define SPRN_GQR5		917
#define SPRN_GQR6		918
#define SPRN_GQR7		919

/* Book3S_32 defines mfsrin(v) - but that messes up our abstract
 * function pointers, so let's just disable the define. */
#undef mfsrin

enum priv_level {
	PRIV_PROBLEM = 0,
	PRIV_SUPER = 1,
	PRIV_HYPER = 2,
};

static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
{
	/* PAPR VMs only access supervisor SPRs */
	if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
		return false;

	/* Limit user space to its own small SPR set */
	if ((kvmppc_get_msr(vcpu) & MSR_PR) && level > PRIV_PROBLEM)
		return false;

	return true;
}

int kvmppc_core_emulate_op_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
			      unsigned int inst, int *advance)
{
	int emulated = EMULATE_DONE;
	int rt = get_rt(inst);
	int rs = get_rs(inst);
	int ra = get_ra(inst);
	int rb = get_rb(inst);
	u32 inst_sc = 0x44000002;

	switch (get_op(inst)) {
	case 0:
		emulated = EMULATE_FAIL;
		if ((kvmppc_get_msr(vcpu) & MSR_LE) &&
		    (inst == swab32(inst_sc))) {
			/*
			 * This is the byte reversed syscall instruction of our
			 * hypercall handler. Early versions of LE Linux didn't
			 * swap the instructions correctly and ended up in
			 * illegal instructions.
			 * Just always fail hypercalls on these broken systems.
			 */
			kvmppc_set_gpr(vcpu, 3, EV_UNIMPLEMENTED);
			kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
			emulated = EMULATE_DONE;
		}
		break;
	case 19:
		switch (get_xop(inst)) {
		case OP_19_XOP_RFID:
		case OP_19_XOP_RFI:
			kvmppc_set_pc(vcpu, kvmppc_get_srr0(vcpu));
			kvmppc_set_msr(vcpu, kvmppc_get_srr1(vcpu));
			*advance = 0;
			break;

		default:
			emulated = EMULATE_FAIL;
			break;
		}
		break;
	case 31:
		switch (get_xop(inst)) {
		case OP_31_XOP_MFMSR:
			kvmppc_set_gpr(vcpu, rt, kvmppc_get_msr(vcpu));
			break;
		case OP_31_XOP_MTMSRD:
		{
			ulong rs_val = kvmppc_get_gpr(vcpu, rs);
			if (inst & 0x10000) {
				ulong new_msr = kvmppc_get_msr(vcpu);
				new_msr &= ~(MSR_RI | MSR_EE);
				new_msr |= rs_val & (MSR_RI | MSR_EE);
				kvmppc_set_msr_fast(vcpu, new_msr);
			} else
				kvmppc_set_msr(vcpu, rs_val);
			break;
		}
		case OP_31_XOP_MTMSR:
			kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
			break;
		case OP_31_XOP_MFSR:
		{
			int srnum;

			srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
			if (vcpu->arch.mmu.mfsrin) {
				u32 sr;
				sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
				kvmppc_set_gpr(vcpu, rt, sr);
			}
			break;
		}
		case OP_31_XOP_MFSRIN:
		{
			int srnum;

			srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
			if (vcpu->arch.mmu.mfsrin) {
				u32 sr;
				sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
				kvmppc_set_gpr(vcpu, rt, sr);
			}
			break;
		}
		case OP_31_XOP_MTSR:
			vcpu->arch.mmu.mtsrin(vcpu,
				(inst >> 16) & 0xf,
				kvmppc_get_gpr(vcpu, rs));
			break;
		case OP_31_XOP_MTSRIN:
			vcpu->arch.mmu.mtsrin(vcpu,
				(kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
				kvmppc_get_gpr(vcpu, rs));
			break;
		case OP_31_XOP_TLBIE:
		case OP_31_XOP_TLBIEL:
		{
			bool large = (inst & 0x00200000) ? true : false;
			ulong addr = kvmppc_get_gpr(vcpu, rb);
			vcpu->arch.mmu.tlbie(vcpu, addr, large);
			break;
		}
#ifdef CONFIG_PPC_BOOK3S_64
		case OP_31_XOP_FAKE_SC1:
		{
			/* SC 1 papr hypercalls */
			ulong cmd = kvmppc_get_gpr(vcpu, 3);
			int i;

		        if ((kvmppc_get_msr(vcpu) & MSR_PR) ||
			    !vcpu->arch.papr_enabled) {
				emulated = EMULATE_FAIL;
				break;
			}

			if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE)
				break;

			run->papr_hcall.nr = cmd;
			for (i = 0; i < 9; ++i) {
				ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
				run->papr_hcall.args[i] = gpr;
			}

			run->exit_reason = KVM_EXIT_PAPR_HCALL;
			vcpu->arch.hcall_needed = 1;
			emulated = EMULATE_EXIT_USER;
			break;
		}
#endif
		case OP_31_XOP_EIOIO:
			break;
		case OP_31_XOP_SLBMTE:
			if (!vcpu->arch.mmu.slbmte)
				return EMULATE_FAIL;

			vcpu->arch.mmu.slbmte(vcpu,
					kvmppc_get_gpr(vcpu, rs),
					kvmppc_get_gpr(vcpu, rb));
			break;
		case OP_31_XOP_SLBIE:
			if (!vcpu->arch.mmu.slbie)
				return EMULATE_FAIL;

			vcpu->arch.mmu.slbie(vcpu,
					kvmppc_get_gpr(vcpu, rb));
			break;
		case OP_31_XOP_SLBIA:
			if (!vcpu->arch.mmu.slbia)
				return EMULATE_FAIL;

			vcpu->arch.mmu.slbia(vcpu);
			break;
		case OP_31_XOP_SLBMFEE:
			if (!vcpu->arch.mmu.slbmfee) {
				emulated = EMULATE_FAIL;
			} else {
				ulong t, rb_val;

				rb_val = kvmppc_get_gpr(vcpu, rb);
				t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
				kvmppc_set_gpr(vcpu, rt, t);
			}
			break;
		case OP_31_XOP_SLBMFEV:
			if (!vcpu->arch.mmu.slbmfev) {
				emulated = EMULATE_FAIL;
			} else {
				ulong t, rb_val;

				rb_val = kvmppc_get_gpr(vcpu, rb);
				t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
				kvmppc_set_gpr(vcpu, rt, t);
			}
			break;
		case OP_31_XOP_DCBA:
			/* Gets treated as NOP */
			break;
		case OP_31_XOP_DCBZ:
		{
			ulong rb_val = kvmppc_get_gpr(vcpu, rb);
			ulong ra_val = 0;
			ulong addr, vaddr;
			u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
			u32 dsisr;
			int r;

			if (ra)
				ra_val = kvmppc_get_gpr(vcpu, ra);

			addr = (ra_val + rb_val) & ~31ULL;
			if (!(kvmppc_get_msr(vcpu) & MSR_SF))
				addr &= 0xffffffff;
			vaddr = addr;

			r = kvmppc_st(vcpu, &addr, 32, zeros, true);
			if ((r == -ENOENT) || (r == -EPERM)) {
				*advance = 0;
				kvmppc_set_dar(vcpu, vaddr);
				vcpu->arch.fault_dar = vaddr;

				dsisr = DSISR_ISSTORE;
				if (r == -ENOENT)
					dsisr |= DSISR_NOHPTE;
				else if (r == -EPERM)
					dsisr |= DSISR_PROTFAULT;

				kvmppc_set_dsisr(vcpu, dsisr);
				vcpu->arch.fault_dsisr = dsisr;

				kvmppc_book3s_queue_irqprio(vcpu,
					BOOK3S_INTERRUPT_DATA_STORAGE);
			}

			break;
		}
		default:
			emulated = EMULATE_FAIL;
		}
		break;
	default:
		emulated = EMULATE_FAIL;
	}

	if (emulated == EMULATE_FAIL)
		emulated = kvmppc_emulate_paired_single(run, vcpu);

	return emulated;
}

void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
                    u32 val)
{
	if (upper) {
		/* Upper BAT */
		u32 bl = (val >> 2) & 0x7ff;
		bat->bepi_mask = (~bl << 17);
		bat->bepi = val & 0xfffe0000;
		bat->vs = (val & 2) ? 1 : 0;
		bat->vp = (val & 1) ? 1 : 0;
		bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
	} else {
		/* Lower BAT */
		bat->brpn = val & 0xfffe0000;
		bat->wimg = (val >> 3) & 0xf;
		bat->pp = val & 3;
		bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
	}
}

static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_bat *bat;

	switch (sprn) {
	case SPRN_IBAT0U ... SPRN_IBAT3L:
		bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
		break;
	case SPRN_IBAT4U ... SPRN_IBAT7L:
		bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
		break;
	case SPRN_DBAT0U ... SPRN_DBAT3L:
		bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
		break;
	case SPRN_DBAT4U ... SPRN_DBAT7L:
		bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
		break;
	default:
		BUG();
	}

	return bat;
}

int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
{
	int emulated = EMULATE_DONE;

	switch (sprn) {
	case SPRN_SDR1:
		if (!spr_allowed(vcpu, PRIV_HYPER))
			goto unprivileged;
		to_book3s(vcpu)->sdr1 = spr_val;
		break;
	case SPRN_DSISR:
		kvmppc_set_dsisr(vcpu, spr_val);
		break;
	case SPRN_DAR:
		kvmppc_set_dar(vcpu, spr_val);
		break;
	case SPRN_HIOR:
		to_book3s(vcpu)->hior = spr_val;
		break;
	case SPRN_IBAT0U ... SPRN_IBAT3L:
	case SPRN_IBAT4U ... SPRN_IBAT7L:
	case SPRN_DBAT0U ... SPRN_DBAT3L:
	case SPRN_DBAT4U ... SPRN_DBAT7L:
	{
		struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);

		kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
		/* BAT writes happen so rarely that we're ok to flush
		 * everything here */
		kvmppc_mmu_pte_flush(vcpu, 0, 0);
		kvmppc_mmu_flush_segments(vcpu);
		break;
	}
	case SPRN_HID0:
		to_book3s(vcpu)->hid[0] = spr_val;
		break;
	case SPRN_HID1:
		to_book3s(vcpu)->hid[1] = spr_val;
		break;
	case SPRN_HID2:
		to_book3s(vcpu)->hid[2] = spr_val;
		break;
	case SPRN_HID2_GEKKO:
		to_book3s(vcpu)->hid[2] = spr_val;
		/* HID2.PSE controls paired single on gekko */
		switch (vcpu->arch.pvr) {
		case 0x00080200:	/* lonestar 2.0 */
		case 0x00088202:	/* lonestar 2.2 */
		case 0x70000100:	/* gekko 1.0 */
		case 0x00080100:	/* gekko 2.0 */
		case 0x00083203:	/* gekko 2.3a */
		case 0x00083213:	/* gekko 2.3b */
		case 0x00083204:	/* gekko 2.4 */
		case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
		case 0x00087200:	/* broadway */
			if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
				/* Native paired singles */
			} else if (spr_val & (1 << 29)) { /* HID2.PSE */
				vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
				kvmppc_giveup_ext(vcpu, MSR_FP);
			} else {
				vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
			}
			break;
		}
		break;
	case SPRN_HID4:
	case SPRN_HID4_GEKKO:
		to_book3s(vcpu)->hid[4] = spr_val;
		break;
	case SPRN_HID5:
		to_book3s(vcpu)->hid[5] = spr_val;
		/* guest HID5 set can change is_dcbz32 */
		if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
		    (mfmsr() & MSR_HV))
			vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
		break;
	case SPRN_GQR0:
	case SPRN_GQR1:
	case SPRN_GQR2:
	case SPRN_GQR3:
	case SPRN_GQR4:
	case SPRN_GQR5:
	case SPRN_GQR6:
	case SPRN_GQR7:
		to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
		break;
#ifdef CONFIG_PPC_BOOK3S_64
	case SPRN_FSCR:
		kvmppc_set_fscr(vcpu, spr_val);
		break;
	case SPRN_BESCR:
		vcpu->arch.bescr = spr_val;
		break;
	case SPRN_EBBHR:
		vcpu->arch.ebbhr = spr_val;
		break;
	case SPRN_EBBRR:
		vcpu->arch.ebbrr = spr_val;
		break;
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	case SPRN_TFHAR:
		vcpu->arch.tfhar = spr_val;
		break;
	case SPRN_TEXASR:
		vcpu->arch.texasr = spr_val;
		break;
	case SPRN_TFIAR:
		vcpu->arch.tfiar = spr_val;
		break;
#endif
#endif
	case SPRN_ICTC:
	case SPRN_THRM1:
	case SPRN_THRM2:
	case SPRN_THRM3:
	case SPRN_CTRLF:
	case SPRN_CTRLT:
	case SPRN_L2CR:
	case SPRN_DSCR:
	case SPRN_MMCR0_GEKKO:
	case SPRN_MMCR1_GEKKO:
	case SPRN_PMC1_GEKKO:
	case SPRN_PMC2_GEKKO:
	case SPRN_PMC3_GEKKO:
	case SPRN_PMC4_GEKKO:
	case SPRN_WPAR_GEKKO:
	case SPRN_MSSSR0:
	case SPRN_DABR:
#ifdef CONFIG_PPC_BOOK3S_64
	case SPRN_MMCRS:
	case SPRN_MMCRA:
	case SPRN_MMCR0:
	case SPRN_MMCR1:
	case SPRN_MMCR2:
	case SPRN_UMMCR2:
#endif
		break;
unprivileged:
	default:
		printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
#ifndef DEBUG_SPR
		emulated = EMULATE_FAIL;
#endif
		break;
	}

	return emulated;
}

int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
{
	int emulated = EMULATE_DONE;

	switch (sprn) {
	case SPRN_IBAT0U ... SPRN_IBAT3L:
	case SPRN_IBAT4U ... SPRN_IBAT7L:
	case SPRN_DBAT0U ... SPRN_DBAT3L:
	case SPRN_DBAT4U ... SPRN_DBAT7L:
	{
		struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);

		if (sprn % 2)
			*spr_val = bat->raw >> 32;
		else
			*spr_val = bat->raw;

		break;
	}
	case SPRN_SDR1:
		if (!spr_allowed(vcpu, PRIV_HYPER))
			goto unprivileged;
		*spr_val = to_book3s(vcpu)->sdr1;
		break;
	case SPRN_DSISR:
		*spr_val = kvmppc_get_dsisr(vcpu);
		break;
	case SPRN_DAR:
		*spr_val = kvmppc_get_dar(vcpu);
		break;
	case SPRN_HIOR:
		*spr_val = to_book3s(vcpu)->hior;
		break;
	case SPRN_HID0:
		*spr_val = to_book3s(vcpu)->hid[0];
		break;
	case SPRN_HID1:
		*spr_val = to_book3s(vcpu)->hid[1];
		break;
	case SPRN_HID2:
	case SPRN_HID2_GEKKO:
		*spr_val = to_book3s(vcpu)->hid[2];
		break;
	case SPRN_HID4:
	case SPRN_HID4_GEKKO:
		*spr_val = to_book3s(vcpu)->hid[4];
		break;
	case SPRN_HID5:
		*spr_val = to_book3s(vcpu)->hid[5];
		break;
	case SPRN_CFAR:
	case SPRN_DSCR:
		*spr_val = 0;
		break;
	case SPRN_PURR:
		/*
		 * On exit we would have updated purr
		 */
		*spr_val = vcpu->arch.purr;
		break;
	case SPRN_SPURR:
		/*
		 * On exit we would have updated spurr
		 */
		*spr_val = vcpu->arch.spurr;
		break;
	case SPRN_VTB:
		*spr_val = vcpu->arch.vtb;
		break;
	case SPRN_IC:
		*spr_val = vcpu->arch.ic;
		break;
	case SPRN_GQR0:
	case SPRN_GQR1:
	case SPRN_GQR2:
	case SPRN_GQR3:
	case SPRN_GQR4:
	case SPRN_GQR5:
	case SPRN_GQR6:
	case SPRN_GQR7:
		*spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0];
		break;
#ifdef CONFIG_PPC_BOOK3S_64
	case SPRN_FSCR:
		*spr_val = vcpu->arch.fscr;
		break;
	case SPRN_BESCR:
		*spr_val = vcpu->arch.bescr;
		break;
	case SPRN_EBBHR:
		*spr_val = vcpu->arch.ebbhr;
		break;
	case SPRN_EBBRR:
		*spr_val = vcpu->arch.ebbrr;
		break;
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	case SPRN_TFHAR:
		*spr_val = vcpu->arch.tfhar;
		break;
	case SPRN_TEXASR:
		*spr_val = vcpu->arch.texasr;
		break;
	case SPRN_TFIAR:
		*spr_val = vcpu->arch.tfiar;
		break;
#endif
#endif
	case SPRN_THRM1:
	case SPRN_THRM2:
	case SPRN_THRM3:
	case SPRN_CTRLF:
	case SPRN_CTRLT:
	case SPRN_L2CR:
	case SPRN_MMCR0_GEKKO:
	case SPRN_MMCR1_GEKKO:
	case SPRN_PMC1_GEKKO:
	case SPRN_PMC2_GEKKO:
	case SPRN_PMC3_GEKKO:
	case SPRN_PMC4_GEKKO:
	case SPRN_WPAR_GEKKO:
	case SPRN_MSSSR0:
	case SPRN_DABR:
#ifdef CONFIG_PPC_BOOK3S_64
	case SPRN_MMCRS:
	case SPRN_MMCRA:
	case SPRN_MMCR0:
	case SPRN_MMCR1:
	case SPRN_MMCR2:
	case SPRN_UMMCR2:
	case SPRN_TIR:
#endif
		*spr_val = 0;
		break;
	default:
unprivileged:
		printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
#ifndef DEBUG_SPR
		emulated = EMULATE_FAIL;
#endif
		break;
	}

	return emulated;
}

u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
{
	return make_dsisr(inst);
}

ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
{
#ifdef CONFIG_PPC_BOOK3S_64
	/*
	 * Linux's fix_alignment() assumes that DAR is valid, so can we
	 */
	return vcpu->arch.fault_dar;
#else
	ulong dar = 0;
	ulong ra = get_ra(inst);
	ulong rb = get_rb(inst);

	switch (get_op(inst)) {
	case OP_LFS:
	case OP_LFD:
	case OP_STFD:
	case OP_STFS:
		if (ra)
			dar = kvmppc_get_gpr(vcpu, ra);
		dar += (s32)((s16)inst);
		break;
	case 31:
		if (ra)
			dar = kvmppc_get_gpr(vcpu, ra);
		dar += kvmppc_get_gpr(vcpu, rb);
		break;
	default:
		printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
		break;
	}

	return dar;
#endif
}
Commit	Line	Data
c215c6e4 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <asm/kvm_ppc.h>
	21	#include <asm/disassemble.h>
	22	#include <asm/kvm_book3s.h>
	23	#include <asm/reg.h>
95327d08	24	#include <asm/switch_to.h>
b0a94d4e	25	#include <asm/time.h>
5358a963	26	#include "book3s.h"
c215c6e4 AG	27
	28	#define OP_19_XOP_RFID 18
	29	#define OP_19_XOP_RFI 50
	30
	31	#define OP_31_XOP_MFMSR 83
	32	#define OP_31_XOP_MTMSR 146
	33	#define OP_31_XOP_MTMSRD 178
71db4089	34	#define OP_31_XOP_MTSR 210
c215c6e4 AG	35	#define OP_31_XOP_MTSRIN 242
	36	#define OP_31_XOP_TLBIEL 274
	37	#define OP_31_XOP_TLBIE 306
50c7bb80 AG	38	/* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */
50c7bb80 AG	39	#define OP_31_XOP_FAKE_SC1 308
c215c6e4 AG	40	#define OP_31_XOP_SLBMTE 402
	41	#define OP_31_XOP_SLBIE 434
	42	#define OP_31_XOP_SLBIA 498
c664876c	43	#define OP_31_XOP_MFSR 595
c215c6e4	44	#define OP_31_XOP_MFSRIN 659
bd7cdbb7	45	#define OP_31_XOP_DCBA 758
c215c6e4 AG	46	#define OP_31_XOP_SLBMFEV 851
	47	#define OP_31_XOP_EIOIO 854
	48	#define OP_31_XOP_SLBMFEE 915
	49
	50	/* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
	51	#define OP_31_XOP_DCBZ 1010
	52
ca7f4203 AG	53	#define OP_LFS 48
	54	#define OP_LFD 50
	55	#define OP_STFS 52
	56	#define OP_STFD 54
	57
d6d549b2 AG	58	#define SPRN_GQR0 912
	59	#define SPRN_GQR1 913
	60	#define SPRN_GQR2 914
	61	#define SPRN_GQR3 915
	62	#define SPRN_GQR4 916
	63	#define SPRN_GQR5 917
	64	#define SPRN_GQR6 918
	65	#define SPRN_GQR7 919
	66
07b0907d AG	67	/* Book3S_32 defines mfsrin(v) - but that messes up our abstract
	68	* function pointers, so let's just disable the define. */
	69	#undef mfsrin
	70
317a8fa3 AG	71	enum priv_level {
	72	PRIV_PROBLEM = 0,
	73	PRIV_SUPER = 1,
	74	PRIV_HYPER = 2,
	75	};
	76
	77	static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
	78	{
	79	/* PAPR VMs only access supervisor SPRs */
	80	if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
	81	return false;
	82
	83	/* Limit user space to its own small SPR set */
5deb8e7a	84	if ((kvmppc_get_msr(vcpu) & MSR_PR) && level > PRIV_PROBLEM)
317a8fa3 AG	85	return false;
	86
	87	return true;
	88	}
	89
3a167bea AK	90	int kvmppc_core_emulate_op_pr(struct kvm_run run, struct kvm_vcpu vcpu,
3a167bea AK	91	unsigned int inst, int *advance)
c215c6e4 AG	92	{
c215c6e4 AG	93	int emulated = EMULATE_DONE;
c46dc9a8 AG	94	int rt = get_rt(inst);
	95	int rs = get_rs(inst);
	96	int ra = get_ra(inst);
	97	int rb = get_rb(inst);
42188365	98	u32 inst_sc = 0x44000002;
c215c6e4 AG	99
c215c6e4 AG	100	switch (get_op(inst)) {
42188365 AG	101	case 0:
	102	emulated = EMULATE_FAIL;
	103	if ((kvmppc_get_msr(vcpu) & MSR_LE) &&
	104	(inst == swab32(inst_sc))) {
	105	/*
	106	* This is the byte reversed syscall instruction of our
	107	* hypercall handler. Early versions of LE Linux didn't
	108	* swap the instructions correctly and ended up in
	109	* illegal instructions.
	110	* Just always fail hypercalls on these broken systems.
	111	*/
	112	kvmppc_set_gpr(vcpu, 3, EV_UNIMPLEMENTED);
	113	kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
	114	emulated = EMULATE_DONE;
	115	}
	116	break;
c215c6e4 AG	117	case 19:
	118	switch (get_xop(inst)) {
	119	case OP_19_XOP_RFID:
	120	case OP_19_XOP_RFI:
5deb8e7a AG	121	kvmppc_set_pc(vcpu, kvmppc_get_srr0(vcpu));
5deb8e7a AG	122	kvmppc_set_msr(vcpu, kvmppc_get_srr1(vcpu));
c215c6e4 AG	123	*advance = 0;
	124	break;
	125
	126	default:
	127	emulated = EMULATE_FAIL;
	128	break;
	129	}
	130	break;
	131	case 31:
	132	switch (get_xop(inst)) {
	133	case OP_31_XOP_MFMSR:
5deb8e7a	134	kvmppc_set_gpr(vcpu, rt, kvmppc_get_msr(vcpu));
c215c6e4 AG	135	break;
	136	case OP_31_XOP_MTMSRD:
	137	{
c46dc9a8	138	ulong rs_val = kvmppc_get_gpr(vcpu, rs);
c215c6e4	139	if (inst & 0x10000) {
5deb8e7a	140	ulong new_msr = kvmppc_get_msr(vcpu);
c46dc9a8 AG	141	new_msr &= ~(MSR_RI \| MSR_EE);
c46dc9a8 AG	142	new_msr \|= rs_val & (MSR_RI \| MSR_EE);
5deb8e7a	143	kvmppc_set_msr_fast(vcpu, new_msr);
c215c6e4	144	} else
c46dc9a8	145	kvmppc_set_msr(vcpu, rs_val);
c215c6e4 AG	146	break;
	147	}
	148	case OP_31_XOP_MTMSR:
c46dc9a8	149	kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
c215c6e4	150	break;
c664876c AG	151	case OP_31_XOP_MFSR:
	152	{
	153	int srnum;
	154
	155	srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
	156	if (vcpu->arch.mmu.mfsrin) {
	157	u32 sr;
	158	sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8	159	kvmppc_set_gpr(vcpu, rt, sr);
c664876c AG	160	}
	161	break;
	162	}
c215c6e4 AG	163	case OP_31_XOP_MFSRIN:
	164	{
	165	int srnum;
	166
c46dc9a8	167	srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
c215c6e4 AG	168	if (vcpu->arch.mmu.mfsrin) {
	169	u32 sr;
	170	sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
c46dc9a8	171	kvmppc_set_gpr(vcpu, rt, sr);
c215c6e4 AG	172	}
	173	break;
	174	}
71db4089 AG	175	case OP_31_XOP_MTSR:
	176	vcpu->arch.mmu.mtsrin(vcpu,
	177	(inst >> 16) & 0xf,
c46dc9a8	178	kvmppc_get_gpr(vcpu, rs));
71db4089	179	break;
c215c6e4 AG	180	case OP_31_XOP_MTSRIN:
c215c6e4 AG	181	vcpu->arch.mmu.mtsrin(vcpu,
c46dc9a8 AG	182	(kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
c46dc9a8 AG	183	kvmppc_get_gpr(vcpu, rs));
c215c6e4 AG	184	break;
	185	case OP_31_XOP_TLBIE:
	186	case OP_31_XOP_TLBIEL:
	187	{
	188	bool large = (inst & 0x00200000) ? true : false;
c46dc9a8	189	ulong addr = kvmppc_get_gpr(vcpu, rb);
c215c6e4 AG	190	vcpu->arch.mmu.tlbie(vcpu, addr, large);
	191	break;
	192	}
2ba9f0d8	193	#ifdef CONFIG_PPC_BOOK3S_64
50c7bb80 AG	194	case OP_31_XOP_FAKE_SC1:
	195	{
	196	/* SC 1 papr hypercalls */
	197	ulong cmd = kvmppc_get_gpr(vcpu, 3);
	198	int i;
	199
5deb8e7a	200	if ((kvmppc_get_msr(vcpu) & MSR_PR) \|\|
50c7bb80 AG	201	!vcpu->arch.papr_enabled) {
	202	emulated = EMULATE_FAIL;
	203	break;
	204	}
	205
	206	if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE)
	207	break;
	208
	209	run->papr_hcall.nr = cmd;
	210	for (i = 0; i < 9; ++i) {
	211	ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
	212	run->papr_hcall.args[i] = gpr;
	213	}
	214
0f47f9b5 BB	215	run->exit_reason = KVM_EXIT_PAPR_HCALL;
0f47f9b5 BB	216	vcpu->arch.hcall_needed = 1;
c402a3f4	217	emulated = EMULATE_EXIT_USER;
50c7bb80 AG	218	break;
	219	}
	220	#endif
c215c6e4 AG	221	case OP_31_XOP_EIOIO:
	222	break;
	223	case OP_31_XOP_SLBMTE:
	224	if (!vcpu->arch.mmu.slbmte)
	225	return EMULATE_FAIL;
	226
8e5b26b5	227	vcpu->arch.mmu.slbmte(vcpu,
c46dc9a8 AG	228	kvmppc_get_gpr(vcpu, rs),
c46dc9a8 AG	229	kvmppc_get_gpr(vcpu, rb));
c215c6e4 AG	230	break;
	231	case OP_31_XOP_SLBIE:
	232	if (!vcpu->arch.mmu.slbie)
	233	return EMULATE_FAIL;
	234
8e5b26b5	235	vcpu->arch.mmu.slbie(vcpu,
c46dc9a8	236	kvmppc_get_gpr(vcpu, rb));
c215c6e4 AG	237	break;
	238	case OP_31_XOP_SLBIA:
	239	if (!vcpu->arch.mmu.slbia)
	240	return EMULATE_FAIL;
	241
	242	vcpu->arch.mmu.slbia(vcpu);
	243	break;
	244	case OP_31_XOP_SLBMFEE:
	245	if (!vcpu->arch.mmu.slbmfee) {
	246	emulated = EMULATE_FAIL;
	247	} else {
c46dc9a8	248	ulong t, rb_val;
c215c6e4	249
c46dc9a8 AG	250	rb_val = kvmppc_get_gpr(vcpu, rb);
	251	t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
	252	kvmppc_set_gpr(vcpu, rt, t);
c215c6e4 AG	253	}
	254	break;
	255	case OP_31_XOP_SLBMFEV:
	256	if (!vcpu->arch.mmu.slbmfev) {
	257	emulated = EMULATE_FAIL;
	258	} else {
c46dc9a8	259	ulong t, rb_val;
c215c6e4	260
c46dc9a8 AG	261	rb_val = kvmppc_get_gpr(vcpu, rb);
	262	t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
	263	kvmppc_set_gpr(vcpu, rt, t);
c215c6e4 AG	264	}
c215c6e4 AG	265	break;
bd7cdbb7 AG	266	case OP_31_XOP_DCBA:
	267	/* Gets treated as NOP */
	268	break;
c215c6e4 AG	269	case OP_31_XOP_DCBZ:
c215c6e4 AG	270	{
c46dc9a8 AG	271	ulong rb_val = kvmppc_get_gpr(vcpu, rb);
c46dc9a8 AG	272	ulong ra_val = 0;
5467a97d	273	ulong addr, vaddr;
c215c6e4	274	u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
9fb244a2 AG	275	u32 dsisr;
9fb244a2 AG	276	int r;
c215c6e4	277
c46dc9a8 AG	278	if (ra)
c46dc9a8 AG	279	ra_val = kvmppc_get_gpr(vcpu, ra);
c215c6e4	280
c46dc9a8	281	addr = (ra_val + rb_val) & ~31ULL;
5deb8e7a	282	if (!(kvmppc_get_msr(vcpu) & MSR_SF))
c215c6e4	283	addr &= 0xffffffff;
5467a97d	284	vaddr = addr;
c215c6e4	285
9fb244a2 AG	286	r = kvmppc_st(vcpu, &addr, 32, zeros, true);
	287	if ((r == -ENOENT) \|\| (r == -EPERM)) {
	288	*advance = 0;
5deb8e7a	289	kvmppc_set_dar(vcpu, vaddr);
a2d56020	290	vcpu->arch.fault_dar = vaddr;
9fb244a2 AG	291
	292	dsisr = DSISR_ISSTORE;
	293	if (r == -ENOENT)
	294	dsisr \|= DSISR_NOHPTE;
	295	else if (r == -EPERM)
	296	dsisr \|= DSISR_PROTFAULT;
	297
5deb8e7a	298	kvmppc_set_dsisr(vcpu, dsisr);
a2d56020	299	vcpu->arch.fault_dsisr = dsisr;
9fb244a2	300
c215c6e4 AG	301	kvmppc_book3s_queue_irqprio(vcpu,
c215c6e4 AG	302	BOOK3S_INTERRUPT_DATA_STORAGE);
c215c6e4 AG	303	}
	304
	305	break;
	306	}
	307	default:
	308	emulated = EMULATE_FAIL;
	309	}
	310	break;
	311	default:
	312	emulated = EMULATE_FAIL;
	313	}
	314
831317b6 AG	315	if (emulated == EMULATE_FAIL)
	316	emulated = kvmppc_emulate_paired_single(run, vcpu);
	317
c215c6e4 AG	318	return emulated;
	319	}
	320
e15a1137 AG	321	void kvmppc_set_bat(struct kvm_vcpu vcpu, struct kvmppc_bat bat, bool upper,
	322	u32 val)
	323	{
	324	if (upper) {
	325	/* Upper BAT */
	326	u32 bl = (val >> 2) & 0x7ff;
	327	bat->bepi_mask = (~bl << 17);
	328	bat->bepi = val & 0xfffe0000;
	329	bat->vs = (val & 2) ? 1 : 0;
	330	bat->vp = (val & 1) ? 1 : 0;
	331	bat->raw = (bat->raw & 0xffffffff00000000ULL) \| val;
	332	} else {
	333	/* Lower BAT */
	334	bat->brpn = val & 0xfffe0000;
	335	bat->wimg = (val >> 3) & 0xf;
	336	bat->pp = val & 3;
	337	bat->raw = (bat->raw & 0x00000000ffffffffULL) \| ((u64)val << 32);
	338	}
	339	}
	340
c1c88e2f	341	static struct kvmppc_bat kvmppc_find_bat(struct kvm_vcpu vcpu, int sprn)
c04a695a AG	342	{
	343	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	344	struct kvmppc_bat *bat;
	345
	346	switch (sprn) {
	347	case SPRN_IBAT0U ... SPRN_IBAT3L:
	348	bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
	349	break;
	350	case SPRN_IBAT4U ... SPRN_IBAT7L:
	351	bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
	352	break;
	353	case SPRN_DBAT0U ... SPRN_DBAT3L:
	354	bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
	355	break;
	356	case SPRN_DBAT4U ... SPRN_DBAT7L:
	357	bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
	358	break;
	359	default:
	360	BUG();
	361	}
	362
c1c88e2f	363	return bat;
c215c6e4 AG	364	}
c215c6e4 AG	365
3a167bea	366	int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
c215c6e4 AG	367	{
	368	int emulated = EMULATE_DONE;
	369
	370	switch (sprn) {
	371	case SPRN_SDR1:
317a8fa3 AG	372	if (!spr_allowed(vcpu, PRIV_HYPER))
317a8fa3 AG	373	goto unprivileged;
8e5b26b5	374	to_book3s(vcpu)->sdr1 = spr_val;
c215c6e4 AG	375	break;
c215c6e4 AG	376	case SPRN_DSISR:
5deb8e7a	377	kvmppc_set_dsisr(vcpu, spr_val);
c215c6e4 AG	378	break;
c215c6e4 AG	379	case SPRN_DAR:
5deb8e7a	380	kvmppc_set_dar(vcpu, spr_val);
c215c6e4 AG	381	break;
c215c6e4 AG	382	case SPRN_HIOR:
8e5b26b5	383	to_book3s(vcpu)->hior = spr_val;
c215c6e4 AG	384	break;
	385	case SPRN_IBAT0U ... SPRN_IBAT3L:
	386	case SPRN_IBAT4U ... SPRN_IBAT7L:
	387	case SPRN_DBAT0U ... SPRN_DBAT3L:
	388	case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f AG	389	{
	390	struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
	391
	392	kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
c215c6e4 AG	393	/* BAT writes happen so rarely that we're ok to flush
	394	* everything here */
	395	kvmppc_mmu_pte_flush(vcpu, 0, 0);
c04a695a	396	kvmppc_mmu_flush_segments(vcpu);
c215c6e4	397	break;
c1c88e2f	398	}
c215c6e4	399	case SPRN_HID0:
8e5b26b5	400	to_book3s(vcpu)->hid[0] = spr_val;
c215c6e4 AG	401	break;
c215c6e4 AG	402	case SPRN_HID1:
8e5b26b5	403	to_book3s(vcpu)->hid[1] = spr_val;
c215c6e4 AG	404	break;
c215c6e4 AG	405	case SPRN_HID2:
8e5b26b5	406	to_book3s(vcpu)->hid[2] = spr_val;
c215c6e4	407	break;
d6d549b2 AG	408	case SPRN_HID2_GEKKO:
	409	to_book3s(vcpu)->hid[2] = spr_val;
	410	/* HID2.PSE controls paired single on gekko */
	411	switch (vcpu->arch.pvr) {
	412	case 0x00080200: /* lonestar 2.0 */
	413	case 0x00088202: /* lonestar 2.2 */
	414	case 0x70000100: /* gekko 1.0 */
	415	case 0x00080100: /* gekko 2.0 */
	416	case 0x00083203: /* gekko 2.3a */
	417	case 0x00083213: /* gekko 2.3b */
	418	case 0x00083204: /* gekko 2.4 */
	419	case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
b83d4a9c AG	420	case 0x00087200: /* broadway */
	421	if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
	422	/* Native paired singles */
	423	} else if (spr_val & (1 << 29)) { /* HID2.PSE */
d6d549b2 AG	424	vcpu->arch.hflags \|= BOOK3S_HFLAG_PAIRED_SINGLE;
	425	kvmppc_giveup_ext(vcpu, MSR_FP);
	426	} else {
	427	vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
	428	}
	429	break;
	430	}
	431	break;
c215c6e4	432	case SPRN_HID4:
d6d549b2	433	case SPRN_HID4_GEKKO:
8e5b26b5	434	to_book3s(vcpu)->hid[4] = spr_val;
c215c6e4 AG	435	break;
c215c6e4 AG	436	case SPRN_HID5:
8e5b26b5	437	to_book3s(vcpu)->hid[5] = spr_val;
c215c6e4 AG	438	/* guest HID5 set can change is_dcbz32 */
	439	if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
	440	(mfmsr() & MSR_HV))
	441	vcpu->arch.hflags \|= BOOK3S_HFLAG_DCBZ32;
	442	break;
d6d549b2 AG	443	case SPRN_GQR0:
	444	case SPRN_GQR1:
	445	case SPRN_GQR2:
	446	case SPRN_GQR3:
	447	case SPRN_GQR4:
	448	case SPRN_GQR5:
	449	case SPRN_GQR6:
	450	case SPRN_GQR7:
	451	to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
	452	break;
8e6afa36	453	#ifdef CONFIG_PPC_BOOK3S_64
616dff86	454	case SPRN_FSCR:
8e6afa36	455	kvmppc_set_fscr(vcpu, spr_val);
616dff86	456	break;
2e23f544 AG	457	case SPRN_BESCR:
	458	vcpu->arch.bescr = spr_val;
	459	break;
	460	case SPRN_EBBHR:
	461	vcpu->arch.ebbhr = spr_val;
	462	break;
	463	case SPRN_EBBRR:
	464	vcpu->arch.ebbrr = spr_val;
	465	break;
9916d57e AG	466	#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	467	case SPRN_TFHAR:
	468	vcpu->arch.tfhar = spr_val;
	469	break;
	470	case SPRN_TEXASR:
	471	vcpu->arch.texasr = spr_val;
	472	break;
	473	case SPRN_TFIAR:
	474	vcpu->arch.tfiar = spr_val;
	475	break;
	476	#endif
2e23f544	477	#endif
c215c6e4 AG	478	case SPRN_ICTC:
	479	case SPRN_THRM1:
	480	case SPRN_THRM2:
	481	case SPRN_THRM3:
	482	case SPRN_CTRLF:
	483	case SPRN_CTRLT:
d6d549b2	484	case SPRN_L2CR:
b0a94d4e	485	case SPRN_DSCR:
d6d549b2 AG	486	case SPRN_MMCR0_GEKKO:
	487	case SPRN_MMCR1_GEKKO:
	488	case SPRN_PMC1_GEKKO:
	489	case SPRN_PMC2_GEKKO:
	490	case SPRN_PMC3_GEKKO:
	491	case SPRN_PMC4_GEKKO:
	492	case SPRN_WPAR_GEKKO:
f2be6550	493	case SPRN_MSSSR0:
f3532028	494	case SPRN_DABR:
f8f6eb0d AG	495	#ifdef CONFIG_PPC_BOOK3S_64
	496	case SPRN_MMCRS:
	497	case SPRN_MMCRA:
	498	case SPRN_MMCR0:
	499	case SPRN_MMCR1:
	500	case SPRN_MMCR2:
759896fa	501	case SPRN_UMMCR2:
f8f6eb0d	502	#endif
c215c6e4	503	break;
317a8fa3	504	unprivileged:
c215c6e4 AG	505	default:
	506	printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
	507	#ifndef DEBUG_SPR
	508	emulated = EMULATE_FAIL;
	509	#endif
	510	break;
	511	}
	512
	513	return emulated;
	514	}
	515
3a167bea	516	int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu vcpu, int sprn, ulong spr_val)
c215c6e4 AG	517	{
	518	int emulated = EMULATE_DONE;
	519
	520	switch (sprn) {
c04a695a AG	521	case SPRN_IBAT0U ... SPRN_IBAT3L:
	522	case SPRN_IBAT4U ... SPRN_IBAT7L:
	523	case SPRN_DBAT0U ... SPRN_DBAT3L:
	524	case SPRN_DBAT4U ... SPRN_DBAT7L:
c1c88e2f AG	525	{
	526	struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
	527
	528	if (sprn % 2)
54771e62	529	*spr_val = bat->raw >> 32;
c1c88e2f	530	else
54771e62	531	*spr_val = bat->raw;
c1c88e2f	532
c04a695a	533	break;
c1c88e2f	534	}
c215c6e4	535	case SPRN_SDR1:
317a8fa3 AG	536	if (!spr_allowed(vcpu, PRIV_HYPER))
317a8fa3 AG	537	goto unprivileged;
54771e62	538	*spr_val = to_book3s(vcpu)->sdr1;
c215c6e4 AG	539	break;
c215c6e4 AG	540	case SPRN_DSISR:
5deb8e7a	541	*spr_val = kvmppc_get_dsisr(vcpu);
c215c6e4 AG	542	break;
c215c6e4 AG	543	case SPRN_DAR:
5deb8e7a	544	*spr_val = kvmppc_get_dar(vcpu);
c215c6e4 AG	545	break;
c215c6e4 AG	546	case SPRN_HIOR:
54771e62	547	*spr_val = to_book3s(vcpu)->hior;
c215c6e4 AG	548	break;
c215c6e4 AG	549	case SPRN_HID0:
54771e62	550	*spr_val = to_book3s(vcpu)->hid[0];
c215c6e4 AG	551	break;
c215c6e4 AG	552	case SPRN_HID1:
54771e62	553	*spr_val = to_book3s(vcpu)->hid[1];
c215c6e4 AG	554	break;
c215c6e4 AG	555	case SPRN_HID2:
d6d549b2	556	case SPRN_HID2_GEKKO:
54771e62	557	*spr_val = to_book3s(vcpu)->hid[2];
c215c6e4 AG	558	break;
c215c6e4 AG	559	case SPRN_HID4:
d6d549b2	560	case SPRN_HID4_GEKKO:
54771e62	561	*spr_val = to_book3s(vcpu)->hid[4];
c215c6e4 AG	562	break;
c215c6e4 AG	563	case SPRN_HID5:
54771e62	564	*spr_val = to_book3s(vcpu)->hid[5];
c215c6e4	565	break;
aacf9aa3	566	case SPRN_CFAR:
b0a94d4e	567	case SPRN_DSCR:
54771e62	568	*spr_val = 0;
aacf9aa3	569	break;
b0a94d4e	570	case SPRN_PURR:
3cd60e31 AK	571	/*
	572	* On exit we would have updated purr
	573	*/
	574	*spr_val = vcpu->arch.purr;
b0a94d4e PM	575	break;
b0a94d4e PM	576	case SPRN_SPURR:
3cd60e31 AK	577	/*
	578	* On exit we would have updated spurr
	579	*/
	580	*spr_val = vcpu->arch.spurr;
b0a94d4e	581	break;
8f42ab27 AK	582	case SPRN_VTB:
	583	*spr_val = vcpu->arch.vtb;
	584	break;
06da28e7 AK	585	case SPRN_IC:
	586	*spr_val = vcpu->arch.ic;
	587	break;
d6d549b2 AG	588	case SPRN_GQR0:
	589	case SPRN_GQR1:
	590	case SPRN_GQR2:
	591	case SPRN_GQR3:
	592	case SPRN_GQR4:
	593	case SPRN_GQR5:
	594	case SPRN_GQR6:
	595	case SPRN_GQR7:
54771e62	596	*spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0];
d6d549b2	597	break;
8e6afa36	598	#ifdef CONFIG_PPC_BOOK3S_64
616dff86 AG	599	case SPRN_FSCR:
	600	*spr_val = vcpu->arch.fscr;
	601	break;
2e23f544 AG	602	case SPRN_BESCR:
	603	*spr_val = vcpu->arch.bescr;
	604	break;
	605	case SPRN_EBBHR:
	606	*spr_val = vcpu->arch.ebbhr;
	607	break;
	608	case SPRN_EBBRR:
	609	*spr_val = vcpu->arch.ebbrr;
	610	break;
9916d57e AG	611	#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	612	case SPRN_TFHAR:
	613	*spr_val = vcpu->arch.tfhar;
	614	break;
	615	case SPRN_TEXASR:
	616	*spr_val = vcpu->arch.texasr;
	617	break;
	618	case SPRN_TFIAR:
	619	*spr_val = vcpu->arch.tfiar;
	620	break;
	621	#endif
2e23f544	622	#endif
c215c6e4 AG	623	case SPRN_THRM1:
	624	case SPRN_THRM2:
	625	case SPRN_THRM3:
	626	case SPRN_CTRLF:
	627	case SPRN_CTRLT:
d6d549b2 AG	628	case SPRN_L2CR:
	629	case SPRN_MMCR0_GEKKO:
	630	case SPRN_MMCR1_GEKKO:
	631	case SPRN_PMC1_GEKKO:
	632	case SPRN_PMC2_GEKKO:
	633	case SPRN_PMC3_GEKKO:
	634	case SPRN_PMC4_GEKKO:
	635	case SPRN_WPAR_GEKKO:
f2be6550	636	case SPRN_MSSSR0:
f3532028	637	case SPRN_DABR:
f8f6eb0d AG	638	#ifdef CONFIG_PPC_BOOK3S_64
	639	case SPRN_MMCRS:
	640	case SPRN_MMCRA:
	641	case SPRN_MMCR0:
	642	case SPRN_MMCR1:
	643	case SPRN_MMCR2:
759896fa	644	case SPRN_UMMCR2:
a5948fa0	645	case SPRN_TIR:
f8f6eb0d	646	#endif
54771e62	647	*spr_val = 0;
c215c6e4 AG	648	break;
c215c6e4 AG	649	default:
317a8fa3	650	unprivileged:
c215c6e4 AG	651	printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
	652	#ifndef DEBUG_SPR
	653	emulated = EMULATE_FAIL;
	654	#endif
	655	break;
	656	}
	657
	658	return emulated;
	659	}
	660
ca7f4203 AG	661	u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
ca7f4203 AG	662	{
ddca156a	663	return make_dsisr(inst);
ca7f4203 AG	664	}
	665
	666	ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
	667	{
7310f3a5 AK	668	#ifdef CONFIG_PPC_BOOK3S_64
	669	/*
	670	* Linux's fix_alignment() assumes that DAR is valid, so can we
	671	*/
	672	return vcpu->arch.fault_dar;
	673	#else
ca7f4203	674	ulong dar = 0;
c46dc9a8 AG	675	ulong ra = get_ra(inst);
c46dc9a8 AG	676	ulong rb = get_rb(inst);
ca7f4203 AG	677
	678	switch (get_op(inst)) {
	679	case OP_LFS:
	680	case OP_LFD:
	681	case OP_STFD:
	682	case OP_STFS:
ca7f4203 AG	683	if (ra)
	684	dar = kvmppc_get_gpr(vcpu, ra);
	685	dar += (s32)((s16)inst);
	686	break;
	687	case 31:
ca7f4203 AG	688	if (ra)
ca7f4203 AG	689	dar = kvmppc_get_gpr(vcpu, ra);
c46dc9a8	690	dar += kvmppc_get_gpr(vcpu, rb);
ca7f4203 AG	691	break;
	692	default:
	693	printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
	694	break;
	695	}
	696
	697	return dar;
7310f3a5	698	#endif
ca7f4203	699	}