[deliverable/linux.git] / arch / x86 / events / intel / pt.h

/*
 * Intel(R) Processor Trace PMU driver for perf
 * Copyright (c) 2013-2014, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * Intel PT is specified in the Intel Architecture Instruction Set Extensions
 * Programming Reference:
 * http://software.intel.com/en-us/intel-isa-extensions
 */

#ifndef __INTEL_PT_H__
#define __INTEL_PT_H__

/*
 * Single-entry ToPA: when this close to region boundary, switch
 * buffers to avoid losing data.
 */
#define TOPA_PMI_MARGIN 512

#define TOPA_SHIFT 12

static inline unsigned int sizes(unsigned int tsz)
{
	return 1 << (tsz + TOPA_SHIFT);
};

struct topa_entry {
	u64	end	: 1;
	u64	rsvd0	: 1;
	u64	intr	: 1;
	u64	rsvd1	: 1;
	u64	stop	: 1;
	u64	rsvd2	: 1;
	u64	size	: 4;
	u64	rsvd3	: 2;
	u64	base	: 36;
	u64	rsvd4	: 16;
};

#define PT_CPUID_LEAVES		2
#define PT_CPUID_REGS_NUM	4 /* number of regsters (eax, ebx, ecx, edx) */

enum pt_capabilities {
	PT_CAP_max_subleaf = 0,
	PT_CAP_cr3_filtering,
	PT_CAP_psb_cyc,
	PT_CAP_mtc,
	PT_CAP_topa_output,
	PT_CAP_topa_multiple_entries,
	PT_CAP_single_range_output,
	PT_CAP_payloads_lip,
	PT_CAP_mtc_periods,
	PT_CAP_cycle_thresholds,
	PT_CAP_psb_periods,
};

struct pt_pmu {
	struct pmu		pmu;
	u32			caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
	bool			vmx;
};

/**
 * struct pt_buffer - buffer configuration; one buffer per task_struct or
 *		cpu, depending on perf event configuration
 * @cpu:	cpu for per-cpu allocation
 * @tables:	list of ToPA tables in this buffer
 * @first:	shorthand for first topa table
 * @last:	shorthand for last topa table
 * @cur:	current topa table
 * @nr_pages:	buffer size in pages
 * @cur_idx:	current output region's index within @cur table
 * @output_off:	offset within the current output region
 * @data_size:	running total of the amount of data in this buffer
 * @lost:	if data was lost/truncated
 * @head:	logical write offset inside the buffer
 * @snapshot:	if this is for a snapshot/overwrite counter
 * @stop_pos:	STOP topa entry in the buffer
 * @intr_pos:	INT topa entry in the buffer
 * @data_pages:	array of pages from perf
 * @topa_index:	table of topa entries indexed by page offset
 */
struct pt_buffer {
	int			cpu;
	struct list_head	tables;
	struct topa		*first, *last, *cur;
	unsigned int		cur_idx;
	size_t			output_off;
	unsigned long		nr_pages;
	local_t			data_size;
	local_t			lost;
	local64_t		head;
	bool			snapshot;
	unsigned long		stop_pos, intr_pos;
	void			**data_pages;
	struct topa_entry	*topa_index[0];
};

/**
 * struct pt - per-cpu pt context
 * @handle:	perf output handle
 * @handle_nmi:	do handle PT PMI on this cpu, there's an active event
 * @vmx_on:	1 if VMX is ON on this cpu
 */
struct pt {
	struct perf_output_handle handle;
	int			handle_nmi;
	int			vmx_on;
};

#endif /* __INTEL_PT_H__ */
Commit	Line	Data
52ca9ced AS	1	/*
	2	* Intel(R) Processor Trace PMU driver for perf
	3	* Copyright (c) 2013-2014, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* Intel PT is specified in the Intel Architecture Instruction Set Extensions
	15	* Programming Reference:
	16	* http://software.intel.com/en-us/intel-isa-extensions
	17	*/
	18
	19	#ifndef __INTEL_PT_H__
	20	#define __INTEL_PT_H__
	21
	22	/*
	23	* Single-entry ToPA: when this close to region boundary, switch
	24	* buffers to avoid losing data.
	25	*/
	26	#define TOPA_PMI_MARGIN 512
	27
709bc871	28	#define TOPA_SHIFT 12
52ca9ced	29
709bc871	30	static inline unsigned int sizes(unsigned int tsz)
52ca9ced	31	{
709bc871	32	return 1 << (tsz + TOPA_SHIFT);
52ca9ced AS	33	};
	34
	35	struct topa_entry {
	36	u64 end : 1;
	37	u64 rsvd0 : 1;
	38	u64 intr : 1;
	39	u64 rsvd1 : 1;
	40	u64 stop : 1;
	41	u64 rsvd2 : 1;
	42	u64 size : 4;
	43	u64 rsvd3 : 2;
	44	u64 base : 36;
	45	u64 rsvd4 : 16;
	46	};
	47
709bc871 TI	48	#define PT_CPUID_LEAVES 2
709bc871 TI	49	#define PT_CPUID_REGS_NUM 4 /* number of regsters (eax, ebx, ecx, edx) */
52ca9ced AS	50
	51	enum pt_capabilities {
	52	PT_CAP_max_subleaf = 0,
	53	PT_CAP_cr3_filtering,
b1bf72d6 AS	54	PT_CAP_psb_cyc,
b1bf72d6 AS	55	PT_CAP_mtc,
52ca9ced AS	56	PT_CAP_topa_output,
52ca9ced AS	57	PT_CAP_topa_multiple_entries,
b1bf72d6	58	PT_CAP_single_range_output,
52ca9ced	59	PT_CAP_payloads_lip,
b1bf72d6 AS	60	PT_CAP_mtc_periods,
	61	PT_CAP_cycle_thresholds,
	62	PT_CAP_psb_periods,
52ca9ced AS	63	};
	64
	65	struct pt_pmu {
	66	struct pmu pmu;
709bc871	67	u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
1c5ac21a	68	bool vmx;
52ca9ced AS	69	};
	70
	71	/**
	72	* struct pt_buffer - buffer configuration; one buffer per task_struct or
	73	* cpu, depending on perf event configuration
	74	* @cpu: cpu for per-cpu allocation
	75	* @tables: list of ToPA tables in this buffer
	76	* @first: shorthand for first topa table
	77	* @last: shorthand for last topa table
	78	* @cur: current topa table
	79	* @nr_pages: buffer size in pages
	80	* @cur_idx: current output region's index within @cur table
	81	* @output_off: offset within the current output region
	82	* @data_size: running total of the amount of data in this buffer
	83	* @lost: if data was lost/truncated
	84	* @head: logical write offset inside the buffer
	85	* @snapshot: if this is for a snapshot/overwrite counter
	86	* @stop_pos: STOP topa entry in the buffer
	87	* @intr_pos: INT topa entry in the buffer
	88	* @data_pages: array of pages from perf
	89	* @topa_index: table of topa entries indexed by page offset
	90	*/
	91	struct pt_buffer {
	92	int cpu;
	93	struct list_head tables;
	94	struct topa first, last, *cur;
	95	unsigned int cur_idx;
	96	size_t output_off;
	97	unsigned long nr_pages;
	98	local_t data_size;
	99	local_t lost;
	100	local64_t head;
	101	bool snapshot;
	102	unsigned long stop_pos, intr_pos;
	103	void **data_pages;
	104	struct topa_entry *topa_index[0];
	105	};
	106
	107	/**
	108	* struct pt - per-cpu pt context
	109	* @handle: perf output handle
	110	* @handle_nmi: do handle PT PMI on this cpu, there's an active event
1c5ac21a	111	* @vmx_on: 1 if VMX is ON on this cpu
52ca9ced AS	112	*/
	113	struct pt {
	114	struct perf_output_handle handle;
	115	int handle_nmi;
1c5ac21a	116	int vmx_on;
52ca9ced AS	117	};
	118
	119	#endif /* __INTEL_PT_H__ */