Commit | Line | Data |
---|---|---|
084ee1c6 JS |
1 | #include <linux/io.h> |
2 | #include <linux/memblock.h> | |
3 | ||
4 | #include <asm/cacheflush.h> | |
5 | #include <asm/pgtable.h> | |
6 | #include <asm/realmode.h> | |
18bc7bd5 | 7 | #include <asm/tlbflush.h> |
084ee1c6 | 8 | |
b429dbf6 | 9 | struct real_mode_header *real_mode_header; |
cda846f1 | 10 | u32 *trampoline_cr4_features; |
084ee1c6 | 11 | |
b234e8a0 TG |
12 | /* Hold the pgd entry used on booting additional CPUs */ |
13 | pgd_t trampoline_pgd_entry; | |
14 | ||
4f7b9226 | 15 | void __init reserve_real_mode(void) |
084ee1c6 JS |
16 | { |
17 | phys_addr_t mem; | |
4f7b9226 YL |
18 | unsigned char *base; |
19 | size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); | |
20 | ||
21 | /* Has to be under 1M so we can execute real-mode AP code. */ | |
22 | mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE); | |
23 | if (!mem) | |
24 | panic("Cannot allocate trampoline\n"); | |
25 | ||
26 | base = __va(mem); | |
27 | memblock_reserve(mem, size); | |
28 | real_mode_header = (struct real_mode_header *) base; | |
29 | printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n", | |
30 | base, (unsigned long long)mem, size); | |
31 | } | |
32 | ||
33 | void __init setup_real_mode(void) | |
34 | { | |
084ee1c6 | 35 | u16 real_mode_seg; |
7306006f | 36 | const u32 *rel; |
084ee1c6 | 37 | u32 count; |
b429dbf6 | 38 | unsigned char *base; |
7306006f | 39 | unsigned long phys_base; |
f37240f1 | 40 | struct trampoline_header *trampoline_header; |
b429dbf6 | 41 | size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); |
f37240f1 JS |
42 | #ifdef CONFIG_X86_64 |
43 | u64 *trampoline_pgd; | |
638d957b | 44 | u64 efer; |
f37240f1 | 45 | #endif |
084ee1c6 | 46 | |
4f7b9226 | 47 | base = (unsigned char *)real_mode_header; |
084ee1c6 | 48 | |
b429dbf6 | 49 | memcpy(base, real_mode_blob, size); |
084ee1c6 | 50 | |
7306006f PA |
51 | phys_base = __pa(base); |
52 | real_mode_seg = phys_base >> 4; | |
53 | ||
084ee1c6 JS |
54 | rel = (u32 *) real_mode_relocs; |
55 | ||
56 | /* 16-bit segment relocations. */ | |
7306006f PA |
57 | count = *rel++; |
58 | while (count--) { | |
59 | u16 *seg = (u16 *) (base + *rel++); | |
084ee1c6 JS |
60 | *seg = real_mode_seg; |
61 | } | |
62 | ||
63 | /* 32-bit linear relocations. */ | |
7306006f PA |
64 | count = *rel++; |
65 | while (count--) { | |
66 | u32 *ptr = (u32 *) (base + *rel++); | |
67 | *ptr += phys_base; | |
084ee1c6 JS |
68 | } |
69 | ||
f37240f1 JS |
70 | /* Must be perfomed *after* relocation. */ |
71 | trampoline_header = (struct trampoline_header *) | |
72 | __va(real_mode_header->trampoline_header); | |
73 | ||
48927bbb | 74 | #ifdef CONFIG_X86_32 |
fc8d7826 | 75 | trampoline_header->start = __pa_symbol(startup_32_smp); |
f37240f1 | 76 | trampoline_header->gdt_limit = __BOOT_DS + 7; |
fc8d7826 | 77 | trampoline_header->gdt_base = __pa_symbol(boot_gdt); |
48927bbb | 78 | #else |
79603879 PA |
79 | /* |
80 | * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR | |
81 | * so we need to mask it out. | |
82 | */ | |
638d957b PA |
83 | rdmsrl(MSR_EFER, efer); |
84 | trampoline_header->efer = efer & ~EFER_LMA; | |
cda846f1 | 85 | |
f37240f1 | 86 | trampoline_header->start = (u64) secondary_startup_64; |
cda846f1 | 87 | trampoline_cr4_features = &trampoline_header->cr4; |
18bc7bd5 | 88 | *trampoline_cr4_features = mmu_cr4_features; |
cda846f1 | 89 | |
f37240f1 | 90 | trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); |
b234e8a0 | 91 | trampoline_pgd[0] = trampoline_pgd_entry.pgd; |
9735e91e | 92 | trampoline_pgd[511] = init_level4_pgt[511].pgd; |
48927bbb | 93 | #endif |
084ee1c6 JS |
94 | } |
95 | ||
96 | /* | |
4f7b9226 | 97 | * reserve_real_mode() gets called very early, to guarantee the |
231b3642 | 98 | * availability of low memory. This is before the proper kernel page |
084ee1c6 | 99 | * tables are set up, so we cannot set page permissions in that |
231b3642 YL |
100 | * function. Also trampoline code will be executed by APs so we |
101 | * need to mark it executable at do_pre_smp_initcalls() at least, | |
102 | * thus run it as a early_initcall(). | |
084ee1c6 JS |
103 | */ |
104 | static int __init set_real_mode_permissions(void) | |
105 | { | |
b429dbf6 JS |
106 | unsigned char *base = (unsigned char *) real_mode_header; |
107 | size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); | |
084ee1c6 | 108 | |
f156ffc4 | 109 | size_t ro_size = |
b429dbf6 JS |
110 | PAGE_ALIGN(real_mode_header->ro_end) - |
111 | __pa(base); | |
f156ffc4 JS |
112 | |
113 | size_t text_size = | |
b429dbf6 JS |
114 | PAGE_ALIGN(real_mode_header->ro_end) - |
115 | real_mode_header->text_start; | |
f156ffc4 JS |
116 | |
117 | unsigned long text_start = | |
b429dbf6 | 118 | (unsigned long) __va(real_mode_header->text_start); |
f156ffc4 | 119 | |
b429dbf6 JS |
120 | set_memory_nx((unsigned long) base, size >> PAGE_SHIFT); |
121 | set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT); | |
f156ffc4 JS |
122 | set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT); |
123 | ||
084ee1c6 JS |
124 | return 0; |
125 | } | |
231b3642 | 126 | early_initcall(set_real_mode_permissions); |