[deliverable/linux.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c

/*
 * Copyright 2008 Advanced Micro Devices, Inc.
 * Copyright 2008 Red Hat Inc.
 * Copyright 2009 Jerome Glisse.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alex Deucher
 *          Jerome Glisse
 */
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <drm/radeon_drm.h>
#include "radeon_reg.h"
#include "radeon.h"
#include "atom.h"

#include <linux/pm_runtime.h>

#define RADEON_WAIT_IDLE_TIMEOUT 200

/**
 * radeon_driver_irq_handler_kms - irq handler for KMS
 *
 * @int irq, void *arg: args
 *
 * This is the irq handler for the radeon KMS driver (all asics).
 * radeon_irq_process is a macro that points to the per-asic
 * irq handler callback.
 */
irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
{
	struct drm_device *dev = (struct drm_device *) arg;
	struct radeon_device *rdev = dev->dev_private;
	irqreturn_t ret;

	ret = radeon_irq_process(rdev);
	if (ret == IRQ_HANDLED)
		pm_runtime_mark_last_busy(dev->dev);
	return ret;
}

/*
 * Handle hotplug events outside the interrupt handler proper.
 */
/**
 * radeon_hotplug_work_func - display hotplug work handler
 *
 * @work: work struct
 *
 * This is the hot plug event work handler (all asics).
 * The work gets scheduled from the irq handler if there
 * was a hot plug interrupt.  It walks the connector table
 * and calls the hotplug handler for each one, then sends
 * a drm hotplug event to alert userspace.
 */
static void radeon_hotplug_work_func(struct work_struct *work)
{
	struct radeon_device *rdev = container_of(work, struct radeon_device,
						  hotplug_work.work);
	struct drm_device *dev = rdev->ddev;
	struct drm_mode_config *mode_config = &dev->mode_config;
	struct drm_connector *connector;

	/* we can race here at startup, some boards seem to trigger
	 * hotplug irqs when they shouldn't. */
	if (!rdev->mode_info.mode_config_initialized)
		return;

	mutex_lock(&mode_config->mutex);
	if (mode_config->num_connector) {
		list_for_each_entry(connector, &mode_config->connector_list, head)
			radeon_connector_hotplug(connector);
	}
	mutex_unlock(&mode_config->mutex);
	/* Just fire off a uevent and let userspace tell us what to do */
	drm_helper_hpd_irq_event(dev);
}

static void radeon_dp_work_func(struct work_struct *work)
{
	struct radeon_device *rdev = container_of(work, struct radeon_device,
						  dp_work);
	struct drm_device *dev = rdev->ddev;
	struct drm_mode_config *mode_config = &dev->mode_config;
	struct drm_connector *connector;

	/* this should take a mutex */
	if (mode_config->num_connector) {
		list_for_each_entry(connector, &mode_config->connector_list, head)
			radeon_connector_hotplug(connector);
	}
}
/**
 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
 *
 * @dev: drm dev pointer
 *
 * Gets the hw ready to enable irqs (all asics).
 * This function disables all interrupt sources on the GPU.
 */
void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
{
	struct radeon_device *rdev = dev->dev_private;
	unsigned long irqflags;
	unsigned i;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	/* Disable *all* interrupts */
	for (i = 0; i < RADEON_NUM_RINGS; i++)
		atomic_set(&rdev->irq.ring_int[i], 0);
	rdev->irq.dpm_thermal = false;
	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
		rdev->irq.hpd[i] = false;
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
		rdev->irq.crtc_vblank_int[i] = false;
		atomic_set(&rdev->irq.pflip[i], 0);
		rdev->irq.afmt[i] = false;
	}
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	/* Clear bits */
	radeon_irq_process(rdev);
}

/**
 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
 *
 * @dev: drm dev pointer
 *
 * Handles stuff to be done after enabling irqs (all asics).
 * Returns 0 on success.
 */
int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
{
	struct radeon_device *rdev = dev->dev_private;

	if (ASIC_IS_AVIVO(rdev))
		dev->max_vblank_count = 0x00ffffff;
	else
		dev->max_vblank_count = 0x001fffff;

	return 0;
}

/**
 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
 *
 * @dev: drm dev pointer
 *
 * This function disables all interrupt sources on the GPU (all asics).
 */
void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
{
	struct radeon_device *rdev = dev->dev_private;
	unsigned long irqflags;
	unsigned i;

	if (rdev == NULL) {
		return;
	}
	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	/* Disable *all* interrupts */
	for (i = 0; i < RADEON_NUM_RINGS; i++)
		atomic_set(&rdev->irq.ring_int[i], 0);
	rdev->irq.dpm_thermal = false;
	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
		rdev->irq.hpd[i] = false;
	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
		rdev->irq.crtc_vblank_int[i] = false;
		atomic_set(&rdev->irq.pflip[i], 0);
		rdev->irq.afmt[i] = false;
	}
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_msi_ok - asic specific msi checks
 *
 * @rdev: radeon device pointer
 *
 * Handles asic specific MSI checks to determine if
 * MSIs should be enabled on a particular chip (all asics).
 * Returns true if MSIs should be enabled, false if MSIs
 * should not be enabled.
 */
static bool radeon_msi_ok(struct radeon_device *rdev)
{
	/* RV370/RV380 was first asic with MSI support */
	if (rdev->family < CHIP_RV380)
		return false;

	/* MSIs don't work on AGP */
	if (rdev->flags & RADEON_IS_AGP)
		return false;

	/*
	 * Older chips have a HW limitation, they can only generate 40 bits
	 * of address for "64-bit" MSIs which breaks on some platforms, notably
	 * IBM POWER servers, so we limit them
	 */
	if (rdev->family < CHIP_BONAIRE) {
		dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
		rdev->pdev->no_64bit_msi = 1;
	}

	/* force MSI on */
	if (radeon_msi == 1)
		return true;
	else if (radeon_msi == 0)
		return false;

	/* Quirks */
	/* HP RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x103c) &&
	    (rdev->pdev->subsystem_device == 0x30c2))
		return true;

	/* Dell RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x1028) &&
	    (rdev->pdev->subsystem_device == 0x01fc))
		return true;

	/* Dell RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x1028) &&
	    (rdev->pdev->subsystem_device == 0x01fd))
		return true;

	/* Gateway RS690 only seems to work with MSIs. */
	if ((rdev->pdev->device == 0x791f) &&
	    (rdev->pdev->subsystem_vendor == 0x107b) &&
	    (rdev->pdev->subsystem_device == 0x0185))
		return true;

	/* try and enable MSIs by default on all RS690s */
	if (rdev->family == CHIP_RS690)
		return true;

	/* RV515 seems to have MSI issues where it loses
	 * MSI rearms occasionally. This leads to lockups and freezes.
	 * disable it by default.
	 */
	if (rdev->family == CHIP_RV515)
		return false;
	if (rdev->flags & RADEON_IS_IGP) {
		/* APUs work fine with MSIs */
		if (rdev->family >= CHIP_PALM)
			return true;
		/* lots of IGPs have problems with MSIs */
		return false;
	}

	return true;
}

/**
 * radeon_irq_kms_init - init driver interrupt info
 *
 * @rdev: radeon device pointer
 *
 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
 * Returns 0 for success, error for failure.
 */
int radeon_irq_kms_init(struct radeon_device *rdev)
{
	int r = 0;

	spin_lock_init(&rdev->irq.lock);
	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
	if (r) {
		return r;
	}
	rdev->ddev->vblank_disable_allowed = true;

	/* enable msi */
	rdev->msi_enabled = 0;

	if (radeon_msi_ok(rdev)) {
		int ret = pci_enable_msi(rdev->pdev);
		if (!ret) {
			rdev->msi_enabled = 1;
			dev_info(rdev->dev, "radeon: using MSI.\n");
		}
	}

	INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
	INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);

	rdev->irq.installed = true;
	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
	if (r) {
		rdev->irq.installed = false;
		flush_delayed_work(&rdev->hotplug_work);
		return r;
	}

	DRM_INFO("radeon: irq initialized.\n");
	return 0;
}

/**
 * radeon_irq_kms_fini - tear down driver interrupt info
 *
 * @rdev: radeon device pointer
 *
 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
 */
void radeon_irq_kms_fini(struct radeon_device *rdev)
{
	drm_vblank_cleanup(rdev->ddev);
	if (rdev->irq.installed) {
		drm_irq_uninstall(rdev->ddev);
		rdev->irq.installed = false;
		if (rdev->msi_enabled)
			pci_disable_msi(rdev->pdev);
		flush_delayed_work(&rdev->hotplug_work);
	}
}

/**
 * radeon_irq_kms_sw_irq_get - enable software interrupt
 *
 * @rdev: radeon device pointer
 * @ring: ring whose interrupt you want to enable
 *
 * Enables the software interrupt for a specific ring (all asics).
 * The software interrupt is generally used to signal a fence on
 * a particular ring.
 */
void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
 *
 * @rdev: radeon device pointer
 * @ring: ring whose interrupt you want to enable
 *
 * Enables the software interrupt for a specific ring (all asics).
 * The software interrupt is generally used to signal a fence on
 * a particular ring.
 */
bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
{
	return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
}

/**
 * radeon_irq_kms_sw_irq_put - disable software interrupt
 *
 * @rdev: radeon device pointer
 * @ring: ring whose interrupt you want to disable
 *
 * Disables the software interrupt for a specific ring (all asics).
 * The software interrupt is generally used to signal a fence on
 * a particular ring.
 */
void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
 *
 * @rdev: radeon device pointer
 * @crtc: crtc whose interrupt you want to enable
 *
 * Enables the pageflip interrupt for a specific crtc (all asics).
 * For pageflips we use the vblank interrupt source.
 */
void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
{
	unsigned long irqflags;

	if (crtc < 0 || crtc >= rdev->num_crtc)
		return;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
 *
 * @rdev: radeon device pointer
 * @crtc: crtc whose interrupt you want to disable
 *
 * Disables the pageflip interrupt for a specific crtc (all asics).
 * For pageflips we use the vblank interrupt source.
 */
void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
{
	unsigned long irqflags;

	if (crtc < 0 || crtc >= rdev->num_crtc)
		return;

	if (!rdev->ddev->irq_enabled)
		return;

	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
		spin_lock_irqsave(&rdev->irq.lock, irqflags);
		radeon_irq_set(rdev);
		spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	}
}

/**
 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
 *
 * @rdev: radeon device pointer
 * @block: afmt block whose interrupt you want to enable
 *
 * Enables the afmt change interrupt for a specific afmt block (all asics).
 */
void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.afmt[block] = true;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);

}

/**
 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
 *
 * @rdev: radeon device pointer
 * @block: afmt block whose interrupt you want to disable
 *
 * Disables the afmt change interrupt for a specific afmt block (all asics).
 */
void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
{
	unsigned long irqflags;

	if (!rdev->ddev->irq_enabled)
		return;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	rdev->irq.afmt[block] = false;
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
 *
 * @rdev: radeon device pointer
 * @hpd_mask: mask of hpd pins you want to enable.
 *
 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
 */
void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
{
	unsigned long irqflags;
	int i;

	if (!rdev->ddev->irq_enabled)
		return;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
		rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}

/**
 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
 *
 * @rdev: radeon device pointer
 * @hpd_mask: mask of hpd pins you want to disable.
 *
 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
 */
void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
{
	unsigned long irqflags;
	int i;

	if (!rdev->ddev->irq_enabled)
		return;

	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
		rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
	radeon_irq_set(rdev);
	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
}
Commit	Line	Data
771fe6b9 JG	1	/*
	2	* Copyright 2008 Advanced Micro Devices, Inc.
	3	* Copyright 2008 Red Hat Inc.
	4	* Copyright 2009 Jerome Glisse.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors: Dave Airlie
	25	* Alex Deucher
	26	* Jerome Glisse
	27	*/
760285e7 DH	28	#include <drm/drmP.h>
	29	#include <drm/drm_crtc_helper.h>
	30	#include <drm/radeon_drm.h>
771fe6b9	31	#include "radeon_reg.h"
771fe6b9 JG	32	#include "radeon.h"
	33	#include "atom.h"
	34
10ebc0bc DA	35	#include <linux/pm_runtime.h>
10ebc0bc DA	36
fb98257a CK	37	#define RADEON_WAIT_IDLE_TIMEOUT 200
fb98257a CK	38
b73ba98d AD	39	/**
	40	* radeon_driver_irq_handler_kms - irq handler for KMS
	41	*
e9f0d76f	42	* @int irq, void *arg: args
b73ba98d AD	43	*
	44	* This is the irq handler for the radeon KMS driver (all asics).
	45	* radeon_irq_process is a macro that points to the per-asic
	46	* irq handler callback.
	47	*/
e9f0d76f	48	irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
771fe6b9 JG	49	{
	50	struct drm_device dev = (struct drm_device ) arg;
	51	struct radeon_device *rdev = dev->dev_private;
10ebc0bc	52	irqreturn_t ret;
771fe6b9	53
10ebc0bc DA	54	ret = radeon_irq_process(rdev);
	55	if (ret == IRQ_HANDLED)
	56	pm_runtime_mark_last_busy(dev->dev);
	57	return ret;
771fe6b9 JG	58	}
771fe6b9 JG	59
d4877cf2 AD	60	/*
	61	* Handle hotplug events outside the interrupt handler proper.
	62	*/
b73ba98d AD	63	/**
	64	* radeon_hotplug_work_func - display hotplug work handler
	65	*
	66	* @work: work struct
	67	*
	68	* This is the hot plug event work handler (all asics).
	69	* The work gets scheduled from the irq handler if there
	70	* was a hot plug interrupt. It walks the connector table
	71	* and calls the hotplug handler for each one, then sends
	72	* a drm hotplug event to alert userspace.
	73	*/
d4877cf2 AD	74	static void radeon_hotplug_work_func(struct work_struct *work)
	75	{
	76	struct radeon_device *rdev = container_of(work, struct radeon_device,
cb5d4166	77	hotplug_work.work);
d4877cf2 AD	78	struct drm_device *dev = rdev->ddev;
	79	struct drm_mode_config *mode_config = &dev->mode_config;
	80	struct drm_connector *connector;
	81
7f98ca45 DA	82	/* we can race here at startup, some boards seem to trigger
	83	* hotplug irqs when they shouldn't. */
	84	if (!rdev->mode_info.mode_config_initialized)
	85	return;
	86
39fa10f7	87	mutex_lock(&mode_config->mutex);
d4877cf2 AD	88	if (mode_config->num_connector) {
	89	list_for_each_entry(connector, &mode_config->connector_list, head)
	90	radeon_connector_hotplug(connector);
	91	}
39fa10f7	92	mutex_unlock(&mode_config->mutex);
d4877cf2	93	/* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f	94	drm_helper_hpd_irq_event(dev);
d4877cf2 AD	95	}
d4877cf2 AD	96
de6284aa DA	97	static void radeon_dp_work_func(struct work_struct *work)
de6284aa DA	98	{
9843ead0 DA	99	struct radeon_device *rdev = container_of(work, struct radeon_device,
	100	dp_work);
	101	struct drm_device *dev = rdev->ddev;
	102	struct drm_mode_config *mode_config = &dev->mode_config;
	103	struct drm_connector *connector;
	104
	105	/* this should take a mutex */
	106	if (mode_config->num_connector) {
	107	list_for_each_entry(connector, &mode_config->connector_list, head)
	108	radeon_connector_hotplug(connector);
	109	}
de6284aa	110	}
b73ba98d AD	111	/**
	112	* radeon_driver_irq_preinstall_kms - drm irq preinstall callback
	113	*
	114	* @dev: drm dev pointer
	115	*
	116	* Gets the hw ready to enable irqs (all asics).
	117	* This function disables all interrupt sources on the GPU.
	118	*/
771fe6b9 JG	119	void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
	120	{
	121	struct radeon_device *rdev = dev->dev_private;
fb98257a	122	unsigned long irqflags;
771fe6b9 JG	123	unsigned i;
771fe6b9 JG	124
fb98257a	125	spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9	126	/* Disable all interrupts */
1b37078b	127	for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f	128	atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9	129	rdev->irq.dpm_thermal = false;
54bd5206	130	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e	131	rdev->irq.hpd[i] = false;
54bd5206 IH	132	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
54bd5206 IH	133	rdev->irq.crtc_vblank_int[i] = false;
736fc37f	134	atomic_set(&rdev->irq.pflip[i], 0);
f122c610	135	rdev->irq.afmt[i] = false;
6f34be50	136	}
771fe6b9	137	radeon_irq_set(rdev);
fb98257a	138	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9 JG	139	/* Clear bits */
	140	radeon_irq_process(rdev);
	141	}
	142
b73ba98d AD	143	/**
	144	* radeon_driver_irq_postinstall_kms - drm irq preinstall callback
	145	*
	146	* @dev: drm dev pointer
	147	*
	148	* Handles stuff to be done after enabling irqs (all asics).
	149	* Returns 0 on success.
	150	*/
771fe6b9 JG	151	int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
771fe6b9 JG	152	{
b0b9bb4d MD	153	struct radeon_device *rdev = dev->dev_private;
	154
	155	if (ASIC_IS_AVIVO(rdev))
	156	dev->max_vblank_count = 0x00ffffff;
	157	else
	158	dev->max_vblank_count = 0x001fffff;
	159
771fe6b9 JG	160	return 0;
	161	}
	162
b73ba98d AD	163	/**
	164	* radeon_driver_irq_uninstall_kms - drm irq uninstall callback
	165	*
	166	* @dev: drm dev pointer
	167	*
	168	* This function disables all interrupt sources on the GPU (all asics).
	169	*/
771fe6b9 JG	170	void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
	171	{
	172	struct radeon_device *rdev = dev->dev_private;
fb98257a	173	unsigned long irqflags;
771fe6b9 JG	174	unsigned i;
	175
	176	if (rdev == NULL) {
	177	return;
	178	}
fb98257a	179	spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9	180	/* Disable all interrupts */
1b37078b	181	for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f	182	atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9	183	rdev->irq.dpm_thermal = false;
54bd5206	184	for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9	185	rdev->irq.hpd[i] = false;
54bd5206 IH	186	for (i = 0; i < RADEON_MAX_CRTCS; i++) {
54bd5206 IH	187	rdev->irq.crtc_vblank_int[i] = false;
736fc37f	188	atomic_set(&rdev->irq.pflip[i], 0);
f122c610	189	rdev->irq.afmt[i] = false;
6f34be50	190	}
771fe6b9	191	radeon_irq_set(rdev);
fb98257a	192	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9 JG	193	}
771fe6b9 JG	194
b73ba98d AD	195	/**
	196	* radeon_msi_ok - asic specific msi checks
	197	*
	198	* @rdev: radeon device pointer
	199	*
	200	* Handles asic specific MSI checks to determine if
	201	* MSIs should be enabled on a particular chip (all asics).
	202	* Returns true if MSIs should be enabled, false if MSIs
	203	* should not be enabled.
	204	*/
8f6c25c5 AD	205	static bool radeon_msi_ok(struct radeon_device *rdev)
	206	{
	207	/* RV370/RV380 was first asic with MSI support */
	208	if (rdev->family < CHIP_RV380)
	209	return false;
	210
	211	/* MSIs don't work on AGP */
	212	if (rdev->flags & RADEON_IS_AGP)
	213	return false;
	214
91ed6fd2 BH	215	/*
	216	* Older chips have a HW limitation, they can only generate 40 bits
	217	* of address for "64-bit" MSIs which breaks on some platforms, notably
	218	* IBM POWER servers, so we limit them
	219	*/
	220	if (rdev->family < CHIP_BONAIRE) {
	221	dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
	222	rdev->pdev->no_64bit_msi = 1;
	223	}
	224
a18cee15 AD	225	/* force MSI on */
	226	if (radeon_msi == 1)
	227	return true;
	228	else if (radeon_msi == 0)
	229	return false;
	230
b362105f AD	231	/* Quirks */
	232	/* HP RS690 only seems to work with MSIs. */
	233	if ((rdev->pdev->device == 0x791f) &&
	234	(rdev->pdev->subsystem_vendor == 0x103c) &&
	235	(rdev->pdev->subsystem_device == 0x30c2))
	236	return true;
	237
44517c44 AD	238	/* Dell RS690 only seems to work with MSIs. */
	239	if ((rdev->pdev->device == 0x791f) &&
	240	(rdev->pdev->subsystem_vendor == 0x1028) &&
	241	(rdev->pdev->subsystem_device == 0x01fc))
	242	return true;
	243
01e718ec AD	244	/* Dell RS690 only seems to work with MSIs. */
	245	if ((rdev->pdev->device == 0x791f) &&
	246	(rdev->pdev->subsystem_vendor == 0x1028) &&
	247	(rdev->pdev->subsystem_device == 0x01fd))
	248	return true;
	249
3a6d59df AD	250	/* Gateway RS690 only seems to work with MSIs. */
	251	if ((rdev->pdev->device == 0x791f) &&
	252	(rdev->pdev->subsystem_vendor == 0x107b) &&
	253	(rdev->pdev->subsystem_device == 0x0185))
	254	return true;
	255
fb6ca6d1 AD	256	/* try and enable MSIs by default on all RS690s */
	257	if (rdev->family == CHIP_RS690)
	258	return true;
	259
16a5e32b DA	260	/* RV515 seems to have MSI issues where it loses
	261	* MSI rearms occasionally. This leads to lockups and freezes.
	262	* disable it by default.
	263	*/
	264	if (rdev->family == CHIP_RV515)
	265	return false;
8f6c25c5 AD	266	if (rdev->flags & RADEON_IS_IGP) {
	267	/* APUs work fine with MSIs */
	268	if (rdev->family >= CHIP_PALM)
	269	return true;
	270	/* lots of IGPs have problems with MSIs */
	271	return false;
	272	}
	273
	274	return true;
	275	}
	276
b73ba98d AD	277	/**
	278	* radeon_irq_kms_init - init driver interrupt info
	279	*
	280	* @rdev: radeon device pointer
	281	*
	282	* Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
	283	* Returns 0 for success, error for failure.
	284	*/
771fe6b9 JG	285	int radeon_irq_kms_init(struct radeon_device *rdev)
	286	{
	287	int r = 0;
	288
fb98257a	289	spin_lock_init(&rdev->irq.lock);
9e7b414e	290	r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
771fe6b9 JG	291	if (r) {
	292	return r;
	293	}
978ccad6 MD	294	rdev->ddev->vblank_disable_allowed = true;
978ccad6 MD	295
3e5cb98d AD	296	/* enable msi */
3e5cb98d AD	297	rdev->msi_enabled = 0;
8f6c25c5 AD	298
8f6c25c5 AD	299	if (radeon_msi_ok(rdev)) {
3e5cb98d	300	int ret = pci_enable_msi(rdev->pdev);
d8f60cfc	301	if (!ret) {
3e5cb98d	302	rdev->msi_enabled = 1;
da7be684	303	dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc	304	}
3e5cb98d	305	}
27c505ca	306
cb5d4166	307	INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
de6284aa	308	INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
27c505ca	309	INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
27c505ca	310
771fe6b9	311	rdev->irq.installed = true;
bb0f1b5c	312	r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
003e69f9 JG	313	if (r) {
003e69f9 JG	314	rdev->irq.installed = false;
cb5d4166	315	flush_delayed_work(&rdev->hotplug_work);
003e69f9 JG	316	return r;
003e69f9 JG	317	}
a01c34f7	318
771fe6b9 JG	319	DRM_INFO("radeon: irq initialized.\n");
	320	return 0;
	321	}
	322
b73ba98d	323	/**
cf2fbdd2	324	* radeon_irq_kms_fini - tear down driver interrupt info
b73ba98d AD	325	*
	326	* @rdev: radeon device pointer
	327	*
	328	* Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
	329	*/
771fe6b9 JG	330	void radeon_irq_kms_fini(struct radeon_device *rdev)
771fe6b9 JG	331	{
003e69f9	332	drm_vblank_cleanup(rdev->ddev);
771fe6b9	333	if (rdev->irq.installed) {
771fe6b9	334	drm_irq_uninstall(rdev->ddev);
003e69f9	335	rdev->irq.installed = false;
3e5cb98d AD	336	if (rdev->msi_enabled)
3e5cb98d AD	337	pci_disable_msi(rdev->pdev);
cb5d4166	338	flush_delayed_work(&rdev->hotplug_work);
771fe6b9 JG	339	}
771fe6b9 JG	340	}
1614f8b1	341
b73ba98d AD	342	/**
	343	* radeon_irq_kms_sw_irq_get - enable software interrupt
	344	*
	345	* @rdev: radeon device pointer
	346	* @ring: ring whose interrupt you want to enable
	347	*
	348	* Enables the software interrupt for a specific ring (all asics).
	349	* The software interrupt is generally used to signal a fence on
	350	* a particular ring.
	351	*/
1b37078b	352	void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1 DA	353	{
	354	unsigned long irqflags;
	355
736fc37f CK	356	if (!rdev->ddev->irq_enabled)
	357	return;
	358
	359	if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
	360	spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1	361	radeon_irq_set(rdev);
736fc37f	362	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1	363	}
1614f8b1 DA	364	}
1614f8b1 DA	365
954605ca ML	366	/**
	367	* radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
	368	*
	369	* @rdev: radeon device pointer
	370	* @ring: ring whose interrupt you want to enable
	371	*
	372	* Enables the software interrupt for a specific ring (all asics).
	373	* The software interrupt is generally used to signal a fence on
	374	* a particular ring.
	375	*/
	376	bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
	377	{
	378	return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
	379	}
	380
b73ba98d AD	381	/**
	382	* radeon_irq_kms_sw_irq_put - disable software interrupt
	383	*
	384	* @rdev: radeon device pointer
	385	* @ring: ring whose interrupt you want to disable
	386	*
	387	* Disables the software interrupt for a specific ring (all asics).
	388	* The software interrupt is generally used to signal a fence on
	389	* a particular ring.
	390	*/
1b37078b	391	void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1 DA	392	{
	393	unsigned long irqflags;
	394
736fc37f CK	395	if (!rdev->ddev->irq_enabled)
	396	return;
	397
	398	if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
	399	spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1	400	radeon_irq_set(rdev);
736fc37f	401	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1	402	}
1614f8b1 DA	403	}
1614f8b1 DA	404
b73ba98d AD	405	/**
	406	* radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
	407	*
	408	* @rdev: radeon device pointer
	409	* @crtc: crtc whose interrupt you want to enable
	410	*
	411	* Enables the pageflip interrupt for a specific crtc (all asics).
	412	* For pageflips we use the vblank interrupt source.
	413	*/
6f34be50 AD	414	void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
	415	{
	416	unsigned long irqflags;
	417
	418	if (crtc < 0 \|\| crtc >= rdev->num_crtc)
	419	return;
	420
736fc37f CK	421	if (!rdev->ddev->irq_enabled)
	422	return;
	423
	424	if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
	425	spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50	426	radeon_irq_set(rdev);
736fc37f	427	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50	428	}
6f34be50 AD	429	}
6f34be50 AD	430
b73ba98d AD	431	/**
	432	* radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
	433	*
	434	* @rdev: radeon device pointer
	435	* @crtc: crtc whose interrupt you want to disable
	436	*
	437	* Disables the pageflip interrupt for a specific crtc (all asics).
	438	* For pageflips we use the vblank interrupt source.
	439	*/
6f34be50 AD	440	void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
	441	{
	442	unsigned long irqflags;
	443
	444	if (crtc < 0 \|\| crtc >= rdev->num_crtc)
	445	return;
	446
736fc37f CK	447	if (!rdev->ddev->irq_enabled)
	448	return;
	449
	450	if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
	451	spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50	452	radeon_irq_set(rdev);
736fc37f	453	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50	454	}
6f34be50 AD	455	}
6f34be50 AD	456
b73ba98d AD	457	/**
	458	* radeon_irq_kms_enable_afmt - enable audio format change interrupt
	459	*
	460	* @rdev: radeon device pointer
	461	* @block: afmt block whose interrupt you want to enable
	462	*
	463	* Enables the afmt change interrupt for a specific afmt block (all asics).
	464	*/
fb98257a CK	465	void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
	466	{
	467	unsigned long irqflags;
	468
cc9945bf AD	469	if (!rdev->ddev->irq_enabled)
	470	return;
	471
fb98257a CK	472	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	473	rdev->irq.afmt[block] = true;
	474	radeon_irq_set(rdev);
	475	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	476
	477	}
	478
b73ba98d AD	479	/**
	480	* radeon_irq_kms_disable_afmt - disable audio format change interrupt
	481	*
	482	* @rdev: radeon device pointer
	483	* @block: afmt block whose interrupt you want to disable
	484	*
	485	* Disables the afmt change interrupt for a specific afmt block (all asics).
	486	*/
fb98257a CK	487	void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
	488	{
	489	unsigned long irqflags;
	490
cc9945bf AD	491	if (!rdev->ddev->irq_enabled)
	492	return;
	493
fb98257a CK	494	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	495	rdev->irq.afmt[block] = false;
	496	radeon_irq_set(rdev);
	497	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	498	}
	499
b73ba98d AD	500	/**
	501	* radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
	502	*
	503	* @rdev: radeon device pointer
	504	* @hpd_mask: mask of hpd pins you want to enable.
	505	*
	506	* Enables the hotplug detect interrupt for a specific hpd pin (all asics).
	507	*/
fb98257a CK	508	void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
	509	{
	510	unsigned long irqflags;
	511	int i;
	512
cc9945bf AD	513	if (!rdev->ddev->irq_enabled)
	514	return;
	515
fb98257a CK	516	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	517	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
	518	rdev->irq.hpd[i] \|= !!(hpd_mask & (1 << i));
	519	radeon_irq_set(rdev);
	520	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	521	}
	522
b73ba98d AD	523	/**
	524	* radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
	525	*
	526	* @rdev: radeon device pointer
	527	* @hpd_mask: mask of hpd pins you want to disable.
	528	*
	529	* Disables the hotplug detect interrupt for a specific hpd pin (all asics).
	530	*/
fb98257a CK	531	void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
	532	{
	533	unsigned long irqflags;
	534	int i;
	535
cc9945bf AD	536	if (!rdev->ddev->irq_enabled)
	537	return;
	538
fb98257a CK	539	spin_lock_irqsave(&rdev->irq.lock, irqflags);
	540	for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
	541	rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
	542	radeon_irq_set(rdev);
	543	spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
	544	}
	545