Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
21 | #include "kvm.h" | |
22 | ||
6aa8b732 AK |
23 | #include <linux/types.h> |
24 | #include <linux/string.h> | |
6aa8b732 AK |
25 | #include <linux/mm.h> |
26 | #include <linux/highmem.h> | |
27 | #include <linux/module.h> | |
28 | ||
e495606d AK |
29 | #include <asm/page.h> |
30 | #include <asm/cmpxchg.h> | |
6aa8b732 | 31 | |
37a7d8b0 AK |
32 | #undef MMU_DEBUG |
33 | ||
34 | #undef AUDIT | |
35 | ||
36 | #ifdef AUDIT | |
37 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
38 | #else | |
39 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
40 | #endif | |
41 | ||
42 | #ifdef MMU_DEBUG | |
43 | ||
44 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
45 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
46 | ||
47 | #else | |
48 | ||
49 | #define pgprintk(x...) do { } while (0) | |
50 | #define rmap_printk(x...) do { } while (0) | |
51 | ||
52 | #endif | |
53 | ||
54 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
55 | static int dbg = 1; | |
56 | #endif | |
6aa8b732 | 57 | |
d6c69ee9 YD |
58 | #ifndef MMU_DEBUG |
59 | #define ASSERT(x) do { } while (0) | |
60 | #else | |
6aa8b732 AK |
61 | #define ASSERT(x) \ |
62 | if (!(x)) { \ | |
63 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
64 | __FILE__, __LINE__, #x); \ | |
65 | } | |
d6c69ee9 | 66 | #endif |
6aa8b732 | 67 | |
cea0f0e7 AK |
68 | #define PT64_PT_BITS 9 |
69 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
70 | #define PT32_PT_BITS 10 | |
71 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
72 | |
73 | #define PT_WRITABLE_SHIFT 1 | |
74 | ||
75 | #define PT_PRESENT_MASK (1ULL << 0) | |
76 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
77 | #define PT_USER_MASK (1ULL << 2) | |
78 | #define PT_PWT_MASK (1ULL << 3) | |
79 | #define PT_PCD_MASK (1ULL << 4) | |
80 | #define PT_ACCESSED_MASK (1ULL << 5) | |
81 | #define PT_DIRTY_MASK (1ULL << 6) | |
82 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
83 | #define PT_PAT_MASK (1ULL << 7) | |
84 | #define PT_GLOBAL_MASK (1ULL << 8) | |
85 | #define PT64_NX_MASK (1ULL << 63) | |
86 | ||
87 | #define PT_PAT_SHIFT 7 | |
88 | #define PT_DIR_PAT_SHIFT 12 | |
89 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
90 | ||
91 | #define PT32_DIR_PSE36_SIZE 4 | |
92 | #define PT32_DIR_PSE36_SHIFT 13 | |
93 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
94 | ||
95 | ||
6aa8b732 AK |
96 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
97 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
98 | ||
6aa8b732 AK |
99 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
100 | ||
6aa8b732 AK |
101 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
102 | ||
103 | #define PT64_LEVEL_BITS 9 | |
104 | ||
105 | #define PT64_LEVEL_SHIFT(level) \ | |
106 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
107 | ||
108 | #define PT64_LEVEL_MASK(level) \ | |
109 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
110 | ||
111 | #define PT64_INDEX(address, level)\ | |
112 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
113 | ||
114 | ||
115 | #define PT32_LEVEL_BITS 10 | |
116 | ||
117 | #define PT32_LEVEL_SHIFT(level) \ | |
118 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
119 | ||
120 | #define PT32_LEVEL_MASK(level) \ | |
121 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
122 | ||
123 | #define PT32_INDEX(address, level)\ | |
124 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
125 | ||
126 | ||
27aba766 | 127 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
128 | #define PT64_DIR_BASE_ADDR_MASK \ |
129 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
130 | ||
131 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
132 | #define PT32_DIR_BASE_ADDR_MASK \ | |
133 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
134 | ||
135 | ||
136 | #define PFERR_PRESENT_MASK (1U << 0) | |
137 | #define PFERR_WRITE_MASK (1U << 1) | |
138 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 139 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
140 | |
141 | #define PT64_ROOT_LEVEL 4 | |
142 | #define PT32_ROOT_LEVEL 2 | |
143 | #define PT32E_ROOT_LEVEL 3 | |
144 | ||
145 | #define PT_DIRECTORY_LEVEL 2 | |
146 | #define PT_PAGE_TABLE_LEVEL 1 | |
147 | ||
cd4a4e53 AK |
148 | #define RMAP_EXT 4 |
149 | ||
150 | struct kvm_rmap_desc { | |
151 | u64 *shadow_ptes[RMAP_EXT]; | |
152 | struct kvm_rmap_desc *more; | |
153 | }; | |
154 | ||
b5a33a75 AK |
155 | static struct kmem_cache *pte_chain_cache; |
156 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 AK |
157 | static struct kmem_cache *mmu_page_cache; |
158 | static struct kmem_cache *mmu_page_header_cache; | |
b5a33a75 | 159 | |
6aa8b732 AK |
160 | static int is_write_protection(struct kvm_vcpu *vcpu) |
161 | { | |
162 | return vcpu->cr0 & CR0_WP_MASK; | |
163 | } | |
164 | ||
165 | static int is_cpuid_PSE36(void) | |
166 | { | |
167 | return 1; | |
168 | } | |
169 | ||
73b1087e AK |
170 | static int is_nx(struct kvm_vcpu *vcpu) |
171 | { | |
172 | return vcpu->shadow_efer & EFER_NX; | |
173 | } | |
174 | ||
6aa8b732 AK |
175 | static int is_present_pte(unsigned long pte) |
176 | { | |
177 | return pte & PT_PRESENT_MASK; | |
178 | } | |
179 | ||
180 | static int is_writeble_pte(unsigned long pte) | |
181 | { | |
182 | return pte & PT_WRITABLE_MASK; | |
183 | } | |
184 | ||
185 | static int is_io_pte(unsigned long pte) | |
186 | { | |
187 | return pte & PT_SHADOW_IO_MARK; | |
188 | } | |
189 | ||
cd4a4e53 AK |
190 | static int is_rmap_pte(u64 pte) |
191 | { | |
192 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
193 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
194 | } | |
195 | ||
e663ee64 AK |
196 | static void set_shadow_pte(u64 *sptep, u64 spte) |
197 | { | |
198 | #ifdef CONFIG_X86_64 | |
199 | set_64bit((unsigned long *)sptep, spte); | |
200 | #else | |
201 | set_64bit((unsigned long long *)sptep, spte); | |
202 | #endif | |
203 | } | |
204 | ||
e2dec939 | 205 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
8c438502 AK |
206 | struct kmem_cache *base_cache, int min, |
207 | gfp_t gfp_flags) | |
714b93da AK |
208 | { |
209 | void *obj; | |
210 | ||
211 | if (cache->nobjs >= min) | |
e2dec939 | 212 | return 0; |
714b93da | 213 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
8c438502 | 214 | obj = kmem_cache_zalloc(base_cache, gfp_flags); |
714b93da | 215 | if (!obj) |
e2dec939 | 216 | return -ENOMEM; |
714b93da AK |
217 | cache->objects[cache->nobjs++] = obj; |
218 | } | |
e2dec939 | 219 | return 0; |
714b93da AK |
220 | } |
221 | ||
222 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
223 | { | |
224 | while (mc->nobjs) | |
225 | kfree(mc->objects[--mc->nobjs]); | |
226 | } | |
227 | ||
8c438502 | 228 | static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags) |
714b93da | 229 | { |
e2dec939 AK |
230 | int r; |
231 | ||
232 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
8c438502 | 233 | pte_chain_cache, 4, gfp_flags); |
e2dec939 AK |
234 | if (r) |
235 | goto out; | |
236 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
8c438502 | 237 | rmap_desc_cache, 1, gfp_flags); |
d3d25b04 AK |
238 | if (r) |
239 | goto out; | |
240 | r = mmu_topup_memory_cache(&vcpu->mmu_page_cache, | |
241 | mmu_page_cache, 4, gfp_flags); | |
242 | if (r) | |
243 | goto out; | |
244 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
245 | mmu_page_header_cache, 4, gfp_flags); | |
e2dec939 AK |
246 | out: |
247 | return r; | |
714b93da AK |
248 | } |
249 | ||
8c438502 AK |
250 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
251 | { | |
252 | int r; | |
253 | ||
254 | r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT); | |
255 | if (r < 0) { | |
256 | spin_unlock(&vcpu->kvm->lock); | |
257 | kvm_arch_ops->vcpu_put(vcpu); | |
258 | r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL); | |
259 | kvm_arch_ops->vcpu_load(vcpu); | |
260 | spin_lock(&vcpu->kvm->lock); | |
261 | } | |
262 | return r; | |
263 | } | |
264 | ||
714b93da AK |
265 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
266 | { | |
267 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
268 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
d3d25b04 AK |
269 | mmu_free_memory_cache(&vcpu->mmu_page_cache); |
270 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); | |
714b93da AK |
271 | } |
272 | ||
273 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
274 | size_t size) | |
275 | { | |
276 | void *p; | |
277 | ||
278 | BUG_ON(!mc->nobjs); | |
279 | p = mc->objects[--mc->nobjs]; | |
280 | memset(p, 0, size); | |
281 | return p; | |
282 | } | |
283 | ||
714b93da AK |
284 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
285 | { | |
286 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
287 | sizeof(struct kvm_pte_chain)); | |
288 | } | |
289 | ||
90cb0529 | 290 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 291 | { |
90cb0529 | 292 | kfree(pc); |
714b93da AK |
293 | } |
294 | ||
295 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
296 | { | |
297 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
298 | sizeof(struct kvm_rmap_desc)); | |
299 | } | |
300 | ||
90cb0529 | 301 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 302 | { |
90cb0529 | 303 | kfree(rd); |
714b93da AK |
304 | } |
305 | ||
cd4a4e53 AK |
306 | /* |
307 | * Reverse mapping data structures: | |
308 | * | |
309 | * If page->private bit zero is zero, then page->private points to the | |
310 | * shadow page table entry that points to page_address(page). | |
311 | * | |
312 | * If page->private bit zero is one, (then page->private & ~1) points | |
313 | * to a struct kvm_rmap_desc containing more mappings. | |
314 | */ | |
714b93da | 315 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
316 | { |
317 | struct page *page; | |
318 | struct kvm_rmap_desc *desc; | |
319 | int i; | |
320 | ||
321 | if (!is_rmap_pte(*spte)) | |
322 | return; | |
323 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 324 | if (!page_private(page)) { |
cd4a4e53 | 325 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
326 | set_page_private(page,(unsigned long)spte); |
327 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 328 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 329 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 330 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 331 | desc->shadow_ptes[1] = spte; |
5972e953 | 332 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
333 | } else { |
334 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 335 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
336 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
337 | desc = desc->more; | |
338 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 339 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
340 | desc = desc->more; |
341 | } | |
342 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
343 | ; | |
344 | desc->shadow_ptes[i] = spte; | |
345 | } | |
346 | } | |
347 | ||
90cb0529 | 348 | static void rmap_desc_remove_entry(struct page *page, |
cd4a4e53 AK |
349 | struct kvm_rmap_desc *desc, |
350 | int i, | |
351 | struct kvm_rmap_desc *prev_desc) | |
352 | { | |
353 | int j; | |
354 | ||
355 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
356 | ; | |
357 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 358 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
359 | if (j != 0) |
360 | return; | |
361 | if (!prev_desc && !desc->more) | |
5972e953 | 362 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
363 | else |
364 | if (prev_desc) | |
365 | prev_desc->more = desc->more; | |
366 | else | |
5972e953 | 367 | set_page_private(page,(unsigned long)desc->more | 1); |
90cb0529 | 368 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
369 | } |
370 | ||
90cb0529 | 371 | static void rmap_remove(u64 *spte) |
cd4a4e53 AK |
372 | { |
373 | struct page *page; | |
374 | struct kvm_rmap_desc *desc; | |
375 | struct kvm_rmap_desc *prev_desc; | |
376 | int i; | |
377 | ||
378 | if (!is_rmap_pte(*spte)) | |
379 | return; | |
380 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 381 | if (!page_private(page)) { |
cd4a4e53 AK |
382 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
383 | BUG(); | |
5972e953 | 384 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 385 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 386 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
387 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
388 | spte, *spte); | |
389 | BUG(); | |
390 | } | |
5972e953 | 391 | set_page_private(page,0); |
cd4a4e53 AK |
392 | } else { |
393 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 394 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
395 | prev_desc = NULL; |
396 | while (desc) { | |
397 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
398 | if (desc->shadow_ptes[i] == spte) { | |
90cb0529 | 399 | rmap_desc_remove_entry(page, |
714b93da | 400 | desc, i, |
cd4a4e53 AK |
401 | prev_desc); |
402 | return; | |
403 | } | |
404 | prev_desc = desc; | |
405 | desc = desc->more; | |
406 | } | |
407 | BUG(); | |
408 | } | |
409 | } | |
410 | ||
714b93da | 411 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 412 | { |
714b93da | 413 | struct kvm *kvm = vcpu->kvm; |
374cbac0 | 414 | struct page *page; |
374cbac0 AK |
415 | struct kvm_rmap_desc *desc; |
416 | u64 *spte; | |
417 | ||
954bbbc2 AK |
418 | page = gfn_to_page(kvm, gfn); |
419 | BUG_ON(!page); | |
374cbac0 | 420 | |
5972e953 MR |
421 | while (page_private(page)) { |
422 | if (!(page_private(page) & 1)) | |
423 | spte = (u64 *)page_private(page); | |
374cbac0 | 424 | else { |
5972e953 | 425 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
426 | spte = desc->shadow_ptes[0]; |
427 | } | |
428 | BUG_ON(!spte); | |
27aba766 AK |
429 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT |
430 | != page_to_pfn(page)); | |
374cbac0 AK |
431 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
432 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
433 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
90cb0529 | 434 | rmap_remove(spte); |
e663ee64 | 435 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
88a97f0b | 436 | kvm_flush_remote_tlbs(vcpu->kvm); |
374cbac0 AK |
437 | } |
438 | } | |
439 | ||
d6c69ee9 | 440 | #ifdef MMU_DEBUG |
47ad8e68 | 441 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 442 | { |
139bdb2d AK |
443 | u64 *pos; |
444 | u64 *end; | |
445 | ||
47ad8e68 | 446 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
139bdb2d AK |
447 | if (*pos != 0) { |
448 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
449 | pos, *pos); | |
6aa8b732 | 450 | return 0; |
139bdb2d | 451 | } |
6aa8b732 AK |
452 | return 1; |
453 | } | |
d6c69ee9 | 454 | #endif |
6aa8b732 | 455 | |
90cb0529 | 456 | static void kvm_mmu_free_page(struct kvm *kvm, |
4b02d6da | 457 | struct kvm_mmu_page *page_head) |
260746c0 | 458 | { |
47ad8e68 | 459 | ASSERT(is_empty_shadow_page(page_head->spt)); |
d3d25b04 | 460 | list_del(&page_head->link); |
90cb0529 AK |
461 | kfree(page_head->spt); |
462 | kfree(page_head); | |
463 | ++kvm->n_free_mmu_pages; | |
260746c0 AK |
464 | } |
465 | ||
cea0f0e7 AK |
466 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
467 | { | |
468 | return gfn; | |
469 | } | |
470 | ||
25c0de2c AK |
471 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
472 | u64 *parent_pte) | |
6aa8b732 AK |
473 | { |
474 | struct kvm_mmu_page *page; | |
475 | ||
d3d25b04 | 476 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 477 | return NULL; |
6aa8b732 | 478 | |
d3d25b04 AK |
479 | page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, |
480 | sizeof *page); | |
481 | page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
482 | set_page_private(virt_to_page(page->spt), (unsigned long)page); | |
483 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
47ad8e68 | 484 | ASSERT(is_empty_shadow_page(page->spt)); |
6aa8b732 | 485 | page->slot_bitmap = 0; |
cea0f0e7 | 486 | page->multimapped = 0; |
6aa8b732 | 487 | page->parent_pte = parent_pte; |
ebeace86 | 488 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 489 | return page; |
6aa8b732 AK |
490 | } |
491 | ||
714b93da AK |
492 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
493 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
494 | { |
495 | struct kvm_pte_chain *pte_chain; | |
496 | struct hlist_node *node; | |
497 | int i; | |
498 | ||
499 | if (!parent_pte) | |
500 | return; | |
501 | if (!page->multimapped) { | |
502 | u64 *old = page->parent_pte; | |
503 | ||
504 | if (!old) { | |
505 | page->parent_pte = parent_pte; | |
506 | return; | |
507 | } | |
508 | page->multimapped = 1; | |
714b93da | 509 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
510 | INIT_HLIST_HEAD(&page->parent_ptes); |
511 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
512 | pte_chain->parent_ptes[0] = old; | |
513 | } | |
514 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
515 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
516 | continue; | |
517 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
518 | if (!pte_chain->parent_ptes[i]) { | |
519 | pte_chain->parent_ptes[i] = parent_pte; | |
520 | return; | |
521 | } | |
522 | } | |
714b93da | 523 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
524 | BUG_ON(!pte_chain); |
525 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
526 | pte_chain->parent_ptes[0] = parent_pte; | |
527 | } | |
528 | ||
90cb0529 | 529 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page, |
cea0f0e7 AK |
530 | u64 *parent_pte) |
531 | { | |
532 | struct kvm_pte_chain *pte_chain; | |
533 | struct hlist_node *node; | |
534 | int i; | |
535 | ||
536 | if (!page->multimapped) { | |
537 | BUG_ON(page->parent_pte != parent_pte); | |
538 | page->parent_pte = NULL; | |
539 | return; | |
540 | } | |
541 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
542 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
543 | if (!pte_chain->parent_ptes[i]) | |
544 | break; | |
545 | if (pte_chain->parent_ptes[i] != parent_pte) | |
546 | continue; | |
697fe2e2 AK |
547 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
548 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
549 | pte_chain->parent_ptes[i] |
550 | = pte_chain->parent_ptes[i + 1]; | |
551 | ++i; | |
552 | } | |
553 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
554 | if (i == 0) { |
555 | hlist_del(&pte_chain->link); | |
90cb0529 | 556 | mmu_free_pte_chain(pte_chain); |
697fe2e2 AK |
557 | if (hlist_empty(&page->parent_ptes)) { |
558 | page->multimapped = 0; | |
559 | page->parent_pte = NULL; | |
560 | } | |
561 | } | |
cea0f0e7 AK |
562 | return; |
563 | } | |
564 | BUG(); | |
565 | } | |
566 | ||
567 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
568 | gfn_t gfn) | |
569 | { | |
570 | unsigned index; | |
571 | struct hlist_head *bucket; | |
572 | struct kvm_mmu_page *page; | |
573 | struct hlist_node *node; | |
574 | ||
575 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
576 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
577 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
578 | hlist_for_each_entry(page, node, bucket, hash_link) | |
579 | if (page->gfn == gfn && !page->role.metaphysical) { | |
580 | pgprintk("%s: found role %x\n", | |
581 | __FUNCTION__, page->role.word); | |
582 | return page; | |
583 | } | |
584 | return NULL; | |
585 | } | |
586 | ||
587 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
588 | gfn_t gfn, | |
589 | gva_t gaddr, | |
590 | unsigned level, | |
591 | int metaphysical, | |
d28c6cfb | 592 | unsigned hugepage_access, |
cea0f0e7 AK |
593 | u64 *parent_pte) |
594 | { | |
595 | union kvm_mmu_page_role role; | |
596 | unsigned index; | |
597 | unsigned quadrant; | |
598 | struct hlist_head *bucket; | |
599 | struct kvm_mmu_page *page; | |
600 | struct hlist_node *node; | |
601 | ||
602 | role.word = 0; | |
603 | role.glevels = vcpu->mmu.root_level; | |
604 | role.level = level; | |
605 | role.metaphysical = metaphysical; | |
d28c6cfb | 606 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
607 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
608 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
609 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
610 | role.quadrant = quadrant; | |
611 | } | |
612 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
613 | gfn, role.word); | |
614 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
615 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
616 | hlist_for_each_entry(page, node, bucket, hash_link) | |
617 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 618 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
619 | pgprintk("%s: found\n", __FUNCTION__); |
620 | return page; | |
621 | } | |
622 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
623 | if (!page) | |
624 | return page; | |
625 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
626 | page->gfn = gfn; | |
627 | page->role = role; | |
628 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 629 | if (!metaphysical) |
714b93da | 630 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
631 | return page; |
632 | } | |
633 | ||
90cb0529 | 634 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
a436036b AK |
635 | struct kvm_mmu_page *page) |
636 | { | |
697fe2e2 AK |
637 | unsigned i; |
638 | u64 *pt; | |
639 | u64 ent; | |
640 | ||
47ad8e68 | 641 | pt = page->spt; |
697fe2e2 AK |
642 | |
643 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
644 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
645 | if (pt[i] & PT_PRESENT_MASK) | |
90cb0529 | 646 | rmap_remove(&pt[i]); |
697fe2e2 AK |
647 | pt[i] = 0; |
648 | } | |
90cb0529 | 649 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
650 | return; |
651 | } | |
652 | ||
653 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
654 | ent = pt[i]; | |
655 | ||
656 | pt[i] = 0; | |
657 | if (!(ent & PT_PRESENT_MASK)) | |
658 | continue; | |
659 | ent &= PT64_BASE_ADDR_MASK; | |
90cb0529 | 660 | mmu_page_remove_parent_pte(page_header(ent), &pt[i]); |
697fe2e2 | 661 | } |
90cb0529 | 662 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
663 | } |
664 | ||
90cb0529 | 665 | static void kvm_mmu_put_page(struct kvm_mmu_page *page, |
cea0f0e7 AK |
666 | u64 *parent_pte) |
667 | { | |
90cb0529 | 668 | mmu_page_remove_parent_pte(page, parent_pte); |
a436036b AK |
669 | } |
670 | ||
90cb0529 | 671 | static void kvm_mmu_zap_page(struct kvm *kvm, |
a436036b AK |
672 | struct kvm_mmu_page *page) |
673 | { | |
674 | u64 *parent_pte; | |
675 | ||
676 | while (page->multimapped || page->parent_pte) { | |
677 | if (!page->multimapped) | |
678 | parent_pte = page->parent_pte; | |
679 | else { | |
680 | struct kvm_pte_chain *chain; | |
681 | ||
682 | chain = container_of(page->parent_ptes.first, | |
683 | struct kvm_pte_chain, link); | |
684 | parent_pte = chain->parent_ptes[0]; | |
685 | } | |
697fe2e2 | 686 | BUG_ON(!parent_pte); |
90cb0529 | 687 | kvm_mmu_put_page(page, parent_pte); |
e663ee64 | 688 | set_shadow_pte(parent_pte, 0); |
a436036b | 689 | } |
90cb0529 | 690 | kvm_mmu_page_unlink_children(kvm, page); |
3bb65a22 AK |
691 | if (!page->root_count) { |
692 | hlist_del(&page->hash_link); | |
90cb0529 | 693 | kvm_mmu_free_page(kvm, page); |
36868f7b | 694 | } else |
90cb0529 | 695 | list_move(&page->link, &kvm->active_mmu_pages); |
a436036b AK |
696 | } |
697 | ||
698 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
699 | { | |
700 | unsigned index; | |
701 | struct hlist_head *bucket; | |
702 | struct kvm_mmu_page *page; | |
703 | struct hlist_node *node, *n; | |
704 | int r; | |
705 | ||
706 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
707 | r = 0; | |
708 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
709 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
710 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
711 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
712 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
713 | page->role.word); | |
90cb0529 | 714 | kvm_mmu_zap_page(vcpu->kvm, page); |
a436036b AK |
715 | r = 1; |
716 | } | |
717 | return r; | |
cea0f0e7 AK |
718 | } |
719 | ||
97a0a01e AK |
720 | static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn) |
721 | { | |
722 | struct kvm_mmu_page *page; | |
723 | ||
724 | while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) { | |
725 | pgprintk("%s: zap %lx %x\n", | |
726 | __FUNCTION__, gfn, page->role.word); | |
90cb0529 | 727 | kvm_mmu_zap_page(vcpu->kvm, page); |
97a0a01e AK |
728 | } |
729 | } | |
730 | ||
6aa8b732 AK |
731 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
732 | { | |
733 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
734 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
735 | ||
736 | __set_bit(slot, &page_head->slot_bitmap); | |
737 | } | |
738 | ||
739 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
740 | { | |
741 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
742 | ||
743 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
744 | } | |
745 | ||
746 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
747 | { | |
6aa8b732 AK |
748 | struct page *page; |
749 | ||
750 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
954bbbc2 AK |
751 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
752 | if (!page) | |
6aa8b732 | 753 | return gpa | HPA_ERR_MASK; |
6aa8b732 AK |
754 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) |
755 | | (gpa & (PAGE_SIZE-1)); | |
756 | } | |
757 | ||
758 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
759 | { | |
760 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
761 | ||
762 | if (gpa == UNMAPPED_GVA) | |
763 | return UNMAPPED_GVA; | |
764 | return gpa_to_hpa(vcpu, gpa); | |
765 | } | |
766 | ||
039576c0 AK |
767 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
768 | { | |
769 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
770 | ||
771 | if (gpa == UNMAPPED_GVA) | |
772 | return NULL; | |
773 | return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT); | |
774 | } | |
775 | ||
6aa8b732 AK |
776 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
777 | { | |
778 | } | |
779 | ||
780 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
781 | { | |
782 | int level = PT32E_ROOT_LEVEL; | |
783 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
784 | ||
785 | for (; ; level--) { | |
786 | u32 index = PT64_INDEX(v, level); | |
787 | u64 *table; | |
cea0f0e7 | 788 | u64 pte; |
6aa8b732 AK |
789 | |
790 | ASSERT(VALID_PAGE(table_addr)); | |
791 | table = __va(table_addr); | |
792 | ||
793 | if (level == 1) { | |
cea0f0e7 AK |
794 | pte = table[index]; |
795 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
796 | return 0; | |
6aa8b732 AK |
797 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
798 | page_header_update_slot(vcpu->kvm, table, v); | |
799 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
800 | PT_USER_MASK; | |
714b93da | 801 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
802 | return 0; |
803 | } | |
804 | ||
805 | if (table[index] == 0) { | |
25c0de2c | 806 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 807 | gfn_t pseudo_gfn; |
6aa8b732 | 808 | |
cea0f0e7 AK |
809 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
810 | >> PAGE_SHIFT; | |
811 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
812 | v, level - 1, | |
d28c6cfb | 813 | 1, 0, &table[index]); |
25c0de2c | 814 | if (!new_table) { |
6aa8b732 AK |
815 | pgprintk("nonpaging_map: ENOMEM\n"); |
816 | return -ENOMEM; | |
817 | } | |
818 | ||
47ad8e68 | 819 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 820 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
821 | } |
822 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
823 | } | |
824 | } | |
825 | ||
17ac10ad AK |
826 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
827 | { | |
828 | int i; | |
3bb65a22 | 829 | struct kvm_mmu_page *page; |
17ac10ad | 830 | |
7b53aa56 AK |
831 | if (!VALID_PAGE(vcpu->mmu.root_hpa)) |
832 | return; | |
17ac10ad AK |
833 | #ifdef CONFIG_X86_64 |
834 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
835 | hpa_t root = vcpu->mmu.root_hpa; | |
836 | ||
3bb65a22 AK |
837 | page = page_header(root); |
838 | --page->root_count; | |
17ac10ad AK |
839 | vcpu->mmu.root_hpa = INVALID_PAGE; |
840 | return; | |
841 | } | |
842 | #endif | |
843 | for (i = 0; i < 4; ++i) { | |
844 | hpa_t root = vcpu->mmu.pae_root[i]; | |
845 | ||
417726a3 | 846 | if (root) { |
417726a3 AK |
847 | root &= PT64_BASE_ADDR_MASK; |
848 | page = page_header(root); | |
849 | --page->root_count; | |
850 | } | |
17ac10ad AK |
851 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
852 | } | |
853 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
854 | } | |
855 | ||
856 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
857 | { | |
858 | int i; | |
cea0f0e7 | 859 | gfn_t root_gfn; |
3bb65a22 AK |
860 | struct kvm_mmu_page *page; |
861 | ||
cea0f0e7 | 862 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
863 | |
864 | #ifdef CONFIG_X86_64 | |
865 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
866 | hpa_t root = vcpu->mmu.root_hpa; | |
867 | ||
868 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d | 869 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
d28c6cfb | 870 | PT64_ROOT_LEVEL, 0, 0, NULL); |
47ad8e68 | 871 | root = __pa(page->spt); |
3bb65a22 | 872 | ++page->root_count; |
17ac10ad AK |
873 | vcpu->mmu.root_hpa = root; |
874 | return; | |
875 | } | |
876 | #endif | |
877 | for (i = 0; i < 4; ++i) { | |
878 | hpa_t root = vcpu->mmu.pae_root[i]; | |
879 | ||
880 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
881 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
882 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
883 | vcpu->mmu.pae_root[i] = 0; | |
884 | continue; | |
885 | } | |
cea0f0e7 | 886 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 887 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 888 | root_gfn = 0; |
68a99f6d | 889 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 890 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
d28c6cfb | 891 | 0, NULL); |
47ad8e68 | 892 | root = __pa(page->spt); |
3bb65a22 | 893 | ++page->root_count; |
17ac10ad AK |
894 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
895 | } | |
896 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
897 | } | |
898 | ||
6aa8b732 AK |
899 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
900 | { | |
901 | return vaddr; | |
902 | } | |
903 | ||
904 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
905 | u32 error_code) | |
906 | { | |
6aa8b732 | 907 | gpa_t addr = gva; |
ebeace86 | 908 | hpa_t paddr; |
e2dec939 | 909 | int r; |
6aa8b732 | 910 | |
e2dec939 AK |
911 | r = mmu_topup_memory_caches(vcpu); |
912 | if (r) | |
913 | return r; | |
714b93da | 914 | |
6aa8b732 AK |
915 | ASSERT(vcpu); |
916 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
917 | ||
6aa8b732 | 918 | |
ebeace86 | 919 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 920 | |
ebeace86 AK |
921 | if (is_error_hpa(paddr)) |
922 | return 1; | |
6aa8b732 | 923 | |
ebeace86 | 924 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
925 | } |
926 | ||
6aa8b732 AK |
927 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
928 | { | |
17ac10ad | 929 | mmu_free_roots(vcpu); |
6aa8b732 AK |
930 | } |
931 | ||
932 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
933 | { | |
934 | struct kvm_mmu *context = &vcpu->mmu; | |
935 | ||
936 | context->new_cr3 = nonpaging_new_cr3; | |
937 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
938 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
939 | context->free = nonpaging_free; | |
cea0f0e7 | 940 | context->root_level = 0; |
6aa8b732 | 941 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 942 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
943 | return 0; |
944 | } | |
945 | ||
6aa8b732 AK |
946 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
947 | { | |
1165f5fe | 948 | ++vcpu->stat.tlb_flush; |
6aa8b732 AK |
949 | kvm_arch_ops->tlb_flush(vcpu); |
950 | } | |
951 | ||
952 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
953 | { | |
374cbac0 | 954 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 955 | mmu_free_roots(vcpu); |
6aa8b732 AK |
956 | } |
957 | ||
6aa8b732 AK |
958 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
959 | u64 addr, | |
960 | u32 err_code) | |
961 | { | |
962 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
963 | } | |
964 | ||
6aa8b732 AK |
965 | static void paging_free(struct kvm_vcpu *vcpu) |
966 | { | |
967 | nonpaging_free(vcpu); | |
968 | } | |
969 | ||
970 | #define PTTYPE 64 | |
971 | #include "paging_tmpl.h" | |
972 | #undef PTTYPE | |
973 | ||
974 | #define PTTYPE 32 | |
975 | #include "paging_tmpl.h" | |
976 | #undef PTTYPE | |
977 | ||
17ac10ad | 978 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
979 | { |
980 | struct kvm_mmu *context = &vcpu->mmu; | |
981 | ||
982 | ASSERT(is_pae(vcpu)); | |
983 | context->new_cr3 = paging_new_cr3; | |
984 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
985 | context->gva_to_gpa = paging64_gva_to_gpa; |
986 | context->free = paging_free; | |
17ac10ad AK |
987 | context->root_level = level; |
988 | context->shadow_root_level = level; | |
17c3ba9d | 989 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
990 | return 0; |
991 | } | |
992 | ||
17ac10ad AK |
993 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
994 | { | |
995 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
996 | } | |
997 | ||
6aa8b732 AK |
998 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
999 | { | |
1000 | struct kvm_mmu *context = &vcpu->mmu; | |
1001 | ||
1002 | context->new_cr3 = paging_new_cr3; | |
1003 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1004 | context->gva_to_gpa = paging32_gva_to_gpa; |
1005 | context->free = paging_free; | |
1006 | context->root_level = PT32_ROOT_LEVEL; | |
1007 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1008 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1009 | return 0; |
1010 | } | |
1011 | ||
1012 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1013 | { | |
17ac10ad | 1014 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1015 | } |
1016 | ||
1017 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1018 | { | |
1019 | ASSERT(vcpu); | |
1020 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1021 | ||
1022 | if (!is_paging(vcpu)) | |
1023 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1024 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1025 | return paging64_init_context(vcpu); |
1026 | else if (is_pae(vcpu)) | |
1027 | return paging32E_init_context(vcpu); | |
1028 | else | |
1029 | return paging32_init_context(vcpu); | |
1030 | } | |
1031 | ||
1032 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1033 | { | |
1034 | ASSERT(vcpu); | |
1035 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1036 | vcpu->mmu.free(vcpu); | |
1037 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1042 | { |
1043 | destroy_kvm_mmu(vcpu); | |
1044 | return init_kvm_mmu(vcpu); | |
1045 | } | |
1046 | ||
1047 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1048 | { |
714b93da AK |
1049 | int r; |
1050 | ||
17c3ba9d | 1051 | spin_lock(&vcpu->kvm->lock); |
e2dec939 | 1052 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1053 | if (r) |
1054 | goto out; | |
1055 | mmu_alloc_roots(vcpu); | |
1056 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); | |
1057 | kvm_mmu_flush_tlb(vcpu); | |
714b93da | 1058 | out: |
17c3ba9d | 1059 | spin_unlock(&vcpu->kvm->lock); |
714b93da | 1060 | return r; |
6aa8b732 | 1061 | } |
17c3ba9d AK |
1062 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1063 | ||
1064 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1065 | { | |
1066 | mmu_free_roots(vcpu); | |
1067 | } | |
6aa8b732 | 1068 | |
09072daf | 1069 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
ac1b714e AK |
1070 | struct kvm_mmu_page *page, |
1071 | u64 *spte) | |
1072 | { | |
1073 | u64 pte; | |
1074 | struct kvm_mmu_page *child; | |
1075 | ||
1076 | pte = *spte; | |
1077 | if (is_present_pte(pte)) { | |
1078 | if (page->role.level == PT_PAGE_TABLE_LEVEL) | |
90cb0529 | 1079 | rmap_remove(spte); |
ac1b714e AK |
1080 | else { |
1081 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1082 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1083 | } |
1084 | } | |
1085 | *spte = 0; | |
d9e368d6 | 1086 | kvm_flush_remote_tlbs(vcpu->kvm); |
ac1b714e AK |
1087 | } |
1088 | ||
0028425f AK |
1089 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
1090 | struct kvm_mmu_page *page, | |
1091 | u64 *spte, | |
1092 | const void *new, int bytes) | |
1093 | { | |
1094 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1095 | return; | |
1096 | ||
1097 | if (page->role.glevels == PT32_ROOT_LEVEL) | |
1098 | paging32_update_pte(vcpu, page, spte, new, bytes); | |
1099 | else | |
1100 | paging64_update_pte(vcpu, page, spte, new, bytes); | |
1101 | } | |
1102 | ||
09072daf AK |
1103 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1104 | const u8 *old, const u8 *new, int bytes) | |
da4a00f0 | 1105 | { |
9b7a0325 AK |
1106 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1107 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1108 | struct hlist_node *node, *n; |
9b7a0325 AK |
1109 | struct hlist_head *bucket; |
1110 | unsigned index; | |
1111 | u64 *spte; | |
9b7a0325 | 1112 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1113 | unsigned pte_size; |
9b7a0325 | 1114 | unsigned page_offset; |
0e7bc4b9 | 1115 | unsigned misaligned; |
fce0657f | 1116 | unsigned quadrant; |
9b7a0325 | 1117 | int level; |
86a5ba02 | 1118 | int flooded = 0; |
ac1b714e | 1119 | int npte; |
9b7a0325 | 1120 | |
da4a00f0 | 1121 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1122 | if (gfn == vcpu->last_pt_write_gfn) { |
1123 | ++vcpu->last_pt_write_count; | |
1124 | if (vcpu->last_pt_write_count >= 3) | |
1125 | flooded = 1; | |
1126 | } else { | |
1127 | vcpu->last_pt_write_gfn = gfn; | |
1128 | vcpu->last_pt_write_count = 1; | |
1129 | } | |
9b7a0325 AK |
1130 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1131 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1132 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1133 | if (page->gfn != gfn || page->role.metaphysical) |
1134 | continue; | |
0e7bc4b9 AK |
1135 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1136 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
e925c5ba | 1137 | misaligned |= bytes < 4; |
86a5ba02 | 1138 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1139 | /* |
1140 | * Misaligned accesses are too much trouble to fix | |
1141 | * up; also, they usually indicate a page is not used | |
1142 | * as a page table. | |
86a5ba02 AK |
1143 | * |
1144 | * If we're seeing too many writes to a page, | |
1145 | * it may no longer be a page table, or we may be | |
1146 | * forking, in which case it is better to unmap the | |
1147 | * page. | |
0e7bc4b9 AK |
1148 | */ |
1149 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1150 | gpa, bytes, page->role.word); | |
90cb0529 | 1151 | kvm_mmu_zap_page(vcpu->kvm, page); |
0e7bc4b9 AK |
1152 | continue; |
1153 | } | |
9b7a0325 AK |
1154 | page_offset = offset; |
1155 | level = page->role.level; | |
ac1b714e | 1156 | npte = 1; |
9b7a0325 | 1157 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1158 | page_offset <<= 1; /* 32->64 */ |
1159 | /* | |
1160 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1161 | * only 2MB. So we need to double the offset again | |
1162 | * and zap two pdes instead of one. | |
1163 | */ | |
1164 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1165 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1166 | page_offset <<= 1; |
1167 | npte = 2; | |
1168 | } | |
fce0657f | 1169 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1170 | page_offset &= ~PAGE_MASK; |
fce0657f AK |
1171 | if (quadrant != page->role.quadrant) |
1172 | continue; | |
9b7a0325 | 1173 | } |
47ad8e68 | 1174 | spte = &page->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1175 | while (npte--) { |
09072daf | 1176 | mmu_pte_write_zap_pte(vcpu, page, spte); |
0028425f | 1177 | mmu_pte_write_new_pte(vcpu, page, spte, new, bytes); |
ac1b714e | 1178 | ++spte; |
9b7a0325 | 1179 | } |
9b7a0325 | 1180 | } |
da4a00f0 AK |
1181 | } |
1182 | ||
a436036b AK |
1183 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1184 | { | |
1185 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1186 | ||
1187 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1188 | } | |
1189 | ||
ebeace86 AK |
1190 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1191 | { | |
1192 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1193 | struct kvm_mmu_page *page; | |
1194 | ||
1195 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1196 | struct kvm_mmu_page, link); | |
90cb0529 | 1197 | kvm_mmu_zap_page(vcpu->kvm, page); |
ebeace86 AK |
1198 | } |
1199 | } | |
1200 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1201 | ||
6aa8b732 AK |
1202 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1203 | { | |
f51234c2 | 1204 | struct kvm_mmu_page *page; |
6aa8b732 | 1205 | |
f51234c2 AK |
1206 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1207 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1208 | struct kvm_mmu_page, link); | |
90cb0529 | 1209 | kvm_mmu_zap_page(vcpu->kvm, page); |
f51234c2 | 1210 | } |
17ac10ad | 1211 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1212 | } |
1213 | ||
1214 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1215 | { | |
17ac10ad | 1216 | struct page *page; |
6aa8b732 AK |
1217 | int i; |
1218 | ||
1219 | ASSERT(vcpu); | |
1220 | ||
d3d25b04 | 1221 | vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES; |
17ac10ad AK |
1222 | |
1223 | /* | |
1224 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1225 | * Therefore we need to allocate shadow page tables in the first | |
1226 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1227 | */ | |
1228 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1229 | if (!page) | |
1230 | goto error_1; | |
1231 | vcpu->mmu.pae_root = page_address(page); | |
1232 | for (i = 0; i < 4; ++i) | |
1233 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1234 | ||
6aa8b732 AK |
1235 | return 0; |
1236 | ||
1237 | error_1: | |
1238 | free_mmu_pages(vcpu); | |
1239 | return -ENOMEM; | |
1240 | } | |
1241 | ||
8018c27b | 1242 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1243 | { |
6aa8b732 AK |
1244 | ASSERT(vcpu); |
1245 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1246 | |
8018c27b IM |
1247 | return alloc_mmu_pages(vcpu); |
1248 | } | |
6aa8b732 | 1249 | |
8018c27b IM |
1250 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1251 | { | |
1252 | ASSERT(vcpu); | |
1253 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1254 | |
8018c27b | 1255 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1256 | } |
1257 | ||
1258 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1259 | { | |
1260 | ASSERT(vcpu); | |
1261 | ||
1262 | destroy_kvm_mmu(vcpu); | |
1263 | free_mmu_pages(vcpu); | |
714b93da | 1264 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1265 | } |
1266 | ||
90cb0529 | 1267 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 AK |
1268 | { |
1269 | struct kvm_mmu_page *page; | |
1270 | ||
1271 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1272 | int i; | |
1273 | u64 *pt; | |
1274 | ||
1275 | if (!test_bit(slot, &page->slot_bitmap)) | |
1276 | continue; | |
1277 | ||
47ad8e68 | 1278 | pt = page->spt; |
6aa8b732 AK |
1279 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1280 | /* avoid RMW */ | |
cd4a4e53 | 1281 | if (pt[i] & PT_WRITABLE_MASK) { |
90cb0529 | 1282 | rmap_remove(&pt[i]); |
6aa8b732 | 1283 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1284 | } |
6aa8b732 AK |
1285 | } |
1286 | } | |
37a7d8b0 | 1287 | |
90cb0529 | 1288 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1289 | { |
90cb0529 | 1290 | struct kvm_mmu_page *page, *node; |
e0fa826f | 1291 | |
90cb0529 AK |
1292 | list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link) |
1293 | kvm_mmu_zap_page(kvm, page); | |
e0fa826f | 1294 | |
90cb0529 | 1295 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1296 | } |
1297 | ||
b5a33a75 AK |
1298 | void kvm_mmu_module_exit(void) |
1299 | { | |
1300 | if (pte_chain_cache) | |
1301 | kmem_cache_destroy(pte_chain_cache); | |
1302 | if (rmap_desc_cache) | |
1303 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1304 | if (mmu_page_cache) |
1305 | kmem_cache_destroy(mmu_page_cache); | |
1306 | if (mmu_page_header_cache) | |
1307 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1308 | } |
1309 | ||
1310 | int kvm_mmu_module_init(void) | |
1311 | { | |
1312 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1313 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1314 | 0, 0, NULL); |
b5a33a75 AK |
1315 | if (!pte_chain_cache) |
1316 | goto nomem; | |
1317 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1318 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1319 | 0, 0, NULL); |
b5a33a75 AK |
1320 | if (!rmap_desc_cache) |
1321 | goto nomem; | |
1322 | ||
d3d25b04 AK |
1323 | mmu_page_cache = kmem_cache_create("kvm_mmu_page", |
1324 | PAGE_SIZE, | |
20c2df83 | 1325 | PAGE_SIZE, 0, NULL); |
d3d25b04 AK |
1326 | if (!mmu_page_cache) |
1327 | goto nomem; | |
1328 | ||
1329 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", | |
1330 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 1331 | 0, 0, NULL); |
d3d25b04 AK |
1332 | if (!mmu_page_header_cache) |
1333 | goto nomem; | |
1334 | ||
b5a33a75 AK |
1335 | return 0; |
1336 | ||
1337 | nomem: | |
1338 | kvm_mmu_module_exit(); | |
1339 | return -ENOMEM; | |
1340 | } | |
1341 | ||
37a7d8b0 AK |
1342 | #ifdef AUDIT |
1343 | ||
1344 | static const char *audit_msg; | |
1345 | ||
1346 | static gva_t canonicalize(gva_t gva) | |
1347 | { | |
1348 | #ifdef CONFIG_X86_64 | |
1349 | gva = (long long)(gva << 16) >> 16; | |
1350 | #endif | |
1351 | return gva; | |
1352 | } | |
1353 | ||
1354 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1355 | gva_t va, int level) | |
1356 | { | |
1357 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1358 | int i; | |
1359 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1360 | ||
1361 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1362 | u64 ent = pt[i]; | |
1363 | ||
2807696c | 1364 | if (!(ent & PT_PRESENT_MASK)) |
37a7d8b0 AK |
1365 | continue; |
1366 | ||
1367 | va = canonicalize(va); | |
1368 | if (level > 1) | |
1369 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1370 | else { | |
1371 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1372 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1373 | ||
1374 | if ((ent & PT_PRESENT_MASK) | |
1375 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1376 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1377 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1378 | audit_msg, vcpu->mmu.root_level, | |
1379 | va, gpa, hpa, ent); | |
1380 | } | |
1381 | } | |
1382 | } | |
1383 | ||
1384 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1385 | { | |
1ea252af | 1386 | unsigned i; |
37a7d8b0 AK |
1387 | |
1388 | if (vcpu->mmu.root_level == 4) | |
1389 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1390 | else | |
1391 | for (i = 0; i < 4; ++i) | |
1392 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1393 | audit_mappings_page(vcpu, | |
1394 | vcpu->mmu.pae_root[i], | |
1395 | i << 30, | |
1396 | 2); | |
1397 | } | |
1398 | ||
1399 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1400 | { | |
1401 | int nmaps = 0; | |
1402 | int i, j, k; | |
1403 | ||
1404 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1405 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1406 | struct kvm_rmap_desc *d; | |
1407 | ||
1408 | for (j = 0; j < m->npages; ++j) { | |
1409 | struct page *page = m->phys_mem[j]; | |
1410 | ||
1411 | if (!page->private) | |
1412 | continue; | |
1413 | if (!(page->private & 1)) { | |
1414 | ++nmaps; | |
1415 | continue; | |
1416 | } | |
1417 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1418 | while (d) { | |
1419 | for (k = 0; k < RMAP_EXT; ++k) | |
1420 | if (d->shadow_ptes[k]) | |
1421 | ++nmaps; | |
1422 | else | |
1423 | break; | |
1424 | d = d->more; | |
1425 | } | |
1426 | } | |
1427 | } | |
1428 | return nmaps; | |
1429 | } | |
1430 | ||
1431 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1432 | { | |
1433 | int nmaps = 0; | |
1434 | struct kvm_mmu_page *page; | |
1435 | int i; | |
1436 | ||
1437 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
47ad8e68 | 1438 | u64 *pt = page->spt; |
37a7d8b0 AK |
1439 | |
1440 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1441 | continue; | |
1442 | ||
1443 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1444 | u64 ent = pt[i]; | |
1445 | ||
1446 | if (!(ent & PT_PRESENT_MASK)) | |
1447 | continue; | |
1448 | if (!(ent & PT_WRITABLE_MASK)) | |
1449 | continue; | |
1450 | ++nmaps; | |
1451 | } | |
1452 | } | |
1453 | return nmaps; | |
1454 | } | |
1455 | ||
1456 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1457 | { | |
1458 | int n_rmap = count_rmaps(vcpu); | |
1459 | int n_actual = count_writable_mappings(vcpu); | |
1460 | ||
1461 | if (n_rmap != n_actual) | |
1462 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1463 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1464 | } | |
1465 | ||
1466 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1467 | { | |
1468 | struct kvm_mmu_page *page; | |
1469 | ||
1470 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1471 | hfn_t hfn; | |
1472 | struct page *pg; | |
1473 | ||
1474 | if (page->role.metaphysical) | |
1475 | continue; | |
1476 | ||
1477 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1478 | >> PAGE_SHIFT; | |
1479 | pg = pfn_to_page(hfn); | |
1480 | if (pg->private) | |
1481 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1482 | " mappings: gfn %lx role %x\n", | |
1483 | __FUNCTION__, audit_msg, page->gfn, | |
1484 | page->role.word); | |
1485 | } | |
1486 | } | |
1487 | ||
1488 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1489 | { | |
1490 | int olddbg = dbg; | |
1491 | ||
1492 | dbg = 0; | |
1493 | audit_msg = msg; | |
1494 | audit_rmap(vcpu); | |
1495 | audit_write_protection(vcpu); | |
1496 | audit_mappings(vcpu); | |
1497 | dbg = olddbg; | |
1498 | } | |
1499 | ||
1500 | #endif |