megaraid_sas: add missing curly braces in ioctl handler
[deliverable/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS
4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS
24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS
30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS
32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS
38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS
51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS
58#include "megaraid_sas.h"
59
1fd10685
YB
60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
e3d178ca 86unsigned int resetwaittime = MEGASAS_RESET_WAIT_TIME;
c007b8b2 87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS
91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
179ac142
SS
95int rdpq_enable = 1;
96module_param(rdpq_enable, int, S_IRUGO);
97MODULE_PARM_DESC(rdpq_enable, " Allocate reply queue in chunks for large queue depth enable/disable Default: disable(0)");
98
308ec459
SS
99unsigned int dual_qdepth_disable;
100module_param(dual_qdepth_disable, int, S_IRUGO);
101MODULE_PARM_DESC(dual_qdepth_disable, "Disable dual queue depth feature. Default: 0");
102
e3d178ca
SS
103unsigned int scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
104module_param(scmd_timeout, int, S_IRUGO);
105MODULE_PARM_DESC(scmd_timeout, "scsi command timeout (10-90s), default 90s. See megasas_reset_timer.");
106
c4a3e0a5
BS
107MODULE_LICENSE("GPL");
108MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS
109MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
110MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 111
058a8fac 112int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 113static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160 114static int megasas_ld_list_query(struct megasas_instance *instance,
115 u8 query_type);
39a98554 116static int megasas_issue_init_mfi(struct megasas_instance *instance);
117static int megasas_register_aen(struct megasas_instance *instance,
118 u32 seq_num, u32 class_locale_word);
2216c305
SS
119static int
120megasas_get_pd_info(struct megasas_instance *instance, u16 device_id);
c4a3e0a5
BS
121/*
122 * PCI ID table for all supported controllers
123 */
124static struct pci_device_id megasas_pci_table[] = {
125
f3d7271c
HK
126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
127 /* xscale IOP */
128 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
129 /* ppc IOP */
af7a5647 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
131 /* ppc IOP */
6610a6b3
YB
132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
133 /* gen2*/
134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
135 /* gen2*/
87911122
YB
136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
137 /* skinny*/
138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
139 /* skinny*/
f3d7271c
HK
140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
141 /* xscale IOP, vega */
142 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
143 /* xscale IOP */
9c915a8c 144 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
145 /* Fusion */
229fe47c 146 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
147 /* Plasma */
36807e67 148 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
149 /* Invader */
21d3c710
SS
150 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
151 /* Fury */
90c204bc 152 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
153 /* Intruder */
154 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
155 /* Intruder 24 port*/
7364d34b 156 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
157 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
f3d7271c 158 {}
c4a3e0a5
BS
159};
160
161MODULE_DEVICE_TABLE(pci, megasas_pci_table);
162
163static int megasas_mgmt_majorno;
229fe47c 164struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 165static struct fasync_struct *megasas_async_queue;
0b950672 166static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 167
c3518837
YB
168static int megasas_poll_wait_aen;
169static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 170static u32 support_poll_for_event;
9c915a8c 171u32 megasas_dbg_lvl;
837f5fe8 172static u32 support_device_change;
658dcedb 173
c3518837
YB
174/* define lock for aen poll */
175spinlock_t poll_aen_lock;
176
9c915a8c 177void
7343eb65 178megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
179 u8 alt_status);
ebf054b0 180static u32
181megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
182static int
183megasas_adp_reset_gen2(struct megasas_instance *instance,
184 struct megasas_register_set __iomem *reg_set);
cd50ba8e 185static irqreturn_t megasas_isr(int irq, void *devp);
186static u32
187megasas_init_adapter_mfi(struct megasas_instance *instance);
188u32
189megasas_build_and_issue_cmd(struct megasas_instance *instance,
190 struct scsi_cmnd *scmd);
191static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 192void
193megasas_release_fusion(struct megasas_instance *instance);
194int
195megasas_ioc_init_fusion(struct megasas_instance *instance);
196void
197megasas_free_cmds_fusion(struct megasas_instance *instance);
198u8
199megasas_get_map_info(struct megasas_instance *instance);
200int
201megasas_sync_map_info(struct megasas_instance *instance);
202int
229fe47c 203wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
204 int seconds);
9c915a8c 205void megasas_reset_reply_desc(struct megasas_instance *instance);
9c915a8c 206void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c 207static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
208 int initial);
209int megasas_check_mpio_paths(struct megasas_instance *instance,
210 struct scsi_cmnd *scmd);
cd50ba8e 211
6d40afbc 212int
cd50ba8e 213megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
214{
215 instance->instancet->fire_cmd(instance,
216 cmd->frame_phys_addr, 0, instance->reg_set);
6d40afbc 217 return 0;
cd50ba8e 218}
7343eb65 219
c4a3e0a5
BS
220/**
221 * megasas_get_cmd - Get a command from the free pool
222 * @instance: Adapter soft state
223 *
224 * Returns a free command from the pool
225 */
9c915a8c 226struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS
227 *instance)
228{
229 unsigned long flags;
230 struct megasas_cmd *cmd = NULL;
231
90dc9d98 232 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS
233
234 if (!list_empty(&instance->cmd_pool)) {
235 cmd = list_entry((&instance->cmd_pool)->next,
236 struct megasas_cmd, list);
237 list_del_init(&cmd->list);
238 } else {
1be18254 239 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS
240 }
241
90dc9d98 242 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS
243 return cmd;
244}
245
246/**
4026e9aa 247 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS
248 * @instance: Adapter soft state
249 * @cmd: Command packet to be returned to free command pool
250 */
9c915a8c 251inline void
4026e9aa 252megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 253{
4026e9aa
SS
254 unsigned long flags;
255 u32 blk_tags;
256 struct megasas_cmd_fusion *cmd_fusion;
257 struct fusion_context *fusion = instance->ctrl_context;
258
259 /* This flag is used only for fusion adapter.
260 * Wait for Interrupt for Polled mode DCMD
90dc9d98 261 */
4026e9aa 262 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 263 return;
c4a3e0a5 264
4026e9aa
SS
265 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
266
267 if (fusion) {
268 blk_tags = instance->max_scsi_cmds + cmd->index;
269 cmd_fusion = fusion->cmd_list[blk_tags];
270 megasas_return_cmd_fusion(instance, cmd_fusion);
271 }
c4a3e0a5 272 cmd->scmd = NULL;
9c915a8c 273 cmd->frame_count = 0;
4026e9aa
SS
274 cmd->flags = 0;
275 if (!fusion && reset_devices)
e5f93a36 276 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 277 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 278
90dc9d98 279 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 280
4026e9aa 281}
1341c939 282
714f5177 283static const char *
284format_timestamp(uint32_t timestamp)
285{
286 static char buffer[32];
287
288 if ((timestamp & 0xff000000) == 0xff000000)
289 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
290 0x00ffffff);
291 else
292 snprintf(buffer, sizeof(buffer), "%us", timestamp);
293 return buffer;
294}
295
296static const char *
297format_class(int8_t class)
298{
299 static char buffer[6];
300
301 switch (class) {
302 case MFI_EVT_CLASS_DEBUG:
303 return "debug";
304 case MFI_EVT_CLASS_PROGRESS:
305 return "progress";
306 case MFI_EVT_CLASS_INFO:
307 return "info";
308 case MFI_EVT_CLASS_WARNING:
309 return "WARN";
310 case MFI_EVT_CLASS_CRITICAL:
311 return "CRIT";
312 case MFI_EVT_CLASS_FATAL:
313 return "FATAL";
314 case MFI_EVT_CLASS_DEAD:
315 return "DEAD";
316 default:
317 snprintf(buffer, sizeof(buffer), "%d", class);
318 return buffer;
319 }
320}
321
322/**
323 * megasas_decode_evt: Decode FW AEN event and print critical event
324 * for information.
325 * @instance: Adapter soft state
326 */
327static void
328megasas_decode_evt(struct megasas_instance *instance)
329{
330 struct megasas_evt_detail *evt_detail = instance->evt_detail;
331 union megasas_evt_class_locale class_locale;
332 class_locale.word = le32_to_cpu(evt_detail->cl.word);
333
334 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
335 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
336 le32_to_cpu(evt_detail->seq_num),
337 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
338 (class_locale.members.locale),
339 format_class(class_locale.members.class),
340 evt_detail->description);
341}
342
1341c939 343/**
0d49016b 344* The following functions are defined for xscale
1341c939
SP
345* (deviceid : 1064R, PERC5) controllers
346*/
347
c4a3e0a5 348/**
1341c939 349 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS
350 * @regs: MFI register set
351 */
352static inline void
d46a3ad6 353megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 354{
d46a3ad6 355 struct megasas_register_set __iomem *regs;
da0dc9fb 356
d46a3ad6 357 regs = instance->reg_set;
39a98554 358 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS
359
360 /* Dummy readl to force pci flush */
361 readl(&regs->outbound_intr_mask);
362}
363
b274cab7
SP
364/**
365 * megasas_disable_intr_xscale -Disables interrupt
366 * @regs: MFI register set
367 */
368static inline void
d46a3ad6 369megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 370{
d46a3ad6 371 struct megasas_register_set __iomem *regs;
b274cab7 372 u32 mask = 0x1f;
da0dc9fb 373
d46a3ad6 374 regs = instance->reg_set;
b274cab7
SP
375 writel(mask, &regs->outbound_intr_mask);
376 /* Dummy readl to force pci flush */
377 readl(&regs->outbound_intr_mask);
378}
379
1341c939
SP
380/**
381 * megasas_read_fw_status_reg_xscale - returns the current FW status value
382 * @regs: MFI register set
383 */
384static u32
385megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
386{
387 return readl(&(regs)->outbound_msg_0);
388}
389/**
390 * megasas_clear_interrupt_xscale - Check & clear interrupt
391 * @regs: MFI register set
392 */
0d49016b 393static int
1341c939
SP
394megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
395{
396 u32 status;
39a98554 397 u32 mfiStatus = 0;
da0dc9fb 398
1341c939
SP
399 /*
400 * Check if it is our interrupt
401 */
402 status = readl(&regs->outbound_intr_status);
403
39a98554 404 if (status & MFI_OB_INTR_STATUS_MASK)
405 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
406 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
407 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP
408
409 /*
410 * Clear the interrupt by writing back the same value
411 */
39a98554 412 if (mfiStatus)
413 writel(status, &regs->outbound_intr_status);
1341c939 414
06f579de
YB
415 /* Dummy readl to force pci flush */
416 readl(&regs->outbound_intr_status);
417
39a98554 418 return mfiStatus;
1341c939
SP
419}
420
421/**
422 * megasas_fire_cmd_xscale - Sends command to the FW
423 * @frame_phys_addr : Physical address of cmd
424 * @frame_count : Number of frames for the command
425 * @regs : MFI register set
426 */
0d49016b 427static inline void
0c79e681
YB
428megasas_fire_cmd_xscale(struct megasas_instance *instance,
429 dma_addr_t frame_phys_addr,
430 u32 frame_count,
431 struct megasas_register_set __iomem *regs)
1341c939 432{
39a98554 433 unsigned long flags;
da0dc9fb 434
39a98554 435 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP
436 writel((frame_phys_addr >> 3)|(frame_count),
437 &(regs)->inbound_queue_port);
39a98554 438 spin_unlock_irqrestore(&instance->hba_lock, flags);
439}
440
441/**
442 * megasas_adp_reset_xscale - For controller reset
443 * @regs: MFI register set
444 */
445static int
446megasas_adp_reset_xscale(struct megasas_instance *instance,
447 struct megasas_register_set __iomem *regs)
448{
449 u32 i;
450 u32 pcidata;
da0dc9fb 451
39a98554 452 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
453
454 for (i = 0; i < 3; i++)
455 msleep(1000); /* sleep for 3 secs */
456 pcidata = 0;
457 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 458 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 459 if (pcidata & 0x2) {
1be18254 460 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 461 pcidata &= ~0x2;
462 pci_write_config_dword(instance->pdev,
463 MFI_1068_PCSR_OFFSET, pcidata);
464
465 for (i = 0; i < 2; i++)
466 msleep(1000); /* need to wait 2 secs again */
467
468 pcidata = 0;
469 pci_read_config_dword(instance->pdev,
470 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 471 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 472 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 473 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 474 pcidata = 0;
475 pci_write_config_dword(instance->pdev,
476 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
477 }
478 }
479 return 0;
480}
481
482/**
483 * megasas_check_reset_xscale - For controller reset check
484 * @regs: MFI register set
485 */
486static int
487megasas_check_reset_xscale(struct megasas_instance *instance,
488 struct megasas_register_set __iomem *regs)
489{
8a01a41d 490 if ((atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS
491 (le32_to_cpu(*instance->consumer) ==
492 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 493 return 1;
39a98554 494 return 0;
1341c939
SP
495}
496
497static struct megasas_instance_template megasas_instance_template_xscale = {
498
499 .fire_cmd = megasas_fire_cmd_xscale,
500 .enable_intr = megasas_enable_intr_xscale,
b274cab7 501 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP
502 .clear_intr = megasas_clear_intr_xscale,
503 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 504 .adp_reset = megasas_adp_reset_xscale,
505 .check_reset = megasas_check_reset_xscale,
cd50ba8e 506 .service_isr = megasas_isr,
507 .tasklet = megasas_complete_cmd_dpc,
508 .init_adapter = megasas_init_adapter_mfi,
509 .build_and_issue_cmd = megasas_build_and_issue_cmd,
510 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP
511};
512
513/**
0d49016b 514* This is the end of set of functions & definitions specific
1341c939
SP
515* to xscale (deviceid : 1064R, PERC5) controllers
516*/
517
f9876f0b 518/**
0d49016b 519* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 520* controllers
f9876f0b
SP
521*/
522
523/**
524 * megasas_enable_intr_ppc - Enables interrupts
525 * @regs: MFI register set
526 */
527static inline void
d46a3ad6 528megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 529{
d46a3ad6 530 struct megasas_register_set __iomem *regs;
da0dc9fb 531
d46a3ad6 532 regs = instance->reg_set;
f9876f0b 533 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 534
39a98554 535 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP
536
537 /* Dummy readl to force pci flush */
538 readl(&regs->outbound_intr_mask);
539}
540
b274cab7
SP
541/**
542 * megasas_disable_intr_ppc - Disable interrupt
543 * @regs: MFI register set
544 */
545static inline void
d46a3ad6 546megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 547{
d46a3ad6 548 struct megasas_register_set __iomem *regs;
b274cab7 549 u32 mask = 0xFFFFFFFF;
da0dc9fb 550
d46a3ad6 551 regs = instance->reg_set;
b274cab7
SP
552 writel(mask, &regs->outbound_intr_mask);
553 /* Dummy readl to force pci flush */
554 readl(&regs->outbound_intr_mask);
555}
556
f9876f0b
SP
557/**
558 * megasas_read_fw_status_reg_ppc - returns the current FW status value
559 * @regs: MFI register set
560 */
561static u32
562megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
563{
564 return readl(&(regs)->outbound_scratch_pad);
565}
566
567/**
568 * megasas_clear_interrupt_ppc - Check & clear interrupt
569 * @regs: MFI register set
570 */
0d49016b 571static int
f9876f0b
SP
572megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
573{
3cc6851f 574 u32 status, mfiStatus = 0;
575
f9876f0b
SP
576 /*
577 * Check if it is our interrupt
578 */
579 status = readl(&regs->outbound_intr_status);
580
3cc6851f 581 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
582 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
583
584 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
585 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP
586
587 /*
588 * Clear the interrupt by writing back the same value
589 */
590 writel(status, &regs->outbound_doorbell_clear);
591
06f579de
YB
592 /* Dummy readl to force pci flush */
593 readl(&regs->outbound_doorbell_clear);
594
3cc6851f 595 return mfiStatus;
f9876f0b 596}
3cc6851f 597
f9876f0b
SP
598/**
599 * megasas_fire_cmd_ppc - Sends command to the FW
600 * @frame_phys_addr : Physical address of cmd
601 * @frame_count : Number of frames for the command
602 * @regs : MFI register set
603 */
0d49016b 604static inline void
0c79e681
YB
605megasas_fire_cmd_ppc(struct megasas_instance *instance,
606 dma_addr_t frame_phys_addr,
607 u32 frame_count,
608 struct megasas_register_set __iomem *regs)
f9876f0b 609{
39a98554 610 unsigned long flags;
da0dc9fb 611
39a98554 612 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 613 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 614 &(regs)->inbound_queue_port);
39a98554 615 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP
616}
617
39a98554 618/**
619 * megasas_check_reset_ppc - For controller reset check
620 * @regs: MFI register set
621 */
622static int
623megasas_check_reset_ppc(struct megasas_instance *instance,
624 struct megasas_register_set __iomem *regs)
625{
8a01a41d 626 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f 627 return 1;
628
39a98554 629 return 0;
630}
3cc6851f 631
f9876f0b 632static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 633
f9876f0b
SP
634 .fire_cmd = megasas_fire_cmd_ppc,
635 .enable_intr = megasas_enable_intr_ppc,
b274cab7 636 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP
637 .clear_intr = megasas_clear_intr_ppc,
638 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 639 .adp_reset = megasas_adp_reset_xscale,
39a98554 640 .check_reset = megasas_check_reset_ppc,
cd50ba8e 641 .service_isr = megasas_isr,
642 .tasklet = megasas_complete_cmd_dpc,
643 .init_adapter = megasas_init_adapter_mfi,
644 .build_and_issue_cmd = megasas_build_and_issue_cmd,
645 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP
646};
647
87911122
YB
648/**
649 * megasas_enable_intr_skinny - Enables interrupts
650 * @regs: MFI register set
651 */
652static inline void
d46a3ad6 653megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 654{
d46a3ad6 655 struct megasas_register_set __iomem *regs;
da0dc9fb 656
d46a3ad6 657 regs = instance->reg_set;
87911122
YB
658 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
659
660 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
661
662 /* Dummy readl to force pci flush */
663 readl(&regs->outbound_intr_mask);
664}
665
666/**
667 * megasas_disable_intr_skinny - Disables interrupt
668 * @regs: MFI register set
669 */
670static inline void
d46a3ad6 671megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 672{
d46a3ad6 673 struct megasas_register_set __iomem *regs;
87911122 674 u32 mask = 0xFFFFFFFF;
da0dc9fb 675
d46a3ad6 676 regs = instance->reg_set;
87911122
YB
677 writel(mask, &regs->outbound_intr_mask);
678 /* Dummy readl to force pci flush */
679 readl(&regs->outbound_intr_mask);
680}
681
682/**
683 * megasas_read_fw_status_reg_skinny - returns the current FW status value
684 * @regs: MFI register set
685 */
686static u32
687megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
688{
689 return readl(&(regs)->outbound_scratch_pad);
690}
691
692/**
693 * megasas_clear_interrupt_skinny - Check & clear interrupt
694 * @regs: MFI register set
695 */
696static int
697megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
698{
699 u32 status;
ebf054b0 700 u32 mfiStatus = 0;
701
87911122
YB
702 /*
703 * Check if it is our interrupt
704 */
705 status = readl(&regs->outbound_intr_status);
706
707 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 708 return 0;
87911122
YB
709 }
710
ebf054b0 711 /*
712 * Check if it is our interrupt
713 */
a3fda7dd 714 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0 715 MFI_STATE_FAULT) {
716 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
717 } else
718 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
719
87911122
YB
720 /*
721 * Clear the interrupt by writing back the same value
722 */
723 writel(status, &regs->outbound_intr_status);
724
725 /*
da0dc9fb
BH
726 * dummy read to flush PCI
727 */
87911122
YB
728 readl(&regs->outbound_intr_status);
729
ebf054b0 730 return mfiStatus;
87911122
YB
731}
732
733/**
734 * megasas_fire_cmd_skinny - Sends command to the FW
735 * @frame_phys_addr : Physical address of cmd
736 * @frame_count : Number of frames for the command
737 * @regs : MFI register set
738 */
739static inline void
0c79e681
YB
740megasas_fire_cmd_skinny(struct megasas_instance *instance,
741 dma_addr_t frame_phys_addr,
742 u32 frame_count,
87911122
YB
743 struct megasas_register_set __iomem *regs)
744{
0c79e681 745 unsigned long flags;
da0dc9fb 746
39a98554 747 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS
748 writel(upper_32_bits(frame_phys_addr),
749 &(regs)->inbound_high_queue_port);
750 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
751 &(regs)->inbound_low_queue_port);
b99dbe56 752 mmiowb();
39a98554 753 spin_unlock_irqrestore(&instance->hba_lock, flags);
754}
755
39a98554 756/**
757 * megasas_check_reset_skinny - For controller reset check
758 * @regs: MFI register set
759 */
760static int
761megasas_check_reset_skinny(struct megasas_instance *instance,
762 struct megasas_register_set __iomem *regs)
763{
8a01a41d 764 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
3cc6851f 765 return 1;
766
39a98554 767 return 0;
87911122
YB
768}
769
770static struct megasas_instance_template megasas_instance_template_skinny = {
771
772 .fire_cmd = megasas_fire_cmd_skinny,
773 .enable_intr = megasas_enable_intr_skinny,
774 .disable_intr = megasas_disable_intr_skinny,
775 .clear_intr = megasas_clear_intr_skinny,
776 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 777 .adp_reset = megasas_adp_reset_gen2,
39a98554 778 .check_reset = megasas_check_reset_skinny,
cd50ba8e 779 .service_isr = megasas_isr,
780 .tasklet = megasas_complete_cmd_dpc,
781 .init_adapter = megasas_init_adapter_mfi,
782 .build_and_issue_cmd = megasas_build_and_issue_cmd,
783 .issue_dcmd = megasas_issue_dcmd,
87911122
YB
784};
785
786
6610a6b3
YB
787/**
788* The following functions are defined for gen2 (deviceid : 0x78 0x79)
789* controllers
790*/
791
792/**
793 * megasas_enable_intr_gen2 - Enables interrupts
794 * @regs: MFI register set
795 */
796static inline void
d46a3ad6 797megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 798{
d46a3ad6 799 struct megasas_register_set __iomem *regs;
da0dc9fb 800
d46a3ad6 801 regs = instance->reg_set;
6610a6b3
YB
802 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
803
804 /* write ~0x00000005 (4 & 1) to the intr mask*/
805 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
806
807 /* Dummy readl to force pci flush */
808 readl(&regs->outbound_intr_mask);
809}
810
811/**
812 * megasas_disable_intr_gen2 - Disables interrupt
813 * @regs: MFI register set
814 */
815static inline void
d46a3ad6 816megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 817{
d46a3ad6 818 struct megasas_register_set __iomem *regs;
6610a6b3 819 u32 mask = 0xFFFFFFFF;
da0dc9fb 820
d46a3ad6 821 regs = instance->reg_set;
6610a6b3
YB
822 writel(mask, &regs->outbound_intr_mask);
823 /* Dummy readl to force pci flush */
824 readl(&regs->outbound_intr_mask);
825}
826
827/**
828 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
829 * @regs: MFI register set
830 */
831static u32
832megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
833{
834 return readl(&(regs)->outbound_scratch_pad);
835}
836
837/**
838 * megasas_clear_interrupt_gen2 - Check & clear interrupt
839 * @regs: MFI register set
840 */
841static int
842megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
843{
844 u32 status;
39a98554 845 u32 mfiStatus = 0;
da0dc9fb 846
6610a6b3
YB
847 /*
848 * Check if it is our interrupt
849 */
850 status = readl(&regs->outbound_intr_status);
851
b5bccadd 852 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 853 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
854 }
855 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
856 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
857 }
6610a6b3
YB
858
859 /*
860 * Clear the interrupt by writing back the same value
861 */
39a98554 862 if (mfiStatus)
863 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB
864
865 /* Dummy readl to force pci flush */
866 readl(&regs->outbound_intr_status);
867
39a98554 868 return mfiStatus;
6610a6b3
YB
869}
870/**
871 * megasas_fire_cmd_gen2 - Sends command to the FW
872 * @frame_phys_addr : Physical address of cmd
873 * @frame_count : Number of frames for the command
874 * @regs : MFI register set
875 */
876static inline void
0c79e681
YB
877megasas_fire_cmd_gen2(struct megasas_instance *instance,
878 dma_addr_t frame_phys_addr,
879 u32 frame_count,
6610a6b3
YB
880 struct megasas_register_set __iomem *regs)
881{
39a98554 882 unsigned long flags;
da0dc9fb 883
39a98554 884 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB
885 writel((frame_phys_addr | (frame_count<<1))|1,
886 &(regs)->inbound_queue_port);
39a98554 887 spin_unlock_irqrestore(&instance->hba_lock, flags);
888}
889
890/**
891 * megasas_adp_reset_gen2 - For controller reset
892 * @regs: MFI register set
893 */
894static int
895megasas_adp_reset_gen2(struct megasas_instance *instance,
896 struct megasas_register_set __iomem *reg_set)
897{
da0dc9fb
BH
898 u32 retry = 0 ;
899 u32 HostDiag;
900 u32 __iomem *seq_offset = &reg_set->seq_offset;
901 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0 902
903 if (instance->instancet == &megasas_instance_template_skinny) {
904 seq_offset = &reg_set->fusion_seq_offset;
905 hostdiag_offset = &reg_set->fusion_host_diag;
906 }
907
908 writel(0, seq_offset);
909 writel(4, seq_offset);
910 writel(0xb, seq_offset);
911 writel(2, seq_offset);
912 writel(7, seq_offset);
913 writel(0xd, seq_offset);
39a98554 914
39a98554 915 msleep(1000);
916
ebf054b0 917 HostDiag = (u32)readl(hostdiag_offset);
39a98554 918
da0dc9fb 919 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 920 msleep(100);
ebf054b0 921 HostDiag = (u32)readl(hostdiag_offset);
1be18254 922 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 923 retry, HostDiag);
924
925 if (retry++ >= 100)
926 return 1;
927
928 }
929
1be18254 930 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 931
ebf054b0 932 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 933
934 ssleep(10);
935
ebf054b0 936 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 937 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 938 msleep(100);
ebf054b0 939 HostDiag = (u32)readl(hostdiag_offset);
1be18254 940 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 941 retry, HostDiag);
942
943 if (retry++ >= 1000)
944 return 1;
945
946 }
947 return 0;
948}
949
950/**
951 * megasas_check_reset_gen2 - For controller reset check
952 * @regs: MFI register set
953 */
954static int
955megasas_check_reset_gen2(struct megasas_instance *instance,
956 struct megasas_register_set __iomem *regs)
957{
8a01a41d 958 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
707e09bd 959 return 1;
707e09bd 960
39a98554 961 return 0;
6610a6b3
YB
962}
963
964static struct megasas_instance_template megasas_instance_template_gen2 = {
965
966 .fire_cmd = megasas_fire_cmd_gen2,
967 .enable_intr = megasas_enable_intr_gen2,
968 .disable_intr = megasas_disable_intr_gen2,
969 .clear_intr = megasas_clear_intr_gen2,
970 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 971 .adp_reset = megasas_adp_reset_gen2,
972 .check_reset = megasas_check_reset_gen2,
cd50ba8e 973 .service_isr = megasas_isr,
974 .tasklet = megasas_complete_cmd_dpc,
975 .init_adapter = megasas_init_adapter_mfi,
976 .build_and_issue_cmd = megasas_build_and_issue_cmd,
977 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB
978};
979
f9876f0b
SP
980/**
981* This is the end of set of functions & definitions
39a98554 982* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP
983*/
984
9c915a8c 985/*
986 * Template added for TB (Fusion)
987 */
988extern struct megasas_instance_template megasas_instance_template_fusion;
989
c4a3e0a5
BS
990/**
991 * megasas_issue_polled - Issues a polling command
992 * @instance: Adapter soft state
0d49016b 993 * @cmd: Command packet to be issued
c4a3e0a5 994 *
2be2a988 995 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 996 */
9c915a8c 997int
c4a3e0a5
BS
998megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
999{
c4a3e0a5
BS
1000 struct megasas_header *frame_hdr = &cmd->frame->hdr;
1001
6d40afbc 1002 frame_hdr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd 1003 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5 1004
8a01a41d 1005 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1006 (instance->instancet->issue_dcmd(instance, cmd))) {
1007 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1008 __func__, __LINE__);
1009 return DCMD_NOT_FIRED;
1010 }
c4a3e0a5 1011
6d40afbc
SS
1012 return wait_and_poll(instance, cmd, instance->requestorId ?
1013 MEGASAS_ROUTINE_WAIT_TIME_VF : MFI_IO_TIMEOUT_SECS);
c4a3e0a5
BS
1014}
1015
1016/**
1017 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1018 * @instance: Adapter soft state
1019 * @cmd: Command to be issued
cfbe7554 1020 * @timeout: Timeout in seconds
c4a3e0a5
BS
1021 *
1022 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1023 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS
1024 * Used to issue ioctl commands.
1025 */
90dc9d98 1026int
c4a3e0a5 1027megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1028 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1029{
cfbe7554 1030 int ret = 0;
2be2a988 1031 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1032
8a01a41d 1033 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1034 (instance->instancet->issue_dcmd(instance, cmd))) {
1035 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1036 __func__, __LINE__);
1037 return DCMD_NOT_FIRED;
1038 }
1039
cfbe7554
SS
1040 if (timeout) {
1041 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1042 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
6d40afbc
SS
1043 if (!ret) {
1044 dev_err(&instance->pdev->dev, "Failed from %s %d DCMD Timed out\n",
1045 __func__, __LINE__);
1046 return DCMD_TIMEOUT;
1047 }
cfbe7554
SS
1048 } else
1049 wait_event(instance->int_cmd_wait_q,
2be2a988 1050 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1051
2be2a988 1052 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
6d40afbc 1053 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS
1054}
1055
1056/**
1057 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1058 * @instance: Adapter soft state
1059 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1060 * @timeout: Timeout in seconds
c4a3e0a5 1061 *
cfbe7554 1062 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1063 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP
1064 * cmd and waits for return status.
1065 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS
1066 */
1067static int
1068megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1069 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS
1070{
1071 struct megasas_cmd *cmd;
1072 struct megasas_abort_frame *abort_fr;
cfbe7554 1073 int ret = 0;
c4a3e0a5
BS
1074
1075 cmd = megasas_get_cmd(instance);
1076
1077 if (!cmd)
1078 return -1;
1079
1080 abort_fr = &cmd->frame->abort;
1081
1082 /*
1083 * Prepare and issue the abort frame
1084 */
1085 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1086 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS
1087 abort_fr->flags = cpu_to_le16(0);
1088 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1089 abort_fr->abort_mfi_phys_addr_lo =
1090 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1091 abort_fr->abort_mfi_phys_addr_hi =
1092 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS
1093
1094 cmd->sync_cmd = 1;
2be2a988 1095 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1096
8a01a41d 1097 if ((atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) ||
6d40afbc
SS
1098 (instance->instancet->issue_dcmd(instance, cmd))) {
1099 dev_err(&instance->pdev->dev, "Failed from %s %d\n",
1100 __func__, __LINE__);
1101 return DCMD_NOT_FIRED;
1102 }
c4a3e0a5 1103
cfbe7554
SS
1104 if (timeout) {
1105 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1106 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554 1107 if (!ret) {
6d40afbc
SS
1108 dev_err(&instance->pdev->dev, "Failed from %s %d Abort Timed out\n",
1109 __func__, __LINE__);
1110 return DCMD_TIMEOUT;
cfbe7554
SS
1111 }
1112 } else
1113 wait_event(instance->abort_cmd_wait_q,
2be2a988 1114 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1115
39a98554 1116 cmd->sync_cmd = 0;
c4a3e0a5
BS
1117
1118 megasas_return_cmd(instance, cmd);
6d40afbc
SS
1119 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1120 DCMD_SUCCESS : DCMD_FAILED;
c4a3e0a5
BS
1121}
1122
1123/**
1124 * megasas_make_sgl32 - Prepares 32-bit SGL
1125 * @instance: Adapter soft state
1126 * @scp: SCSI command from the mid-layer
1127 * @mfi_sgl: SGL to be filled in
1128 *
1129 * If successful, this function returns the number of SG elements. Otherwise,
1130 * it returnes -1.
1131 */
858119e1 1132static int
c4a3e0a5
BS
1133megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1134 union megasas_sgl *mfi_sgl)
1135{
1136 int i;
1137 int sge_count;
1138 struct scatterlist *os_sgl;
1139
155d98f0
FT
1140 sge_count = scsi_dma_map(scp);
1141 BUG_ON(sge_count < 0);
c4a3e0a5 1142
155d98f0
FT
1143 if (sge_count) {
1144 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1145 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1146 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1147 }
c4a3e0a5 1148 }
c4a3e0a5
BS
1149 return sge_count;
1150}
1151
1152/**
1153 * megasas_make_sgl64 - Prepares 64-bit SGL
1154 * @instance: Adapter soft state
1155 * @scp: SCSI command from the mid-layer
1156 * @mfi_sgl: SGL to be filled in
1157 *
1158 * If successful, this function returns the number of SG elements. Otherwise,
1159 * it returnes -1.
1160 */
858119e1 1161static int
c4a3e0a5
BS
1162megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1163 union megasas_sgl *mfi_sgl)
1164{
1165 int i;
1166 int sge_count;
1167 struct scatterlist *os_sgl;
1168
155d98f0
FT
1169 sge_count = scsi_dma_map(scp);
1170 BUG_ON(sge_count < 0);
c4a3e0a5 1171
155d98f0
FT
1172 if (sge_count) {
1173 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1174 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1175 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1176 }
c4a3e0a5 1177 }
c4a3e0a5
BS
1178 return sge_count;
1179}
1180
f4c9a131
YB
1181/**
1182 * megasas_make_sgl_skinny - Prepares IEEE SGL
1183 * @instance: Adapter soft state
1184 * @scp: SCSI command from the mid-layer
1185 * @mfi_sgl: SGL to be filled in
1186 *
1187 * If successful, this function returns the number of SG elements. Otherwise,
1188 * it returnes -1.
1189 */
1190static int
1191megasas_make_sgl_skinny(struct megasas_instance *instance,
1192 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1193{
1194 int i;
1195 int sge_count;
1196 struct scatterlist *os_sgl;
1197
1198 sge_count = scsi_dma_map(scp);
1199
1200 if (sge_count) {
1201 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS
1202 mfi_sgl->sge_skinny[i].length =
1203 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1204 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS
1205 cpu_to_le64(sg_dma_address(os_sgl));
1206 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB
1207 }
1208 }
1209 return sge_count;
1210}
1211
b1df99d9
SP
1212 /**
1213 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1214 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP
1215 * @sge_count : number of sg elements
1216 *
1217 * Returns the number of frames required for numnber of sge's (sge_count)
1218 */
1219
f4c9a131
YB
1220static u32 megasas_get_frame_count(struct megasas_instance *instance,
1221 u8 sge_count, u8 frame_type)
b1df99d9
SP
1222{
1223 int num_cnt;
1224 int sge_bytes;
1225 u32 sge_sz;
da0dc9fb 1226 u32 frame_count = 0;
b1df99d9
SP
1227
1228 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1229 sizeof(struct megasas_sge32);
1230
f4c9a131
YB
1231 if (instance->flag_ieee) {
1232 sge_sz = sizeof(struct megasas_sge_skinny);
1233 }
1234
b1df99d9 1235 /*
d532dbe2 1236 * Main frame can contain 2 SGEs for 64-bit SGLs and
1237 * 3 SGEs for 32-bit SGLs for ldio &
1238 * 1 SGEs for 64-bit SGLs and
1239 * 2 SGEs for 32-bit SGLs for pthru frame
1240 */
1241 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB
1242 if (instance->flag_ieee == 1) {
1243 num_cnt = sge_count - 1;
1244 } else if (IS_DMA64)
d532dbe2 1245 num_cnt = sge_count - 1;
1246 else
1247 num_cnt = sge_count - 2;
1248 } else {
f4c9a131
YB
1249 if (instance->flag_ieee == 1) {
1250 num_cnt = sge_count - 1;
1251 } else if (IS_DMA64)
d532dbe2 1252 num_cnt = sge_count - 2;
1253 else
1254 num_cnt = sge_count - 3;
1255 }
b1df99d9 1256
da0dc9fb 1257 if (num_cnt > 0) {
b1df99d9
SP
1258 sge_bytes = sge_sz * num_cnt;
1259
1260 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1261 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1262 }
1263 /* Main frame */
da0dc9fb 1264 frame_count += 1;
b1df99d9
SP
1265
1266 if (frame_count > 7)
1267 frame_count = 8;
1268 return frame_count;
1269}
1270
c4a3e0a5
BS
1271/**
1272 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1273 * @instance: Adapter soft state
1274 * @scp: SCSI command
1275 * @cmd: Command to be prepared in
1276 *
1277 * This function prepares CDB commands. These are typcially pass-through
1278 * commands to the devices.
1279 */
858119e1 1280static int
c4a3e0a5
BS
1281megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1282 struct megasas_cmd *cmd)
1283{
c4a3e0a5
BS
1284 u32 is_logical;
1285 u32 device_id;
1286 u16 flags = 0;
1287 struct megasas_pthru_frame *pthru;
1288
1289 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1290 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS
1291 pthru = (struct megasas_pthru_frame *)cmd->frame;
1292
1293 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1294 flags = MFI_FRAME_DIR_WRITE;
1295 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1296 flags = MFI_FRAME_DIR_READ;
1297 else if (scp->sc_data_direction == PCI_DMA_NONE)
1298 flags = MFI_FRAME_DIR_NONE;
1299
f4c9a131
YB
1300 if (instance->flag_ieee == 1) {
1301 flags |= MFI_FRAME_IEEE;
1302 }
1303
c4a3e0a5
BS
1304 /*
1305 * Prepare the DCDB frame
1306 */
1307 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1308 pthru->cmd_status = 0x0;
1309 pthru->scsi_status = 0x0;
1310 pthru->target_id = device_id;
1311 pthru->lun = scp->device->lun;
1312 pthru->cdb_len = scp->cmd_len;
1313 pthru->timeout = 0;
780a3762 1314 pthru->pad_0 = 0;
94cd65dd
SS
1315 pthru->flags = cpu_to_le16(flags);
1316 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS
1317
1318 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1319
8d568253 1320 /*
da0dc9fb
BH
1321 * If the command is for the tape device, set the
1322 * pthru timeout to the os layer timeout value.
1323 */
8d568253
YB
1324 if (scp->device->type == TYPE_TAPE) {
1325 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1326 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1327 else
94cd65dd 1328 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB
1329 }
1330
c4a3e0a5
BS
1331 /*
1332 * Construct SGL
1333 */
f4c9a131 1334 if (instance->flag_ieee == 1) {
94cd65dd 1335 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB
1336 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1337 &pthru->sgl);
1338 } else if (IS_DMA64) {
94cd65dd 1339 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS
1340 pthru->sge_count = megasas_make_sgl64(instance, scp,
1341 &pthru->sgl);
1342 } else
1343 pthru->sge_count = megasas_make_sgl32(instance, scp,
1344 &pthru->sgl);
1345
bdc6fb8d 1346 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1347 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB
1348 pthru->sge_count);
1349 return 0;
1350 }
1351
c4a3e0a5
BS
1352 /*
1353 * Sense info specific
1354 */
1355 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS
1356 pthru->sense_buf_phys_addr_hi =
1357 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1358 pthru->sense_buf_phys_addr_lo =
1359 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1360
c4a3e0a5
BS
1361 /*
1362 * Compute the total number of frames this command consumes. FW uses
1363 * this number to pull sufficient number of frames from host memory.
1364 */
f4c9a131 1365 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1366 PTHRU_FRAME);
c4a3e0a5
BS
1367
1368 return cmd->frame_count;
1369}
1370
1371/**
1372 * megasas_build_ldio - Prepares IOs to logical devices
1373 * @instance: Adapter soft state
1374 * @scp: SCSI command
fd589a8f 1375 * @cmd: Command to be prepared
c4a3e0a5
BS
1376 *
1377 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1378 */
858119e1 1379static int
c4a3e0a5
BS
1380megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1381 struct megasas_cmd *cmd)
1382{
c4a3e0a5
BS
1383 u32 device_id;
1384 u8 sc = scp->cmnd[0];
1385 u16 flags = 0;
1386 struct megasas_io_frame *ldio;
1387
4a5c814d 1388 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS
1389 ldio = (struct megasas_io_frame *)cmd->frame;
1390
1391 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1392 flags = MFI_FRAME_DIR_WRITE;
1393 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1394 flags = MFI_FRAME_DIR_READ;
1395
f4c9a131
YB
1396 if (instance->flag_ieee == 1) {
1397 flags |= MFI_FRAME_IEEE;
1398 }
1399
c4a3e0a5 1400 /*
b1df99d9 1401 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS
1402 */
1403 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1404 ldio->cmd_status = 0x0;
1405 ldio->scsi_status = 0x0;
1406 ldio->target_id = device_id;
1407 ldio->timeout = 0;
1408 ldio->reserved_0 = 0;
1409 ldio->pad_0 = 0;
94cd65dd 1410 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS
1411 ldio->start_lba_hi = 0;
1412 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1413
1414 /*
1415 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1416 */
1417 if (scp->cmd_len == 6) {
94cd65dd
SS
1418 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1419 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1420 ((u32) scp->cmnd[2] << 8) |
1421 (u32) scp->cmnd[3]);
c4a3e0a5 1422
94cd65dd 1423 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS
1424 }
1425
1426 /*
1427 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1428 */
1429 else if (scp->cmd_len == 10) {
94cd65dd
SS
1430 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1431 ((u32) scp->cmnd[7] << 8));
1432 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1433 ((u32) scp->cmnd[3] << 16) |
1434 ((u32) scp->cmnd[4] << 8) |
1435 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1436 }
1437
1438 /*
1439 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1440 */
1441 else if (scp->cmd_len == 12) {
94cd65dd
SS
1442 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1443 ((u32) scp->cmnd[7] << 16) |
1444 ((u32) scp->cmnd[8] << 8) |
1445 (u32) scp->cmnd[9]);
c4a3e0a5 1446
94cd65dd
SS
1447 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1448 ((u32) scp->cmnd[3] << 16) |
1449 ((u32) scp->cmnd[4] << 8) |
1450 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1451 }
1452
1453 /*
1454 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1455 */
1456 else if (scp->cmd_len == 16) {
94cd65dd
SS
1457 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1458 ((u32) scp->cmnd[11] << 16) |
1459 ((u32) scp->cmnd[12] << 8) |
1460 (u32) scp->cmnd[13]);
c4a3e0a5 1461
94cd65dd
SS
1462 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1463 ((u32) scp->cmnd[7] << 16) |
1464 ((u32) scp->cmnd[8] << 8) |
1465 (u32) scp->cmnd[9]);
c4a3e0a5 1466
94cd65dd
SS
1467 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1468 ((u32) scp->cmnd[3] << 16) |
1469 ((u32) scp->cmnd[4] << 8) |
1470 (u32) scp->cmnd[5]);
c4a3e0a5
BS
1471
1472 }
1473
1474 /*
1475 * Construct SGL
1476 */
f4c9a131 1477 if (instance->flag_ieee) {
94cd65dd 1478 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB
1479 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1480 &ldio->sgl);
1481 } else if (IS_DMA64) {
94cd65dd 1482 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS
1483 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1484 } else
1485 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1486
bdc6fb8d 1487 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1488 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB
1489 ldio->sge_count);
1490 return 0;
1491 }
1492
c4a3e0a5
BS
1493 /*
1494 * Sense info specific
1495 */
1496 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1497 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1498 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1499
b1df99d9
SP
1500 /*
1501 * Compute the total number of frames this command consumes. FW uses
1502 * this number to pull sufficient number of frames from host memory.
1503 */
f4c9a131
YB
1504 cmd->frame_count = megasas_get_frame_count(instance,
1505 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS
1506
1507 return cmd->frame_count;
1508}
1509
1510/**
7497cde8
SS
1511 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1512 * and whether it's RW or non RW
cb59aa6a 1513 * @scmd: SCSI command
0d49016b 1514 *
c4a3e0a5 1515 */
7497cde8 1516inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1517{
7497cde8
SS
1518 int ret;
1519
cb59aa6a
SP
1520 switch (cmd->cmnd[0]) {
1521 case READ_10:
1522 case WRITE_10:
1523 case READ_12:
1524 case WRITE_12:
1525 case READ_6:
1526 case WRITE_6:
1527 case READ_16:
1528 case WRITE_16:
7497cde8
SS
1529 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1530 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1531 break;
cb59aa6a 1532 default:
7497cde8
SS
1533 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1534 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1535 }
7497cde8 1536 return ret;
c4a3e0a5
BS
1537}
1538
658dcedb
SP
1539 /**
1540 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1541 * in FW
658dcedb
SP
1542 * @instance: Adapter soft state
1543 */
1544static inline void
1545megasas_dump_pending_frames(struct megasas_instance *instance)
1546{
1547 struct megasas_cmd *cmd;
1548 int i,n;
1549 union megasas_sgl *mfi_sgl;
1550 struct megasas_io_frame *ldio;
1551 struct megasas_pthru_frame *pthru;
1552 u32 sgcount;
1553 u32 max_cmd = instance->max_fw_cmds;
1554
1be18254
BH
1555 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1556 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1557 if (IS_DMA64)
1be18254 1558 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1559 else
1be18254 1560 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1561
1be18254 1562 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP
1563 for (i = 0; i < max_cmd; i++) {
1564 cmd = instance->cmd_list[i];
da0dc9fb 1565 if (!cmd->scmd)
658dcedb 1566 continue;
1be18254 1567 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1568 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP
1569 ldio = (struct megasas_io_frame *)cmd->frame;
1570 mfi_sgl = &ldio->sgl;
1571 sgcount = ldio->sge_count;
1be18254 1572 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS
1573 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1574 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1575 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1576 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1577 } else {
658dcedb
SP
1578 pthru = (struct megasas_pthru_frame *) cmd->frame;
1579 mfi_sgl = &pthru->sgl;
1580 sgcount = pthru->sge_count;
1be18254 1581 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS
1582 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1583 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1584 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1585 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1586 }
da0dc9fb
BH
1587 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1588 for (n = 0; n < sgcount; n++) {
1589 if (IS_DMA64)
1590 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1591 le32_to_cpu(mfi_sgl->sge64[n].length),
1592 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1593 else
1594 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1595 le32_to_cpu(mfi_sgl->sge32[n].length),
1596 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP
1597 }
1598 }
658dcedb 1599 } /*for max_cmd*/
1be18254 1600 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP
1601 for (i = 0; i < max_cmd; i++) {
1602
1603 cmd = instance->cmd_list[i];
1604
da0dc9fb 1605 if (cmd->sync_cmd == 1)
1be18254 1606 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1607 }
1be18254 1608 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP
1609}
1610
cd50ba8e 1611u32
1612megasas_build_and_issue_cmd(struct megasas_instance *instance,
1613 struct scsi_cmnd *scmd)
1614{
1615 struct megasas_cmd *cmd;
1616 u32 frame_count;
1617
1618 cmd = megasas_get_cmd(instance);
1619 if (!cmd)
1620 return SCSI_MLQUEUE_HOST_BUSY;
1621
1622 /*
1623 * Logical drive command
1624 */
7497cde8 1625 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e 1626 frame_count = megasas_build_ldio(instance, scmd, cmd);
1627 else
1628 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1629
1630 if (!frame_count)
1631 goto out_return_cmd;
1632
1633 cmd->scmd = scmd;
1634 scmd->SCp.ptr = (char *)cmd;
1635
1636 /*
1637 * Issue the command to the FW
1638 */
1639 atomic_inc(&instance->fw_outstanding);
1640
1641 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1642 cmd->frame_count-1, instance->reg_set);
cd50ba8e 1643
1644 return 0;
1645out_return_cmd:
1646 megasas_return_cmd(instance, cmd);
f9a9dee6 1647 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1648}
1649
1650
c4a3e0a5
BS
1651/**
1652 * megasas_queue_command - Queue entry point
1653 * @scmd: SCSI command to be queued
1654 * @done: Callback entry point
1655 */
1656static int
fb1a24ff 1657megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1658{
c4a3e0a5 1659 struct megasas_instance *instance;
18365b13 1660 struct MR_PRIV_DEVICE *mr_device_priv_data;
c4a3e0a5
BS
1661
1662 instance = (struct megasas_instance *)
1663 scmd->device->host->hostdata;
af37acfb 1664
aa00832b
SS
1665 if (instance->unload == 1) {
1666 scmd->result = DID_NO_CONNECT << 16;
1667 scmd->scsi_done(scmd);
1668 return 0;
1669 }
1670
39a98554 1671 if (instance->issuepend_done == 0)
af37acfb
SP
1672 return SCSI_MLQUEUE_HOST_BUSY;
1673
b09e66da 1674
229fe47c 1675 /* Check for an mpio path and adjust behavior */
8a01a41d 1676 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
229fe47c 1677 if (megasas_check_mpio_paths(instance, scmd) ==
1678 (DID_RESET << 16)) {
229fe47c 1679 return SCSI_MLQUEUE_HOST_BUSY;
1680 } else {
229fe47c 1681 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1682 scmd->scsi_done(scmd);
229fe47c 1683 return 0;
1684 }
1685 }
1686
8a01a41d 1687 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
229fe47c 1688 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1689 scmd->scsi_done(scmd);
b09e66da
SS
1690 return 0;
1691 }
1692
18365b13
SS
1693 mr_device_priv_data = scmd->device->hostdata;
1694 if (!mr_device_priv_data) {
18365b13
SS
1695 scmd->result = DID_NO_CONNECT << 16;
1696 scmd->scsi_done(scmd);
1697 return 0;
1698 }
1699
8a01a41d 1700 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL)
39a98554 1701 return SCSI_MLQUEUE_HOST_BUSY;
39a98554 1702
8a01a41d 1703 if (mr_device_priv_data->tm_busy)
18365b13 1704 return SCSI_MLQUEUE_DEVICE_BUSY;
18365b13 1705
39a98554 1706
c4a3e0a5
BS
1707 scmd->result = 0;
1708
cb59aa6a 1709 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS
1710 (scmd->device->id >= instance->fw_supported_vd_count ||
1711 scmd->device->lun)) {
cb59aa6a
SP
1712 scmd->result = DID_BAD_TARGET << 16;
1713 goto out_done;
c4a3e0a5
BS
1714 }
1715
02b01e01
SP
1716 switch (scmd->cmnd[0]) {
1717 case SYNCHRONIZE_CACHE:
1718 /*
1719 * FW takes care of flush cache on its own
1720 * No need to send it down
1721 */
1722 scmd->result = DID_OK << 16;
1723 goto out_done;
1724 default:
1725 break;
1726 }
1727
f9a9dee6 1728 return instance->instancet->build_and_issue_cmd(instance, scmd);
cb59aa6a 1729
cb59aa6a 1730 out_done:
fb1a24ff 1731 scmd->scsi_done(scmd);
cb59aa6a 1732 return 0;
c4a3e0a5
BS
1733}
1734
044833b5
YB
1735static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1736{
1737 int i;
1738
1739 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1740
1741 if ((megasas_mgmt_info.instance[i]) &&
1742 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1743 return megasas_mgmt_info.instance[i];
1744 }
1745
1746 return NULL;
1747}
1748
0b48d12d 1749/*
18365b13 1750* megasas_update_sdev_properties - Update sdev structure based on controller's FW capabilities
0b48d12d 1751*
1752* @sdev: OS provided scsi device
1753*
1754* Returns void
1755*/
18365b13 1756void megasas_update_sdev_properties(struct scsi_device *sdev)
0b48d12d 1757{
18365b13 1758 u16 pd_index = 0;
0b48d12d 1759 u32 device_id, ld;
1760 struct megasas_instance *instance;
1761 struct fusion_context *fusion;
18365b13
SS
1762 struct MR_PRIV_DEVICE *mr_device_priv_data;
1763 struct MR_PD_CFG_SEQ_NUM_SYNC *pd_sync;
0b48d12d 1764 struct MR_LD_RAID *raid;
1765 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1766
1767 instance = megasas_lookup_instance(sdev->host->host_no);
1768 fusion = instance->ctrl_context;
18365b13 1769 mr_device_priv_data = sdev->hostdata;
0b48d12d 1770
1771 if (!fusion)
1772 return;
1773
18365b13
SS
1774 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS &&
1775 instance->use_seqnum_jbod_fp) {
1776 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1777 sdev->id;
1778 pd_sync = (void *)fusion->pd_seq_sync
1779 [(instance->pd_seq_map_id - 1) & 1];
1780 mr_device_priv_data->is_tm_capable =
1781 pd_sync->seq[pd_index].capability.tmCapable;
1782 } else {
0b48d12d 1783 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1784 + sdev->id;
1785 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1786 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
1787 raid = MR_LdRaidGet(ld, local_map_ptr);
1788
1789 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
18365b13
SS
1790 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1791 mr_device_priv_data->is_tm_capable =
1792 raid->capability.tmCapable;
0b48d12d 1793 }
1794}
1795
2216c305
SS
1796static void megasas_set_device_queue_depth(struct scsi_device *sdev)
1797{
1798 u16 pd_index = 0;
1799 int ret = DCMD_FAILED;
1800 struct megasas_instance *instance;
1801
1802 instance = megasas_lookup_instance(sdev->host->host_no);
1803
1804 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
1805 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + sdev->id;
1806
1807 if (instance->pd_info) {
1808 mutex_lock(&instance->hba_mutex);
1809 ret = megasas_get_pd_info(instance, pd_index);
1810 mutex_unlock(&instance->hba_mutex);
1811 }
1812
1813 if (ret != DCMD_SUCCESS)
1814 return;
1815
1816 if (instance->pd_list[pd_index].driveState == MR_PD_STATE_SYSTEM) {
1817
1818 switch (instance->pd_list[pd_index].interface) {
1819 case SAS_PD:
1820 scsi_change_queue_depth(sdev, MEGASAS_SAS_QD);
1821 break;
1822
1823 case SATA_PD:
1824 scsi_change_queue_depth(sdev, MEGASAS_SATA_QD);
1825 break;
1826
1827 default:
1828 scsi_change_queue_depth(sdev, MEGASAS_DEFAULT_PD_QD);
1829 }
1830 }
1831 }
1832}
1833
18365b13 1834
147aab6a
CH
1835static int megasas_slave_configure(struct scsi_device *sdev)
1836{
aed335ee
SS
1837 u16 pd_index = 0;
1838 struct megasas_instance *instance;
1839
1840 instance = megasas_lookup_instance(sdev->host->host_no);
30845586 1841 if (instance->pd_list_not_supported) {
aed335ee
SS
1842 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS &&
1843 sdev->type == TYPE_DISK) {
1844 pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1845 sdev->id;
1846 if (instance->pd_list[pd_index].driveState !=
1847 MR_PD_STATE_SYSTEM)
1848 return -ENXIO;
1849 }
1850 }
2216c305 1851 megasas_set_device_queue_depth(sdev);
18365b13
SS
1852 megasas_update_sdev_properties(sdev);
1853
e5b3a65f 1854 /*
da0dc9fb
BH
1855 * The RAID firmware may require extended timeouts.
1856 */
044833b5 1857 blk_queue_rq_timeout(sdev->request_queue,
e3d178ca 1858 scmd_timeout * HZ);
07e38d94 1859
044833b5
YB
1860 return 0;
1861}
1862
1863static int megasas_slave_alloc(struct scsi_device *sdev)
1864{
da0dc9fb 1865 u16 pd_index = 0;
044833b5 1866 struct megasas_instance *instance ;
18365b13 1867 struct MR_PRIV_DEVICE *mr_device_priv_data;
da0dc9fb 1868
044833b5 1869 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1870 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB
1871 /*
1872 * Open the OS scan to the SYSTEM PD
1873 */
1874 pd_index =
1875 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1876 sdev->id;
30845586
SS
1877 if ((instance->pd_list_not_supported ||
1878 instance->pd_list[pd_index].driveState ==
aed335ee 1879 MR_PD_STATE_SYSTEM)) {
18365b13 1880 goto scan_target;
044833b5
YB
1881 }
1882 return -ENXIO;
1883 }
18365b13
SS
1884
1885scan_target:
1886 mr_device_priv_data = kzalloc(sizeof(*mr_device_priv_data),
1887 GFP_KERNEL);
1888 if (!mr_device_priv_data)
1889 return -ENOMEM;
1890 sdev->hostdata = mr_device_priv_data;
147aab6a
CH
1891 return 0;
1892}
1893
18365b13
SS
1894static void megasas_slave_destroy(struct scsi_device *sdev)
1895{
1896 kfree(sdev->hostdata);
1897 sdev->hostdata = NULL;
1898}
1899
c8dd61ef
SS
1900/*
1901* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1902* kill adapter
1903* @instance: Adapter soft state
1904*
1905*/
6a6981fe 1906static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS
1907{
1908 int i;
1909 struct megasas_cmd *cmd_mfi;
1910 struct megasas_cmd_fusion *cmd_fusion;
1911 struct fusion_context *fusion = instance->ctrl_context;
1912
1913 /* Find all outstanding ioctls */
1914 if (fusion) {
1915 for (i = 0; i < instance->max_fw_cmds; i++) {
1916 cmd_fusion = fusion->cmd_list[i];
1917 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1918 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1919 if (cmd_mfi->sync_cmd &&
1920 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1921 megasas_complete_cmd(instance,
1922 cmd_mfi, DID_OK);
1923 }
1924 }
1925 } else {
1926 for (i = 0; i < instance->max_fw_cmds; i++) {
1927 cmd_mfi = instance->cmd_list[i];
1928 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1929 MFI_CMD_ABORT)
1930 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1931 }
1932 }
1933}
1934
1935
9c915a8c 1936void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1937{
c8dd61ef 1938 /* Set critical error to block I/O & ioctls in case caller didn't */
8a01a41d 1939 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
c8dd61ef
SS
1940 /* Wait 1 second to ensure IO or ioctls in build have posted */
1941 msleep(1000);
39a98554 1942 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 1943 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 1944 (instance->ctrl_context)) {
da0dc9fb 1945 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c 1946 /* Flush */
1947 readl(&instance->reg_set->doorbell);
8f67c8c5 1948 if (instance->requestorId && instance->peerIsPresent)
229fe47c 1949 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1950 } else {
c8dd61ef
SS
1951 writel(MFI_STOP_ADP,
1952 &instance->reg_set->inbound_doorbell);
9c915a8c 1953 }
c8dd61ef
SS
1954 /* Complete outstanding ioctls when adapter is killed */
1955 megasas_complete_outstanding_ioctls(instance);
9c915a8c 1956}
1957
1958 /**
1959 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1960 * restored to max value
1961 * @instance: Adapter soft state
1962 *
1963 */
1964void
1965megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1966{
1967 unsigned long flags;
ae09a6c1 1968
9c915a8c 1969 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9 1970 && time_after(jiffies, instance->last_time + 5 * HZ)
1971 && atomic_read(&instance->fw_outstanding) <
1972 instance->throttlequeuedepth + 1) {
9c915a8c 1973
1974 spin_lock_irqsave(instance->host->host_lock, flags);
1975 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1976
308ec459 1977 instance->host->can_queue = instance->cur_can_queue;
9c915a8c 1978 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1979 }
1980}
1981
7343eb65 1982/**
1983 * megasas_complete_cmd_dpc - Returns FW's controller structure
1984 * @instance_addr: Address of adapter soft state
1985 *
1986 * Tasklet to complete cmds
1987 */
1988static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1989{
1990 u32 producer;
1991 u32 consumer;
1992 u32 context;
1993 struct megasas_cmd *cmd;
1994 struct megasas_instance *instance =
1995 (struct megasas_instance *)instance_addr;
1996 unsigned long flags;
1997
1998 /* If we have already declared adapter dead, donot complete cmds */
8a01a41d 1999 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 2000 return;
2001
2002 spin_lock_irqsave(&instance->completion_lock, flags);
2003
94cd65dd
SS
2004 producer = le32_to_cpu(*instance->producer);
2005 consumer = le32_to_cpu(*instance->consumer);
7343eb65 2006
2007 while (consumer != producer) {
94cd65dd 2008 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 2009 if (context >= instance->max_fw_cmds) {
1be18254 2010 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 2011 context);
2012 BUG();
2013 }
7343eb65 2014
2015 cmd = instance->cmd_list[context];
2016
2017 megasas_complete_cmd(instance, cmd, DID_OK);
2018
2019 consumer++;
2020 if (consumer == (instance->max_fw_cmds + 1)) {
2021 consumer = 0;
2022 }
2023 }
2024
94cd65dd 2025 *instance->consumer = cpu_to_le32(producer);
7343eb65 2026
2027 spin_unlock_irqrestore(&instance->completion_lock, flags);
2028
2029 /*
2030 * Check if we can restore can_queue
2031 */
9c915a8c 2032 megasas_check_and_restore_queue_depth(instance);
7343eb65 2033}
2034
229fe47c 2035/**
2036 * megasas_start_timer - Initializes a timer object
2037 * @instance: Adapter soft state
2038 * @timer: timer object to be initialized
2039 * @fn: timer function
2040 * @interval: time interval between timer function call
2041 *
2042 */
2043void megasas_start_timer(struct megasas_instance *instance,
2044 struct timer_list *timer,
2045 void *fn, unsigned long interval)
2046{
2047 init_timer(timer);
2048 timer->expires = jiffies + interval;
2049 timer->data = (unsigned long)instance;
2050 timer->function = fn;
2051 add_timer(timer);
2052}
2053
707e09bd
YB
2054static void
2055megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
2056
2057static void
2058process_fw_state_change_wq(struct work_struct *work);
2059
2060void megasas_do_ocr(struct megasas_instance *instance)
2061{
2062 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
2063 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
2064 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 2065 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 2066 }
d46a3ad6 2067 instance->instancet->disable_intr(instance);
8a01a41d 2068 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
707e09bd
YB
2069 instance->issuepend_done = 0;
2070
2071 atomic_set(&instance->fw_outstanding, 0);
2072 megasas_internal_reset_defer_cmds(instance);
2073 process_fw_state_change_wq(&instance->work_init);
2074}
2075
4cbfea88
AR
2076static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
2077 int initial)
229fe47c 2078{
2079 struct megasas_cmd *cmd;
2080 struct megasas_dcmd_frame *dcmd;
229fe47c 2081 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c 2082 dma_addr_t new_affiliation_111_h;
2083 int ld, retval = 0;
2084 u8 thisVf;
2085
2086 cmd = megasas_get_cmd(instance);
2087
2088 if (!cmd) {
1be18254
BH
2089 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
2090 "Failed to get cmd for scsi%d\n",
229fe47c 2091 instance->host->host_no);
2092 return -ENOMEM;
2093 }
2094
2095 dcmd = &cmd->frame->dcmd;
2096
4cbfea88 2097 if (!instance->vf_affiliation_111) {
1be18254
BH
2098 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2099 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c 2100 megasas_return_cmd(instance, cmd);
2101 return -ENOMEM;
2102 }
2103
2104 if (initial)
229fe47c 2105 memset(instance->vf_affiliation_111, 0,
2106 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2107 else {
4cbfea88
AR
2108 new_affiliation_111 =
2109 pci_alloc_consistent(instance->pdev,
2110 sizeof(struct MR_LD_VF_AFFILIATION_111),
2111 &new_affiliation_111_h);
2112 if (!new_affiliation_111) {
1be18254
BH
2113 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2114 "memory for new affiliation for scsi%d\n",
4cbfea88 2115 instance->host->host_no);
229fe47c 2116 megasas_return_cmd(instance, cmd);
2117 return -ENOMEM;
2118 }
4cbfea88
AR
2119 memset(new_affiliation_111, 0,
2120 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2121 }
2122
2123 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2124
2125 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2126 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2127 dcmd->sge_count = 1;
2213a467 2128 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2129 dcmd->timeout = 0;
2130 dcmd->pad_0 = 0;
2213a467
CH
2131 dcmd->data_xfer_len =
2132 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2133 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2134
4cbfea88
AR
2135 if (initial)
2136 dcmd->sgl.sge32[0].phys_addr =
2213a467 2137 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2138 else
2213a467
CH
2139 dcmd->sgl.sge32[0].phys_addr =
2140 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2141
2213a467
CH
2142 dcmd->sgl.sge32[0].length = cpu_to_le32(
2143 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2144
1be18254 2145 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c 2146 "scsi%d\n", instance->host->host_no);
2147
6d40afbc 2148 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH
2149 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2150 " failed with status 0x%x for scsi%d\n",
229fe47c 2151 dcmd->cmd_status, instance->host->host_no);
2152 retval = 1; /* Do a scan if we couldn't get affiliation */
2153 goto out;
2154 }
2155
2156 if (!initial) {
4cbfea88
AR
2157 thisVf = new_affiliation_111->thisVf;
2158 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2159 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2160 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH
2161 dev_warn(&instance->pdev->dev, "SR-IOV: "
2162 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2163 instance->host->host_no);
4cbfea88
AR
2164 memcpy(instance->vf_affiliation_111,
2165 new_affiliation_111,
2166 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2167 retval = 1;
2168 goto out;
2169 }
4cbfea88
AR
2170 }
2171out:
2172 if (new_affiliation_111) {
2173 pci_free_consistent(instance->pdev,
2174 sizeof(struct MR_LD_VF_AFFILIATION_111),
2175 new_affiliation_111,
2176 new_affiliation_111_h);
2177 }
90dc9d98 2178
4026e9aa 2179 megasas_return_cmd(instance, cmd);
4cbfea88
AR
2180
2181 return retval;
2182}
2183
2184static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2185 int initial)
2186{
2187 struct megasas_cmd *cmd;
2188 struct megasas_dcmd_frame *dcmd;
2189 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2190 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2191 dma_addr_t new_affiliation_h;
2192 int i, j, retval = 0, found = 0, doscan = 0;
2193 u8 thisVf;
2194
2195 cmd = megasas_get_cmd(instance);
2196
2197 if (!cmd) {
1be18254
BH
2198 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2199 "Failed to get cmd for scsi%d\n",
4cbfea88
AR
2200 instance->host->host_no);
2201 return -ENOMEM;
2202 }
2203
2204 dcmd = &cmd->frame->dcmd;
2205
2206 if (!instance->vf_affiliation) {
1be18254
BH
2207 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2208 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR
2209 megasas_return_cmd(instance, cmd);
2210 return -ENOMEM;
2211 }
2212
2213 if (initial)
2214 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2215 sizeof(struct MR_LD_VF_AFFILIATION));
2216 else {
2217 new_affiliation =
2218 pci_alloc_consistent(instance->pdev,
2219 (MAX_LOGICAL_DRIVES + 1) *
2220 sizeof(struct MR_LD_VF_AFFILIATION),
2221 &new_affiliation_h);
2222 if (!new_affiliation) {
1be18254
BH
2223 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2224 "memory for new affiliation for scsi%d\n",
4cbfea88
AR
2225 instance->host->host_no);
2226 megasas_return_cmd(instance, cmd);
2227 return -ENOMEM;
2228 }
2229 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2230 sizeof(struct MR_LD_VF_AFFILIATION));
2231 }
2232
2233 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2234
2235 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2236 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2237 dcmd->sge_count = 1;
2213a467 2238 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR
2239 dcmd->timeout = 0;
2240 dcmd->pad_0 = 0;
2213a467
CH
2241 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2242 sizeof(struct MR_LD_VF_AFFILIATION));
2243 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR
2244
2245 if (initial)
2213a467
CH
2246 dcmd->sgl.sge32[0].phys_addr =
2247 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2248 else
2213a467
CH
2249 dcmd->sgl.sge32[0].phys_addr =
2250 cpu_to_le32(new_affiliation_h);
4cbfea88 2251
2213a467
CH
2252 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2253 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2254
1be18254 2255 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR
2256 "scsi%d\n", instance->host->host_no);
2257
4cbfea88 2258
6d40afbc 2259 if (megasas_issue_blocked_cmd(instance, cmd, 0) != DCMD_SUCCESS) {
1be18254
BH
2260 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2261 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR
2262 dcmd->cmd_status, instance->host->host_no);
2263 retval = 1; /* Do a scan if we couldn't get affiliation */
2264 goto out;
2265 }
2266
2267 if (!initial) {
2268 if (!new_affiliation->ldCount) {
1be18254
BH
2269 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2270 "affiliation for passive path for scsi%d\n",
4cbfea88
AR
2271 instance->host->host_no);
2272 retval = 1;
2273 goto out;
2274 }
2275 newmap = new_affiliation->map;
2276 savedmap = instance->vf_affiliation->map;
2277 thisVf = new_affiliation->thisVf;
2278 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2279 found = 0;
2280 for (j = 0; j < instance->vf_affiliation->ldCount;
2281 j++) {
2282 if (newmap->ref.targetId ==
2283 savedmap->ref.targetId) {
2284 found = 1;
2285 if (newmap->policy[thisVf] !=
2286 savedmap->policy[thisVf]) {
2287 doscan = 1;
2288 goto out;
2289 }
229fe47c 2290 }
2291 savedmap = (struct MR_LD_VF_MAP *)
2292 ((unsigned char *)savedmap +
2293 savedmap->size);
4cbfea88
AR
2294 }
2295 if (!found && newmap->policy[thisVf] !=
2296 MR_LD_ACCESS_HIDDEN) {
2297 doscan = 1;
2298 goto out;
2299 }
2300 newmap = (struct MR_LD_VF_MAP *)
2301 ((unsigned char *)newmap + newmap->size);
2302 }
2303
2304 newmap = new_affiliation->map;
2305 savedmap = instance->vf_affiliation->map;
2306
2307 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2308 found = 0;
2309 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2310 if (savedmap->ref.targetId ==
2311 newmap->ref.targetId) {
2312 found = 1;
2313 if (savedmap->policy[thisVf] !=
2314 newmap->policy[thisVf]) {
2315 doscan = 1;
2316 goto out;
2317 }
2318 }
229fe47c 2319 newmap = (struct MR_LD_VF_MAP *)
2320 ((unsigned char *)newmap +
2321 newmap->size);
2322 }
4cbfea88
AR
2323 if (!found && savedmap->policy[thisVf] !=
2324 MR_LD_ACCESS_HIDDEN) {
2325 doscan = 1;
2326 goto out;
2327 }
2328 savedmap = (struct MR_LD_VF_MAP *)
2329 ((unsigned char *)savedmap +
2330 savedmap->size);
229fe47c 2331 }
2332 }
2333out:
4cbfea88 2334 if (doscan) {
1be18254
BH
2335 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2336 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR
2337 memcpy(instance->vf_affiliation, new_affiliation,
2338 new_affiliation->size);
2339 retval = 1;
229fe47c 2340 }
4cbfea88
AR
2341
2342 if (new_affiliation)
2343 pci_free_consistent(instance->pdev,
2344 (MAX_LOGICAL_DRIVES + 1) *
2345 sizeof(struct MR_LD_VF_AFFILIATION),
2346 new_affiliation, new_affiliation_h);
4026e9aa 2347 megasas_return_cmd(instance, cmd);
229fe47c 2348
2349 return retval;
2350}
2351
4cbfea88
AR
2352/* This function will get the current SR-IOV LD/VF affiliation */
2353static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2354 int initial)
2355{
2356 int retval;
2357
2358 if (instance->PlasmaFW111)
2359 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2360 else
2361 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2362 return retval;
2363}
2364
229fe47c 2365/* This function will tell FW to start the SR-IOV heartbeat */
2366int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2367 int initial)
2368{
2369 struct megasas_cmd *cmd;
2370 struct megasas_dcmd_frame *dcmd;
2371 int retval = 0;
2372
2373 cmd = megasas_get_cmd(instance);
2374
2375 if (!cmd) {
1be18254
BH
2376 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2377 "Failed to get cmd for scsi%d\n",
229fe47c 2378 instance->host->host_no);
2379 return -ENOMEM;
2380 }
2381
2382 dcmd = &cmd->frame->dcmd;
2383
2384 if (initial) {
2385 instance->hb_host_mem =
7c845eb5
JP
2386 pci_zalloc_consistent(instance->pdev,
2387 sizeof(struct MR_CTRL_HB_HOST_MEM),
2388 &instance->hb_host_mem_h);
229fe47c 2389 if (!instance->hb_host_mem) {
1be18254
BH
2390 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2391 " memory for heartbeat host memory for scsi%d\n",
2392 instance->host->host_no);
229fe47c 2393 retval = -ENOMEM;
2394 goto out;
2395 }
229fe47c 2396 }
2397
2398 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2399
2213a467 2400 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2401 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2402 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2403 dcmd->sge_count = 1;
2213a467 2404 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2405 dcmd->timeout = 0;
2406 dcmd->pad_0 = 0;
2213a467
CH
2407 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2408 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2409 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2410 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2411
1be18254 2412 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c 2413 instance->host->host_no);
2414
4026e9aa
SS
2415 if (instance->ctrl_context && !instance->mask_interrupts)
2416 retval = megasas_issue_blocked_cmd(instance, cmd,
2417 MEGASAS_ROUTINE_WAIT_TIME_VF);
2418 else
2419 retval = megasas_issue_polled(instance, cmd);
229fe47c 2420
4026e9aa 2421 if (retval) {
2be2a988
SS
2422 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2423 "_MEM_ALLOC DCMD %s for scsi%d\n",
2424 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2425 "timed out" : "failed", instance->host->host_no);
229fe47c 2426 retval = 1;
229fe47c 2427 }
2428
2429out:
2430 megasas_return_cmd(instance, cmd);
2431
2432 return retval;
2433}
2434
2435/* Handler for SR-IOV heartbeat */
2436void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2437{
2438 struct megasas_instance *instance =
2439 (struct megasas_instance *)instance_addr;
2440
2441 if (instance->hb_host_mem->HB.fwCounter !=
2442 instance->hb_host_mem->HB.driverCounter) {
2443 instance->hb_host_mem->HB.driverCounter =
2444 instance->hb_host_mem->HB.fwCounter;
2445 mod_timer(&instance->sriov_heartbeat_timer,
2446 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2447 } else {
1be18254 2448 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c 2449 "completed for scsi%d\n", instance->host->host_no);
2450 schedule_work(&instance->work_init);
2451 }
2452}
2453
c4a3e0a5
BS
2454/**
2455 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2456 * @instance: Adapter soft state
2457 *
25985edc 2458 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS
2459 * complete all its outstanding commands. Returns error if one or more IOs
2460 * are pending after this time period. It also marks the controller dead.
2461 */
2462static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2463{
ccc7507d 2464 int i, sl, outstanding;
39a98554 2465 u32 reset_index;
c4a3e0a5 2466 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2467 unsigned long flags;
2468 struct list_head clist_local;
2469 struct megasas_cmd *reset_cmd;
707e09bd 2470 u32 fw_state;
39a98554 2471
ccc7507d
SS
2472 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2473 dev_info(&instance->pdev->dev, "%s:%d HBA is killed.\n",
2474 __func__, __LINE__);
2475 return FAILED;
2476 }
39a98554 2477
8a01a41d 2478 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 2479
2480 INIT_LIST_HEAD(&clist_local);
2481 spin_lock_irqsave(&instance->hba_lock, flags);
2482 list_splice_init(&instance->internal_reset_pending_q,
2483 &clist_local);
2484 spin_unlock_irqrestore(&instance->hba_lock, flags);
2485
1be18254 2486 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2487 for (i = 0; i < wait_time; i++) {
2488 msleep(1000);
8a01a41d 2489 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL)
39a98554 2490 break;
2491 }
2492
8a01a41d 2493 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
1be18254 2494 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
8a01a41d 2495 atomic_set(&instance->adprecovery, MEGASAS_HW_CRITICAL_ERROR);
39a98554 2496 return FAILED;
2497 }
2498
da0dc9fb 2499 reset_index = 0;
39a98554 2500 while (!list_empty(&clist_local)) {
da0dc9fb 2501 reset_cmd = list_entry((&clist_local)->next,
39a98554 2502 struct megasas_cmd, list);
2503 list_del_init(&reset_cmd->list);
2504 if (reset_cmd->scmd) {
2505 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2506 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2507 reset_index, reset_cmd,
5cd049a5 2508 reset_cmd->scmd->cmnd[0]);
39a98554 2509
2510 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2511 megasas_return_cmd(instance, reset_cmd);
2512 } else if (reset_cmd->sync_cmd) {
1be18254 2513 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2514 "reset queue\n",
2515 reset_cmd);
2516
2be2a988 2517 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2518 instance->instancet->fire_cmd(instance,
2519 reset_cmd->frame_phys_addr,
2520 0, instance->reg_set);
2521 } else {
1be18254 2522 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2523 "cmds lst\n",
2524 reset_cmd);
2525 }
2526 reset_index++;
2527 }
2528
2529 return SUCCESS;
2530 }
c4a3e0a5 2531
c007b8b2 2532 for (i = 0; i < resetwaittime; i++) {
ccc7507d 2533 outstanding = atomic_read(&instance->fw_outstanding);
e4a082c7
SP
2534
2535 if (!outstanding)
c4a3e0a5
BS
2536 break;
2537
2538 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2539 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2540 "commands to complete\n",i,outstanding);
7343eb65 2541 /*
2542 * Call cmd completion routine. Cmd to be
2543 * be completed directly without depending on isr.
2544 */
2545 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS
2546 }
2547
2548 msleep(1000);
2549 }
2550
707e09bd 2551 i = 0;
ccc7507d
SS
2552 outstanding = atomic_read(&instance->fw_outstanding);
2553 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2554
2555 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2556 goto no_outstanding;
2557
2558 if (instance->disableOnlineCtrlReset)
2559 goto kill_hba_and_failed;
707e09bd 2560 do {
ccc7507d
SS
2561 if ((fw_state == MFI_STATE_FAULT) || atomic_read(&instance->fw_outstanding)) {
2562 dev_info(&instance->pdev->dev,
2563 "%s:%d waiting_for_outstanding: before issue OCR. FW state = 0x%x, oustanding 0x%x\n",
2564 __func__, __LINE__, fw_state, atomic_read(&instance->fw_outstanding));
2565 if (i == 3)
2566 goto kill_hba_and_failed;
707e09bd 2567 megasas_do_ocr(instance);
707e09bd 2568
ccc7507d
SS
2569 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
2570 dev_info(&instance->pdev->dev, "%s:%d OCR failed and HBA is killed.\n",
2571 __func__, __LINE__);
2572 return FAILED;
2573 }
2574 dev_info(&instance->pdev->dev, "%s:%d waiting_for_outstanding: after issue OCR.\n",
2575 __func__, __LINE__);
2576
2577 for (sl = 0; sl < 10; sl++)
2578 msleep(500);
2579
2580 outstanding = atomic_read(&instance->fw_outstanding);
2581
2582 fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK;
2583 if ((!outstanding && (fw_state == MFI_STATE_OPERATIONAL)))
2584 goto no_outstanding;
707e09bd
YB
2585 }
2586 i++;
2587 } while (i <= 3);
2588
ccc7507d 2589no_outstanding:
707e09bd 2590
ccc7507d
SS
2591 dev_info(&instance->pdev->dev, "%s:%d no more pending commands remain after reset handling.\n",
2592 __func__, __LINE__);
2593 return SUCCESS;
707e09bd 2594
ccc7507d 2595kill_hba_and_failed:
c4a3e0a5 2596
ccc7507d
SS
2597 /* Reset not supported, kill adapter */
2598 dev_info(&instance->pdev->dev, "%s:%d killing adapter scsi%d"
2599 " disableOnlineCtrlReset %d fw_outstanding %d \n",
2600 __func__, __LINE__, instance->host->host_no, instance->disableOnlineCtrlReset,
2601 atomic_read(&instance->fw_outstanding));
2602 megasas_dump_pending_frames(instance);
2603 megaraid_sas_kill_hba(instance);
39a98554 2604
ccc7507d 2605 return FAILED;
c4a3e0a5
BS
2606}
2607
2608/**
2609 * megasas_generic_reset - Generic reset routine
2610 * @scmd: Mid-layer SCSI command
2611 *
2612 * This routine implements a generic reset handler for device, bus and host
2613 * reset requests. Device, bus and host specific reset handlers can use this
2614 * function after they do their specific tasks.
2615 */
2616static int megasas_generic_reset(struct scsi_cmnd *scmd)
2617{
2618 int ret_val;
2619 struct megasas_instance *instance;
2620
2621 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2622
5cd049a5
CH
2623 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2624 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2625
8a01a41d 2626 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2627 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS
2628 return FAILED;
2629 }
2630
c4a3e0a5 2631 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2632 if (ret_val == SUCCESS)
1be18254 2633 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2634 else
1be18254 2635 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2636
c4a3e0a5
BS
2637 return ret_val;
2638}
2639
05e9ebbe
SP
2640/**
2641 * megasas_reset_timer - quiesce the adapter if required
2642 * @scmd: scsi cmnd
2643 *
2644 * Sets the FW busy flag and reduces the host->can_queue if the
2645 * cmd has not been completed within the timeout period.
2646 */
2647static enum
242f9dcb 2648blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2649{
05e9ebbe
SP
2650 struct megasas_instance *instance;
2651 unsigned long flags;
2652
2653 if (time_after(jiffies, scmd->jiffies_at_alloc +
e3d178ca 2654 (scmd_timeout * 2) * HZ)) {
242f9dcb 2655 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP
2656 }
2657
f575c5d3 2658 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP
2659 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2660 /* FW is busy, throttle IO */
2661 spin_lock_irqsave(instance->host->host_lock, flags);
2662
c5daa6a9 2663 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP
2664 instance->last_time = jiffies;
2665 instance->flag |= MEGASAS_FW_BUSY;
2666
2667 spin_unlock_irqrestore(instance->host->host_lock, flags);
2668 }
242f9dcb 2669 return BLK_EH_RESET_TIMER;
05e9ebbe
SP
2670}
2671
c4a3e0a5
BS
2672/**
2673 * megasas_reset_device - Device reset handler entry point
2674 */
2675static int megasas_reset_device(struct scsi_cmnd *scmd)
2676{
c4a3e0a5
BS
2677 /*
2678 * First wait for all commands to complete
2679 */
da0dc9fb 2680 return megasas_generic_reset(scmd);
c4a3e0a5
BS
2681}
2682
2683/**
2684 * megasas_reset_bus_host - Bus & host reset handler entry point
2685 */
2686static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2687{
2688 int ret;
9c915a8c 2689 struct megasas_instance *instance;
da0dc9fb 2690
9c915a8c 2691 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS
2692
2693 /*
80682fa9 2694 * First wait for all commands to complete
c4a3e0a5 2695 */
5a8cb85b 2696 if (instance->ctrl_context)
229fe47c 2697 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c 2698 else
2699 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS
2700
2701 return ret;
2702}
2703
cf62a0a5
SP
2704/**
2705 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2706 * @sdev: device handle
cf62a0a5
SP
2707 * @bdev: block device
2708 * @capacity: drive capacity
2709 * @geom: geometry parameters
2710 */
2711static int
2712megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2713 sector_t capacity, int geom[])
2714{
2715 int heads;
2716 int sectors;
2717 sector_t cylinders;
2718 unsigned long tmp;
da0dc9fb 2719
cf62a0a5
SP
2720 /* Default heads (64) & sectors (32) */
2721 heads = 64;
2722 sectors = 32;
2723
2724 tmp = heads * sectors;
2725 cylinders = capacity;
2726
2727 sector_div(cylinders, tmp);
2728
2729 /*
2730 * Handle extended translation size for logical drives > 1Gb
2731 */
2732
2733 if (capacity >= 0x200000) {
2734 heads = 255;
2735 sectors = 63;
2736 tmp = heads*sectors;
2737 cylinders = capacity;
2738 sector_div(cylinders, tmp);
2739 }
2740
2741 geom[0] = heads;
2742 geom[1] = sectors;
2743 geom[2] = cylinders;
2744
2745 return 0;
2746}
2747
7e8a75f4
YB
2748static void megasas_aen_polling(struct work_struct *work);
2749
c4a3e0a5
BS
2750/**
2751 * megasas_service_aen - Processes an event notification
2752 * @instance: Adapter soft state
2753 * @cmd: AEN command completed by the ISR
2754 *
2755 * For AEN, driver sends a command down to FW that is held by the FW till an
2756 * event occurs. When an event of interest occurs, FW completes the command
2757 * that it was previously holding.
2758 *
2759 * This routines sends SIGIO signal to processes that have registered with the
2760 * driver for AEN.
2761 */
2762static void
2763megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2764{
c3518837 2765 unsigned long flags;
da0dc9fb 2766
c4a3e0a5
BS
2767 /*
2768 * Don't signal app if it is just an aborted previously registered aen
2769 */
c3518837
YB
2770 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2771 spin_lock_irqsave(&poll_aen_lock, flags);
2772 megasas_poll_wait_aen = 1;
2773 spin_unlock_irqrestore(&poll_aen_lock, flags);
2774 wake_up(&megasas_poll_wait);
c4a3e0a5 2775 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2776 }
c4a3e0a5
BS
2777 else
2778 cmd->abort_aen = 0;
2779
2780 instance->aen_cmd = NULL;
90dc9d98 2781
4026e9aa 2782 megasas_return_cmd(instance, cmd);
7e8a75f4 2783
39a98554 2784 if ((instance->unload == 0) &&
2785 ((instance->issuepend_done == 1))) {
7e8a75f4 2786 struct megasas_aen_event *ev;
da0dc9fb 2787
7e8a75f4
YB
2788 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2789 if (!ev) {
1be18254 2790 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB
2791 } else {
2792 ev->instance = instance;
2793 instance->ev = ev;
c1d390d8
XF
2794 INIT_DELAYED_WORK(&ev->hotplug_work,
2795 megasas_aen_polling);
2796 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB
2797 }
2798 }
c4a3e0a5
BS
2799}
2800
fc62b3fc
SS
2801static ssize_t
2802megasas_fw_crash_buffer_store(struct device *cdev,
2803 struct device_attribute *attr, const char *buf, size_t count)
2804{
2805 struct Scsi_Host *shost = class_to_shost(cdev);
2806 struct megasas_instance *instance =
2807 (struct megasas_instance *) shost->hostdata;
2808 int val = 0;
2809 unsigned long flags;
2810
2811 if (kstrtoint(buf, 0, &val) != 0)
2812 return -EINVAL;
2813
2814 spin_lock_irqsave(&instance->crashdump_lock, flags);
2815 instance->fw_crash_buffer_offset = val;
2816 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2817 return strlen(buf);
2818}
2819
2820static ssize_t
2821megasas_fw_crash_buffer_show(struct device *cdev,
2822 struct device_attribute *attr, char *buf)
2823{
2824 struct Scsi_Host *shost = class_to_shost(cdev);
2825 struct megasas_instance *instance =
2826 (struct megasas_instance *) shost->hostdata;
2827 u32 size;
2828 unsigned long buff_addr;
2829 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2830 unsigned long src_addr;
2831 unsigned long flags;
2832 u32 buff_offset;
2833
2834 spin_lock_irqsave(&instance->crashdump_lock, flags);
2835 buff_offset = instance->fw_crash_buffer_offset;
2836 if (!instance->crash_dump_buf &&
2837 !((instance->fw_crash_state == AVAILABLE) ||
2838 (instance->fw_crash_state == COPYING))) {
2839 dev_err(&instance->pdev->dev,
2840 "Firmware crash dump is not available\n");
2841 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2842 return -EINVAL;
2843 }
2844
2845 buff_addr = (unsigned long) buf;
2846
da0dc9fb 2847 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS
2848 dev_err(&instance->pdev->dev,
2849 "Firmware crash dump offset is out of range\n");
2850 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2851 return 0;
2852 }
2853
2854 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2855 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2856
2857 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2858 (buff_offset % dmachunk);
da0dc9fb 2859 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS
2860 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2861
2862 return size;
2863}
2864
2865static ssize_t
2866megasas_fw_crash_buffer_size_show(struct device *cdev,
2867 struct device_attribute *attr, char *buf)
2868{
2869 struct Scsi_Host *shost = class_to_shost(cdev);
2870 struct megasas_instance *instance =
2871 (struct megasas_instance *) shost->hostdata;
2872
2873 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2874 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2875}
2876
2877static ssize_t
2878megasas_fw_crash_state_store(struct device *cdev,
2879 struct device_attribute *attr, const char *buf, size_t count)
2880{
2881 struct Scsi_Host *shost = class_to_shost(cdev);
2882 struct megasas_instance *instance =
2883 (struct megasas_instance *) shost->hostdata;
2884 int val = 0;
2885 unsigned long flags;
2886
2887 if (kstrtoint(buf, 0, &val) != 0)
2888 return -EINVAL;
2889
2890 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2891 dev_err(&instance->pdev->dev, "application updates invalid "
2892 "firmware crash state\n");
2893 return -EINVAL;
2894 }
2895
2896 instance->fw_crash_state = val;
2897
2898 if ((val == COPIED) || (val == COPY_ERROR)) {
2899 spin_lock_irqsave(&instance->crashdump_lock, flags);
2900 megasas_free_host_crash_buffer(instance);
2901 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2902 if (val == COPY_ERROR)
2903 dev_info(&instance->pdev->dev, "application failed to "
2904 "copy Firmware crash dump\n");
2905 else
2906 dev_info(&instance->pdev->dev, "Firmware crash dump "
2907 "copied successfully\n");
2908 }
2909 return strlen(buf);
2910}
2911
2912static ssize_t
2913megasas_fw_crash_state_show(struct device *cdev,
2914 struct device_attribute *attr, char *buf)
2915{
2916 struct Scsi_Host *shost = class_to_shost(cdev);
2917 struct megasas_instance *instance =
2918 (struct megasas_instance *) shost->hostdata;
da0dc9fb 2919
fc62b3fc
SS
2920 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2921}
2922
2923static ssize_t
2924megasas_page_size_show(struct device *cdev,
2925 struct device_attribute *attr, char *buf)
2926{
2927 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2928}
2929
308ec459
SS
2930static ssize_t
2931megasas_ldio_outstanding_show(struct device *cdev, struct device_attribute *attr,
2932 char *buf)
2933{
2934 struct Scsi_Host *shost = class_to_shost(cdev);
2935 struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata;
2936
2937 return snprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&instance->ldio_outstanding));
2938}
2939
fc62b3fc
SS
2940static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2941 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2942static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2943 megasas_fw_crash_buffer_size_show, NULL);
2944static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2945 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2946static DEVICE_ATTR(page_size, S_IRUGO,
2947 megasas_page_size_show, NULL);
308ec459
SS
2948static DEVICE_ATTR(ldio_outstanding, S_IRUGO,
2949 megasas_ldio_outstanding_show, NULL);
fc62b3fc
SS
2950
2951struct device_attribute *megaraid_host_attrs[] = {
2952 &dev_attr_fw_crash_buffer_size,
2953 &dev_attr_fw_crash_buffer,
2954 &dev_attr_fw_crash_state,
2955 &dev_attr_page_size,
308ec459 2956 &dev_attr_ldio_outstanding,
fc62b3fc
SS
2957 NULL,
2958};
2959
c4a3e0a5
BS
2960/*
2961 * Scsi host template for megaraid_sas driver
2962 */
2963static struct scsi_host_template megasas_template = {
2964
2965 .module = THIS_MODULE,
43cd7fe4 2966 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2967 .proc_name = "megaraid_sas",
147aab6a 2968 .slave_configure = megasas_slave_configure,
044833b5 2969 .slave_alloc = megasas_slave_alloc,
18365b13 2970 .slave_destroy = megasas_slave_destroy,
c4a3e0a5
BS
2971 .queuecommand = megasas_queue_command,
2972 .eh_device_reset_handler = megasas_reset_device,
2973 .eh_bus_reset_handler = megasas_reset_bus_host,
2974 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2975 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2976 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2977 .bios_param = megasas_bios_param,
c4a3e0a5 2978 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2979 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2980 .no_write_same = 1,
c4a3e0a5
BS
2981};
2982
2983/**
2984 * megasas_complete_int_cmd - Completes an internal command
2985 * @instance: Adapter soft state
2986 * @cmd: Command to be completed
2987 *
2988 * The megasas_issue_blocked_cmd() function waits for a command to complete
2989 * after it issues a command. This function wakes up that waiting routine by
2990 * calling wake_up() on the wait queue.
2991 */
2992static void
2993megasas_complete_int_cmd(struct megasas_instance *instance,
2994 struct megasas_cmd *cmd)
2995{
2be2a988 2996 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS
2997 wake_up(&instance->int_cmd_wait_q);
2998}
2999
3000/**
3001 * megasas_complete_abort - Completes aborting a command
3002 * @instance: Adapter soft state
3003 * @cmd: Cmd that was issued to abort another cmd
3004 *
0d49016b 3005 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
3006 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS
3007 * wakes up all functions waiting on the same wait queue.
3008 */
3009static void
3010megasas_complete_abort(struct megasas_instance *instance,
3011 struct megasas_cmd *cmd)
3012{
3013 if (cmd->sync_cmd) {
3014 cmd->sync_cmd = 0;
2be2a988 3015 cmd->cmd_status_drv = 0;
c4a3e0a5
BS
3016 wake_up(&instance->abort_cmd_wait_q);
3017 }
c4a3e0a5
BS
3018}
3019
c4a3e0a5
BS
3020/**
3021 * megasas_complete_cmd - Completes a command
3022 * @instance: Adapter soft state
3023 * @cmd: Command to be completed
0d49016b 3024 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH
3025 * SCSI mid-layer instead of the value returned
3026 * by the FW. This should be used if caller wants
3027 * an alternate status (as in the case of aborted
3028 * commands)
c4a3e0a5 3029 */
9c915a8c 3030void
c4a3e0a5
BS
3031megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
3032 u8 alt_status)
3033{
3034 int exception = 0;
3035 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 3036 unsigned long flags;
9c915a8c 3037 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 3038 u32 opcode, status;
c4a3e0a5 3039
39a98554 3040 /* flag for the retry reset */
3041 cmd->retry_for_fw_reset = 0;
3042
05e9ebbe
SP
3043 if (cmd->scmd)
3044 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS
3045
3046 switch (hdr->cmd) {
e5f93a36 3047 case MFI_CMD_INVALID:
3048 /* Some older 1068 controller FW may keep a pended
3049 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
3050 when booting the kdump kernel. Ignore this command to
3051 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH
3052 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
3053 "completed\n");
3054 dev_warn(&instance->pdev->dev, "If you have a controller "
3055 "other than PERC5, please upgrade your firmware\n");
e5f93a36 3056 break;
c4a3e0a5
BS
3057 case MFI_CMD_PD_SCSI_IO:
3058 case MFI_CMD_LD_SCSI_IO:
3059
3060 /*
3061 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
3062 * issued either through an IO path or an IOCTL path. If it
3063 * was via IOCTL, we will send it to internal completion.
3064 */
3065 if (cmd->sync_cmd) {
3066 cmd->sync_cmd = 0;
3067 megasas_complete_int_cmd(instance, cmd);
3068 break;
3069 }
3070
c4a3e0a5
BS
3071 case MFI_CMD_LD_READ:
3072 case MFI_CMD_LD_WRITE:
3073
3074 if (alt_status) {
3075 cmd->scmd->result = alt_status << 16;
3076 exception = 1;
3077 }
3078
3079 if (exception) {
3080
e4a082c7 3081 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3082
155d98f0 3083 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS
3084 cmd->scmd->scsi_done(cmd->scmd);
3085 megasas_return_cmd(instance, cmd);
3086
3087 break;
3088 }
3089
3090 switch (hdr->cmd_status) {
3091
3092 case MFI_STAT_OK:
3093 cmd->scmd->result = DID_OK << 16;
3094 break;
3095
3096 case MFI_STAT_SCSI_IO_FAILED:
3097 case MFI_STAT_LD_INIT_IN_PROGRESS:
3098 cmd->scmd->result =
3099 (DID_ERROR << 16) | hdr->scsi_status;
3100 break;
3101
3102 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3103
3104 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3105
3106 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3107 memset(cmd->scmd->sense_buffer, 0,
3108 SCSI_SENSE_BUFFERSIZE);
3109 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3110 hdr->sense_len);
3111
3112 cmd->scmd->result |= DRIVER_SENSE << 24;
3113 }
3114
3115 break;
3116
3117 case MFI_STAT_LD_OFFLINE:
3118 case MFI_STAT_DEVICE_NOT_FOUND:
3119 cmd->scmd->result = DID_BAD_TARGET << 16;
3120 break;
3121
3122 default:
1be18254 3123 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS
3124 hdr->cmd_status);
3125 cmd->scmd->result = DID_ERROR << 16;
3126 break;
3127 }
3128
e4a082c7 3129 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3130
155d98f0 3131 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS
3132 cmd->scmd->scsi_done(cmd->scmd);
3133 megasas_return_cmd(instance, cmd);
3134
3135 break;
3136
3137 case MFI_CMD_SMP:
3138 case MFI_CMD_STP:
3139 case MFI_CMD_DCMD:
94cd65dd 3140 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3141 /* Check for LD map update */
94cd65dd
SS
3142 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3143 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3144 fusion->fast_path_io = 0;
9c915a8c 3145 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3146 instance->map_update_cmd = NULL;
9c915a8c 3147 if (cmd->frame->hdr.cmd_status != 0) {
3148 if (cmd->frame->hdr.cmd_status !=
3149 MFI_STAT_NOT_FOUND)
1be18254 3150 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c 3151 cmd->frame->hdr.cmd_status);
3152 else {
4026e9aa 3153 megasas_return_cmd(instance, cmd);
9c915a8c 3154 spin_unlock_irqrestore(
3155 instance->host->host_lock,
3156 flags);
3157 break;
3158 }
3159 } else
3160 instance->map_id++;
4026e9aa 3161 megasas_return_cmd(instance, cmd);
bc93d425
SS
3162
3163 /*
3164 * Set fast path IO to ZERO.
3165 * Validate Map will set proper value.
3166 * Meanwhile all IOs will go as LD IO.
3167 */
3168 if (MR_ValidateMapInfo(instance))
9c915a8c 3169 fusion->fast_path_io = 1;
3170 else
3171 fusion->fast_path_io = 0;
3172 megasas_sync_map_info(instance);
3173 spin_unlock_irqrestore(instance->host->host_lock,
3174 flags);
3175 break;
3176 }
94cd65dd
SS
3177 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3178 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB
3179 spin_lock_irqsave(&poll_aen_lock, flags);
3180 megasas_poll_wait_aen = 0;
3181 spin_unlock_irqrestore(&poll_aen_lock, flags);
3182 }
c4a3e0a5 3183
3761cb4c 3184 /* FW has an updated PD sequence */
3185 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3186 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3187
3188 spin_lock_irqsave(instance->host->host_lock, flags);
3189 status = cmd->frame->hdr.cmd_status;
3190 instance->jbod_seq_cmd = NULL;
3191 megasas_return_cmd(instance, cmd);
3192
3193 if (status == MFI_STAT_OK) {
3194 instance->pd_seq_map_id++;
3195 /* Re-register a pd sync seq num cmd */
3196 if (megasas_sync_pd_seq_num(instance, true))
3197 instance->use_seqnum_jbod_fp = false;
3198 } else
3199 instance->use_seqnum_jbod_fp = false;
3200
3201 spin_unlock_irqrestore(instance->host->host_lock, flags);
3202 break;
3203 }
3204
c4a3e0a5
BS
3205 /*
3206 * See if got an event notification
3207 */
94cd65dd 3208 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS
3209 megasas_service_aen(instance, cmd);
3210 else
3211 megasas_complete_int_cmd(instance, cmd);
3212
3213 break;
3214
3215 case MFI_CMD_ABORT:
3216 /*
3217 * Cmd issued to abort another cmd returned
3218 */
3219 megasas_complete_abort(instance, cmd);
3220 break;
3221
3222 default:
1be18254 3223 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS
3224 hdr->cmd);
3225 break;
3226 }
3227}
3228
39a98554 3229/**
3230 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3231 * in FW again because of the fw reset
39a98554 3232 * @instance: Adapter soft state
3233 */
3234static inline void
3235megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3236{
3237 struct megasas_cmd *cmd;
3238 struct list_head clist_local;
3239 union megasas_evt_class_locale class_locale;
3240 unsigned long flags;
3241 u32 seq_num;
3242
3243 INIT_LIST_HEAD(&clist_local);
3244 spin_lock_irqsave(&instance->hba_lock, flags);
3245 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3246 spin_unlock_irqrestore(&instance->hba_lock, flags);
3247
3248 while (!list_empty(&clist_local)) {
da0dc9fb 3249 cmd = list_entry((&clist_local)->next,
39a98554 3250 struct megasas_cmd, list);
3251 list_del_init(&cmd->list);
3252
3253 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH
3254 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3255 "detected to be pending while HBA reset\n",
39a98554 3256 cmd, cmd->scmd, cmd->sync_cmd);
3257
3258 cmd->retry_for_fw_reset++;
3259
3260 if (cmd->retry_for_fw_reset == 3) {
1be18254 3261 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3262 "was tried multiple times during reset."
3263 "Shutting down the HBA\n",
3264 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS
3265 instance->instancet->disable_intr(instance);
3266 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3267 megaraid_sas_kill_hba(instance);
39a98554 3268 return;
3269 }
3270 }
3271
3272 if (cmd->sync_cmd == 1) {
3273 if (cmd->scmd) {
1be18254 3274 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3275 "cmd attached to internal command!\n");
3276 }
1be18254 3277 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3278 "on the internal reset queue,"
3279 "issue it again.\n", cmd);
2be2a988 3280 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3281 instance->instancet->fire_cmd(instance,
da0dc9fb 3282 cmd->frame_phys_addr,
39a98554 3283 0, instance->reg_set);
3284 } else if (cmd->scmd) {
1be18254 3285 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3286 "detected on the internal queue, issue again.\n",
5cd049a5 3287 cmd, cmd->scmd->cmnd[0]);
39a98554 3288
3289 atomic_inc(&instance->fw_outstanding);
3290 instance->instancet->fire_cmd(instance,
3291 cmd->frame_phys_addr,
3292 cmd->frame_count-1, instance->reg_set);
3293 } else {
1be18254 3294 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3295 "internal reset defer list while re-issue!!\n",
3296 cmd);
3297 }
3298 }
3299
3300 if (instance->aen_cmd) {
1be18254 3301 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3302 megasas_return_cmd(instance, instance->aen_cmd);
3303
da0dc9fb 3304 instance->aen_cmd = NULL;
39a98554 3305 }
3306
3307 /*
da0dc9fb
BH
3308 * Initiate AEN (Asynchronous Event Notification)
3309 */
39a98554 3310 seq_num = instance->last_seq_num;
3311 class_locale.members.reserved = 0;
3312 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3313 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3314
3315 megasas_register_aen(instance, seq_num, class_locale.word);
3316}
3317
3318/**
3319 * Move the internal reset pending commands to a deferred queue.
3320 *
3321 * We move the commands pending at internal reset time to a
3322 * pending queue. This queue would be flushed after successful
3323 * completion of the internal reset sequence. if the internal reset
3324 * did not complete in time, the kernel reset handler would flush
3325 * these commands.
3326 **/
3327static void
3328megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3329{
3330 struct megasas_cmd *cmd;
3331 int i;
3332 u32 max_cmd = instance->max_fw_cmds;
3333 u32 defer_index;
3334 unsigned long flags;
3335
da0dc9fb 3336 defer_index = 0;
90dc9d98 3337 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3338 for (i = 0; i < max_cmd; i++) {
3339 cmd = instance->cmd_list[i];
3340 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3341 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3342 "on the defer queue as internal\n",
3343 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3344
3345 if (!list_empty(&cmd->list)) {
1be18254 3346 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3347 " moving this cmd:%p, %d %p, it was"
3348 "discovered on some list?\n",
3349 cmd, cmd->sync_cmd, cmd->scmd);
3350
3351 list_del_init(&cmd->list);
3352 }
3353 defer_index++;
3354 list_add_tail(&cmd->list,
3355 &instance->internal_reset_pending_q);
3356 }
3357 }
90dc9d98 3358 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3359}
3360
3361
3362static void
3363process_fw_state_change_wq(struct work_struct *work)
3364{
3365 struct megasas_instance *instance =
3366 container_of(work, struct megasas_instance, work_init);
3367 u32 wait;
3368 unsigned long flags;
3369
8a01a41d 3370 if (atomic_read(&instance->adprecovery) != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3371 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
8a01a41d 3372 atomic_read(&instance->adprecovery));
39a98554 3373 return ;
3374 }
3375
8a01a41d 3376 if (atomic_read(&instance->adprecovery) == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3377 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3378 "state, restarting it...\n");
3379
d46a3ad6 3380 instance->instancet->disable_intr(instance);
39a98554 3381 atomic_set(&instance->fw_outstanding, 0);
3382
3383 atomic_set(&instance->fw_reset_no_pci_access, 1);
3384 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3385 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3386
1be18254 3387 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3388 "initiating next stage...\n");
3389
1be18254 3390 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3391 "state 2 starting...\n");
3392
da0dc9fb 3393 /* waiting for about 20 second before start the second init */
39a98554 3394 for (wait = 0; wait < 30; wait++) {
3395 msleep(1000);
3396 }
3397
058a8fac 3398 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3399 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3400
c8dd61ef 3401 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3402 megaraid_sas_kill_hba(instance);
39a98554 3403 return ;
3404 }
3405
3406 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3407 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3408 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3409 ) {
3410 *instance->consumer = *instance->producer;
3411 } else {
3412 *instance->consumer = 0;
3413 *instance->producer = 0;
3414 }
3415
3416 megasas_issue_init_mfi(instance);
3417
3418 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 3419 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
39a98554 3420 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3421 instance->instancet->enable_intr(instance);
39a98554 3422
3423 megasas_issue_pending_cmds_again(instance);
3424 instance->issuepend_done = 1;
3425 }
39a98554 3426}
3427
c4a3e0a5
BS
3428/**
3429 * megasas_deplete_reply_queue - Processes all completed commands
3430 * @instance: Adapter soft state
3431 * @alt_status: Alternate status to be returned to
da0dc9fb
BH
3432 * SCSI mid-layer instead of the status
3433 * returned by the FW
39a98554 3434 * Note: this must be called with hba lock held
c4a3e0a5 3435 */
858119e1 3436static int
39a98554 3437megasas_deplete_reply_queue(struct megasas_instance *instance,
3438 u8 alt_status)
c4a3e0a5 3439{
39a98554 3440 u32 mfiStatus;
3441 u32 fw_state;
3442
3443 if ((mfiStatus = instance->instancet->check_reset(instance,
3444 instance->reg_set)) == 1) {
3445 return IRQ_HANDLED;
3446 }
3447
3448 if ((mfiStatus = instance->instancet->clear_intr(
3449 instance->reg_set)
3450 ) == 0) {
e1419191 3451 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3452 if (!instance->msix_vectors)
e1419191 3453 return IRQ_NONE;
39a98554 3454 }
3455
3456 instance->mfiStatus = mfiStatus;
3457
3458 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3459 fw_state = instance->instancet->read_fw_status_reg(
3460 instance->reg_set) & MFI_STATE_MASK;
3461
3462 if (fw_state != MFI_STATE_FAULT) {
1be18254 3463 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3464 fw_state);
3465 }
3466
3467 if ((fw_state == MFI_STATE_FAULT) &&
3468 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3469 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3470
3471 if ((instance->pdev->device ==
3472 PCI_DEVICE_ID_LSI_SAS1064R) ||
3473 (instance->pdev->device ==
3474 PCI_DEVICE_ID_DELL_PERC5) ||
3475 (instance->pdev->device ==
3476 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3477
3478 *instance->consumer =
94cd65dd 3479 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3480 }
3481
3482
d46a3ad6 3483 instance->instancet->disable_intr(instance);
8a01a41d 3484 atomic_set(&instance->adprecovery, MEGASAS_ADPRESET_SM_INFAULT);
39a98554 3485 instance->issuepend_done = 0;
3486
3487 atomic_set(&instance->fw_outstanding, 0);
3488 megasas_internal_reset_defer_cmds(instance);
3489
1be18254 3490 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
8a01a41d 3491 fw_state, atomic_read(&instance->adprecovery));
39a98554 3492
3493 schedule_work(&instance->work_init);
3494 return IRQ_HANDLED;
3495
3496 } else {
1be18254 3497 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3498 fw_state, instance->disableOnlineCtrlReset);
3499 }
3500 }
c4a3e0a5 3501
5d018ad0 3502 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS
3503 return IRQ_HANDLED;
3504}
c4a3e0a5
BS
3505/**
3506 * megasas_isr - isr entry point
3507 */
7d12e780 3508static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3509{
c8e858fe 3510 struct megasas_irq_context *irq_context = devp;
3511 struct megasas_instance *instance = irq_context->instance;
39a98554 3512 unsigned long flags;
da0dc9fb 3513 irqreturn_t rc;
39a98554 3514
c8e858fe 3515 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3516 return IRQ_HANDLED;
3517
39a98554 3518 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3519 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3520 spin_unlock_irqrestore(&instance->hba_lock, flags);
3521
3522 return rc;
c4a3e0a5
BS
3523}
3524
3525/**
3526 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3527 * @instance: Adapter soft state
c4a3e0a5
BS
3528 *
3529 * During the initialization, FW passes can potentially be in any one of
3530 * several possible states. If the FW in operational, waiting-for-handshake
3531 * states, driver must take steps to bring it to ready state. Otherwise, it
3532 * has to wait for the ready state.
3533 */
9c915a8c 3534int
058a8fac 3535megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS
3536{
3537 int i;
3538 u8 max_wait;
3539 u32 fw_state;
3540 u32 cur_state;
7218df69 3541 u32 abs_state, curr_abs_state;
c4a3e0a5 3542
bc6ac5e8
TH
3543 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3544 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3545
e3bbff9f 3546 if (fw_state != MFI_STATE_READY)
1be18254 3547 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3548 " state\n");
e3bbff9f 3549
c4a3e0a5
BS
3550 while (fw_state != MFI_STATE_READY) {
3551
c4a3e0a5
BS
3552 switch (fw_state) {
3553
3554 case MFI_STATE_FAULT:
1be18254 3555 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac 3556 if (ocr) {
3557 max_wait = MEGASAS_RESET_WAIT_TIME;
3558 cur_state = MFI_STATE_FAULT;
3559 break;
3560 } else
3561 return -ENODEV;
c4a3e0a5
BS
3562
3563 case MFI_STATE_WAIT_HANDSHAKE:
3564 /*
3565 * Set the CLR bit in inbound doorbell
3566 */
0c79e681 3567 if ((instance->pdev->device ==
87911122
YB
3568 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3569 (instance->pdev->device ==
9c915a8c 3570 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3571 (instance->ctrl_context))
87911122
YB
3572 writel(
3573 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3574 &instance->reg_set->doorbell);
5a8cb85b 3575 else
87911122
YB
3576 writel(
3577 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3578 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3579
7218df69 3580 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3581 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3582 break;
3583
e3bbff9f 3584 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3585 if ((instance->pdev->device ==
9c915a8c 3586 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3587 (instance->pdev->device ==
3588 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3589 (instance->ctrl_context))
87911122 3590 writel(MFI_INIT_HOTPLUG,
9c915a8c 3591 &instance->reg_set->doorbell);
5a8cb85b 3592 else
87911122
YB
3593 writel(MFI_INIT_HOTPLUG,
3594 &instance->reg_set->inbound_doorbell);
e3bbff9f 3595
7218df69 3596 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP
3597 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3598 break;
3599
c4a3e0a5
BS
3600 case MFI_STATE_OPERATIONAL:
3601 /*
e3bbff9f 3602 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3603 */
d46a3ad6 3604 instance->instancet->disable_intr(instance);
87911122
YB
3605 if ((instance->pdev->device ==
3606 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3607 (instance->pdev->device ==
9c915a8c 3608 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3609 (instance->ctrl_context)) {
87911122 3610 writel(MFI_RESET_FLAGS,
9c915a8c 3611 &instance->reg_set->doorbell);
5a8cb85b 3612
3613 if (instance->ctrl_context) {
9c915a8c 3614 for (i = 0; i < (10 * 1000); i += 20) {
3615 if (readl(
3616 &instance->
3617 reg_set->
3618 doorbell) & 1)
3619 msleep(20);
3620 else
3621 break;
3622 }
3623 }
87911122
YB
3624 } else
3625 writel(MFI_RESET_FLAGS,
3626 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3627
7218df69 3628 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3629 cur_state = MFI_STATE_OPERATIONAL;
3630 break;
3631
3632 case MFI_STATE_UNDEFINED:
3633 /*
3634 * This state should not last for more than 2 seconds
3635 */
7218df69 3636 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3637 cur_state = MFI_STATE_UNDEFINED;
3638 break;
3639
3640 case MFI_STATE_BB_INIT:
7218df69 3641 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3642 cur_state = MFI_STATE_BB_INIT;
3643 break;
3644
3645 case MFI_STATE_FW_INIT:
7218df69 3646 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3647 cur_state = MFI_STATE_FW_INIT;
3648 break;
3649
3650 case MFI_STATE_FW_INIT_2:
7218df69 3651 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3652 cur_state = MFI_STATE_FW_INIT_2;
3653 break;
3654
3655 case MFI_STATE_DEVICE_SCAN:
7218df69 3656 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3657 cur_state = MFI_STATE_DEVICE_SCAN;
3658 break;
3659
3660 case MFI_STATE_FLUSH_CACHE:
7218df69 3661 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
3662 cur_state = MFI_STATE_FLUSH_CACHE;
3663 break;
3664
3665 default:
1be18254 3666 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS
3667 fw_state);
3668 return -ENODEV;
3669 }
3670
3671 /*
3672 * The cur_state should not last for more than max_wait secs
3673 */
3674 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH
3675 curr_abs_state = instance->instancet->
3676 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3677
7218df69 3678 if (abs_state == curr_abs_state) {
c4a3e0a5
BS
3679 msleep(1);
3680 } else
3681 break;
3682 }
3683
3684 /*
3685 * Return error if fw_state hasn't changed after max_wait
3686 */
7218df69 3687 if (curr_abs_state == abs_state) {
1be18254 3688 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS
3689 "in %d secs\n", fw_state, max_wait);
3690 return -ENODEV;
3691 }
bc6ac5e8
TH
3692
3693 abs_state = curr_abs_state;
3694 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3695 }
1be18254 3696 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS
3697
3698 return 0;
3699}
3700
3701/**
3702 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3703 * @instance: Adapter soft state
3704 */
3705static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3706{
3707 int i;
9c915a8c 3708 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3709 struct megasas_cmd *cmd;
3710
3711 if (!instance->frame_dma_pool)
3712 return;
3713
3714 /*
3715 * Return all frames to pool
3716 */
3717 for (i = 0; i < max_cmd; i++) {
3718
3719 cmd = instance->cmd_list[i];
3720
3721 if (cmd->frame)
3722 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3723 cmd->frame_phys_addr);
3724
3725 if (cmd->sense)
e3bbff9f 3726 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS
3727 cmd->sense_phys_addr);
3728 }
3729
3730 /*
3731 * Now destroy the pool itself
3732 */
3733 pci_pool_destroy(instance->frame_dma_pool);
3734 pci_pool_destroy(instance->sense_dma_pool);
3735
3736 instance->frame_dma_pool = NULL;
3737 instance->sense_dma_pool = NULL;
3738}
3739
3740/**
3741 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3742 * @instance: Adapter soft state
3743 *
3744 * Each command packet has an embedded DMA memory buffer that is used for
3745 * filling MFI frame and the SG list that immediately follows the frame. This
3746 * function creates those DMA memory buffers for each command packet by using
3747 * PCI pool facility.
3748 */
3749static int megasas_create_frame_pool(struct megasas_instance *instance)
3750{
3751 int i;
3752 u32 max_cmd;
3753 u32 sge_sz;
c4a3e0a5
BS
3754 u32 total_sz;
3755 u32 frame_count;
3756 struct megasas_cmd *cmd;
3757
9c915a8c 3758 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3759
3760 /*
3761 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3762 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3763 */
3764 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3765 sizeof(struct megasas_sge32);
3766
da0dc9fb 3767 if (instance->flag_ieee)
f4c9a131 3768 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3769
c4a3e0a5 3770 /*
200aed58
SS
3771 * For MFI controllers.
3772 * max_num_sge = 60
3773 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3774 * Total 960 byte (15 MFI frame of 64 byte)
3775 *
3776 * Fusion adapter require only 3 extra frame.
3777 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3778 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3779 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3780 */
200aed58 3781 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS
3782 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3783 /*
3784 * Use DMA pool facility provided by PCI layer
3785 */
3786 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3787 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS
3788
3789 if (!instance->frame_dma_pool) {
1be18254 3790 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS
3791 return -ENOMEM;
3792 }
3793
3794 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3795 instance->pdev, 128, 4, 0);
3796
3797 if (!instance->sense_dma_pool) {
1be18254 3798 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS
3799
3800 pci_pool_destroy(instance->frame_dma_pool);
3801 instance->frame_dma_pool = NULL;
3802
3803 return -ENOMEM;
3804 }
3805
3806 /*
3807 * Allocate and attach a frame to each of the commands in cmd_list.
3808 * By making cmd->index as the context instead of the &cmd, we can
3809 * always use 32bit context regardless of the architecture
3810 */
3811 for (i = 0; i < max_cmd; i++) {
3812
3813 cmd = instance->cmd_list[i];
3814
3815 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3816 GFP_KERNEL, &cmd->frame_phys_addr);
3817
3818 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3819 GFP_KERNEL, &cmd->sense_phys_addr);
3820
3821 /*
3822 * megasas_teardown_frame_pool() takes care of freeing
3823 * whatever has been allocated
3824 */
3825 if (!cmd->frame || !cmd->sense) {
1be18254 3826 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS
3827 megasas_teardown_frame_pool(instance);
3828 return -ENOMEM;
3829 }
3830
707e09bd 3831 memset(cmd->frame, 0, total_sz);
94cd65dd 3832 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3833 cmd->frame->io.pad_0 = 0;
5a8cb85b 3834 if (!instance->ctrl_context && reset_devices)
e5f93a36 3835 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS
3836 }
3837
3838 return 0;
3839}
3840
3841/**
3842 * megasas_free_cmds - Free all the cmds in the free cmd pool
3843 * @instance: Adapter soft state
3844 */
9c915a8c 3845void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS
3846{
3847 int i;
da0dc9fb 3848
c4a3e0a5
BS
3849 /* First free the MFI frame pool */
3850 megasas_teardown_frame_pool(instance);
3851
3852 /* Free all the commands in the cmd_list */
9c915a8c 3853 for (i = 0; i < instance->max_mfi_cmds; i++)
3854
c4a3e0a5
BS
3855 kfree(instance->cmd_list[i]);
3856
3857 /* Free the cmd_list buffer itself */
3858 kfree(instance->cmd_list);
3859 instance->cmd_list = NULL;
3860
3861 INIT_LIST_HEAD(&instance->cmd_pool);
3862}
3863
3864/**
3865 * megasas_alloc_cmds - Allocates the command packets
3866 * @instance: Adapter soft state
3867 *
3868 * Each command that is issued to the FW, whether IO commands from the OS or
3869 * internal commands like IOCTLs, are wrapped in local data structure called
3870 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3871 * the FW.
3872 *
3873 * Each frame has a 32-bit field called context (tag). This context is used
3874 * to get back the megasas_cmd from the frame when a frame gets completed in
3875 * the ISR. Typically the address of the megasas_cmd itself would be used as
3876 * the context. But we wanted to keep the differences between 32 and 64 bit
3877 * systems to the mininum. We always use 32 bit integers for the context. In
3878 * this driver, the 32 bit values are the indices into an array cmd_list.
3879 * This array is used only to look up the megasas_cmd given the context. The
3880 * free commands themselves are maintained in a linked list called cmd_pool.
3881 */
9c915a8c 3882int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS
3883{
3884 int i;
3885 int j;
3886 u32 max_cmd;
3887 struct megasas_cmd *cmd;
90dc9d98 3888 struct fusion_context *fusion;
c4a3e0a5 3889
90dc9d98 3890 fusion = instance->ctrl_context;
9c915a8c 3891 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS
3892
3893 /*
3894 * instance->cmd_list is an array of struct megasas_cmd pointers.
3895 * Allocate the dynamic array first and then allocate individual
3896 * commands.
3897 */
dd00cc48 3898 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS
3899
3900 if (!instance->cmd_list) {
1be18254 3901 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS
3902 return -ENOMEM;
3903 }
3904
9c915a8c 3905 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS
3906
3907 for (i = 0; i < max_cmd; i++) {
3908 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3909 GFP_KERNEL);
3910
3911 if (!instance->cmd_list[i]) {
3912
3913 for (j = 0; j < i; j++)
3914 kfree(instance->cmd_list[j]);
3915
3916 kfree(instance->cmd_list);
3917 instance->cmd_list = NULL;
3918
3919 return -ENOMEM;
3920 }
3921 }
3922
c4a3e0a5
BS
3923 for (i = 0; i < max_cmd; i++) {
3924 cmd = instance->cmd_list[i];
3925 memset(cmd, 0, sizeof(struct megasas_cmd));
3926 cmd->index = i;
39a98554 3927 cmd->scmd = NULL;
c4a3e0a5
BS
3928 cmd->instance = instance;
3929
3930 list_add_tail(&cmd->list, &instance->cmd_pool);
3931 }
3932
3933 /*
3934 * Create a frame pool and assign one frame to each cmd
3935 */
3936 if (megasas_create_frame_pool(instance)) {
1be18254 3937 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS
3938 megasas_free_cmds(instance);
3939 }
3940
3941 return 0;
3942}
3943
6d40afbc
SS
3944/*
3945 * dcmd_timeout_ocr_possible - Check if OCR is possible based on Driver/FW state.
3946 * @instance: Adapter soft state
3947 *
3948 * Return 0 for only Fusion adapter, if driver load/unload is not in progress
3949 * or FW is not under OCR.
3950 */
3951inline int
3952dcmd_timeout_ocr_possible(struct megasas_instance *instance) {
3953
3954 if (!instance->ctrl_context)
3955 return KILL_ADAPTER;
3956 else if (instance->unload ||
3957 test_bit(MEGASAS_FUSION_IN_RESET, &instance->reset_flags))
3958 return IGNORE_TIMEOUT;
3959 else
3960 return INITIATE_OCR;
3961}
3962
2216c305
SS
3963static int
3964megasas_get_pd_info(struct megasas_instance *instance, u16 device_id)
3965{
3966 int ret;
3967 struct megasas_cmd *cmd;
3968 struct megasas_dcmd_frame *dcmd;
3969
3970 cmd = megasas_get_cmd(instance);
3971
3972 if (!cmd) {
3973 dev_err(&instance->pdev->dev, "Failed to get cmd %s\n", __func__);
3974 return -ENOMEM;
3975 }
3976
3977 dcmd = &cmd->frame->dcmd;
3978
3979 memset(instance->pd_info, 0, sizeof(*instance->pd_info));
3980 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3981
3982 dcmd->mbox.s[0] = cpu_to_le16(device_id);
3983 dcmd->cmd = MFI_CMD_DCMD;
3984 dcmd->cmd_status = 0xFF;
3985 dcmd->sge_count = 1;
3986 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
3987 dcmd->timeout = 0;
3988 dcmd->pad_0 = 0;
3989 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_PD_INFO));
3990 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_GET_INFO);
3991 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->pd_info_h);
3992 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_PD_INFO));
3993
3994 if (instance->ctrl_context && !instance->mask_interrupts)
3995 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
3996 else
3997 ret = megasas_issue_polled(instance, cmd);
3998
3999 switch (ret) {
4000 case DCMD_SUCCESS:
4001 instance->pd_list[device_id].interface =
4002 instance->pd_info->state.ddf.pdType.intf;
4003 break;
4004
4005 case DCMD_TIMEOUT:
4006
4007 switch (dcmd_timeout_ocr_possible(instance)) {
4008 case INITIATE_OCR:
4009 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4010 megasas_reset_fusion(instance->host,
4011 MFI_IO_TIMEOUT_OCR);
4012 break;
4013 case KILL_ADAPTER:
4014 megaraid_sas_kill_hba(instance);
4015 break;
4016 case IGNORE_TIMEOUT:
4017 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4018 __func__, __LINE__);
4019 break;
4020 }
4021
4022 break;
4023 }
4024
4025 if (ret != DCMD_TIMEOUT)
4026 megasas_return_cmd(instance, cmd);
4027
4028 return ret;
4029}
81e403ce
YB
4030/*
4031 * megasas_get_pd_list_info - Returns FW's pd_list structure
4032 * @instance: Adapter soft state
4033 * @pd_list: pd_list structure
4034 *
4035 * Issues an internal command (DCMD) to get the FW's controller PD
4036 * list structure. This information is mainly used to find out SYSTEM
4037 * supported by the FW.
4038 */
4039static int
4040megasas_get_pd_list(struct megasas_instance *instance)
4041{
4042 int ret = 0, pd_index = 0;
4043 struct megasas_cmd *cmd;
4044 struct megasas_dcmd_frame *dcmd;
4045 struct MR_PD_LIST *ci;
4046 struct MR_PD_ADDRESS *pd_addr;
4047 dma_addr_t ci_h = 0;
4048
4049 cmd = megasas_get_cmd(instance);
4050
4051 if (!cmd) {
1be18254 4052 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB
4053 return -ENOMEM;
4054 }
4055
4056 dcmd = &cmd->frame->dcmd;
4057
4058 ci = pci_alloc_consistent(instance->pdev,
4059 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
4060
4061 if (!ci) {
1be18254 4062 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB
4063 megasas_return_cmd(instance, cmd);
4064 return -ENOMEM;
4065 }
4066
4067 memset(ci, 0, sizeof(*ci));
4068 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4069
4070 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
4071 dcmd->mbox.b[1] = 0;
4072 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4073 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 4074 dcmd->sge_count = 1;
94cd65dd 4075 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 4076 dcmd->timeout = 0;
780a3762 4077 dcmd->pad_0 = 0;
94cd65dd
SS
4078 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
4079 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
4080 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4081 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 4082
90dc9d98
SS
4083 if (instance->ctrl_context && !instance->mask_interrupts)
4084 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4085 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4086 else
4087 ret = megasas_issue_polled(instance, cmd);
81e403ce 4088
6d40afbc
SS
4089 switch (ret) {
4090 case DCMD_FAILED:
30845586
SS
4091 dev_info(&instance->pdev->dev, "MR_DCMD_PD_LIST_QUERY "
4092 "failed/not supported by firmware\n");
4093
4094 if (instance->ctrl_context)
4095 megaraid_sas_kill_hba(instance);
4096 else
4097 instance->pd_list_not_supported = 1;
6d40afbc
SS
4098 break;
4099 case DCMD_TIMEOUT:
81e403ce 4100
6d40afbc
SS
4101 switch (dcmd_timeout_ocr_possible(instance)) {
4102 case INITIATE_OCR:
4103 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4104 /*
4105 * DCMD failed from AEN path.
4106 * AEN path already hold reset_mutex to avoid PCI access
4107 * while OCR is in progress.
4108 */
4109 mutex_unlock(&instance->reset_mutex);
4110 megasas_reset_fusion(instance->host,
4111 MFI_IO_TIMEOUT_OCR);
4112 mutex_lock(&instance->reset_mutex);
4113 break;
4114 case KILL_ADAPTER:
4115 megaraid_sas_kill_hba(instance);
4116 break;
4117 case IGNORE_TIMEOUT:
4118 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d \n",
4119 __func__, __LINE__);
4120 break;
4121 }
81e403ce 4122
6d40afbc
SS
4123 break;
4124
4125 case DCMD_SUCCESS:
4126 pd_addr = ci->addr;
4127
4128 if ((le32_to_cpu(ci->count) >
4129 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL)))
4130 break;
81e403ce 4131
999ece0a 4132 memset(instance->local_pd_list, 0,
6d40afbc 4133 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
81e403ce 4134
94cd65dd 4135 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
999ece0a 4136 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
6d40afbc 4137 le16_to_cpu(pd_addr->deviceId);
999ece0a 4138 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
6d40afbc 4139 pd_addr->scsiDevType;
999ece0a 4140 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
6d40afbc 4141 MR_PD_STATE_SYSTEM;
81e403ce
YB
4142 pd_addr++;
4143 }
6d40afbc 4144
999ece0a
SS
4145 memcpy(instance->pd_list, instance->local_pd_list,
4146 sizeof(instance->pd_list));
6d40afbc
SS
4147 break;
4148
81e403ce
YB
4149 }
4150
4151 pci_free_consistent(instance->pdev,
4152 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
4153 ci, ci_h);
90dc9d98 4154
6d40afbc
SS
4155 if (ret != DCMD_TIMEOUT)
4156 megasas_return_cmd(instance, cmd);
81e403ce
YB
4157
4158 return ret;
4159}
4160
bdc6fb8d
YB
4161/*
4162 * megasas_get_ld_list_info - Returns FW's ld_list structure
4163 * @instance: Adapter soft state
4164 * @ld_list: ld_list structure
4165 *
4166 * Issues an internal command (DCMD) to get the FW's controller PD
4167 * list structure. This information is mainly used to find out SYSTEM
4168 * supported by the FW.
4169 */
4170static int
4171megasas_get_ld_list(struct megasas_instance *instance)
4172{
4173 int ret = 0, ld_index = 0, ids = 0;
4174 struct megasas_cmd *cmd;
4175 struct megasas_dcmd_frame *dcmd;
4176 struct MR_LD_LIST *ci;
4177 dma_addr_t ci_h = 0;
94cd65dd 4178 u32 ld_count;
bdc6fb8d
YB
4179
4180 cmd = megasas_get_cmd(instance);
4181
4182 if (!cmd) {
1be18254 4183 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB
4184 return -ENOMEM;
4185 }
4186
4187 dcmd = &cmd->frame->dcmd;
4188
4189 ci = pci_alloc_consistent(instance->pdev,
4190 sizeof(struct MR_LD_LIST),
4191 &ci_h);
4192
4193 if (!ci) {
1be18254 4194 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB
4195 megasas_return_cmd(instance, cmd);
4196 return -ENOMEM;
4197 }
4198
4199 memset(ci, 0, sizeof(*ci));
4200 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4201
51087a86
SS
4202 if (instance->supportmax256vd)
4203 dcmd->mbox.b[0] = 1;
bdc6fb8d 4204 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4205 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 4206 dcmd->sge_count = 1;
94cd65dd 4207 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 4208 dcmd->timeout = 0;
94cd65dd
SS
4209 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
4210 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
4211 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4212 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB
4213 dcmd->pad_0 = 0;
4214
90dc9d98
SS
4215 if (instance->ctrl_context && !instance->mask_interrupts)
4216 ret = megasas_issue_blocked_cmd(instance, cmd,
6d40afbc 4217 MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4218 else
4219 ret = megasas_issue_polled(instance, cmd);
4220
94cd65dd
SS
4221 ld_count = le32_to_cpu(ci->ldCount);
4222
6d40afbc
SS
4223 switch (ret) {
4224 case DCMD_FAILED:
4225 megaraid_sas_kill_hba(instance);
4226 break;
4227 case DCMD_TIMEOUT:
4228
4229 switch (dcmd_timeout_ocr_possible(instance)) {
4230 case INITIATE_OCR:
4231 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4232 /*
4233 * DCMD failed from AEN path.
4234 * AEN path already hold reset_mutex to avoid PCI access
4235 * while OCR is in progress.
4236 */
4237 mutex_unlock(&instance->reset_mutex);
4238 megasas_reset_fusion(instance->host,
4239 MFI_IO_TIMEOUT_OCR);
4240 mutex_lock(&instance->reset_mutex);
4241 break;
4242 case KILL_ADAPTER:
4243 megaraid_sas_kill_hba(instance);
4244 break;
4245 case IGNORE_TIMEOUT:
4246 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4247 __func__, __LINE__);
4248 break;
4249 }
4250
4251 break;
4252
4253 case DCMD_SUCCESS:
4254 if (ld_count > instance->fw_supported_vd_count)
4255 break;
bdc6fb8d 4256
51087a86 4257 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4258
94cd65dd 4259 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB
4260 if (ci->ldList[ld_index].state != 0) {
4261 ids = ci->ldList[ld_index].ref.targetId;
6d40afbc 4262 instance->ld_ids[ids] = ci->ldList[ld_index].ref.targetId;
bdc6fb8d
YB
4263 }
4264 }
6d40afbc
SS
4265
4266 break;
bdc6fb8d
YB
4267 }
4268
6d40afbc
SS
4269 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_LIST), ci, ci_h);
4270
4271 if (ret != DCMD_TIMEOUT)
4272 megasas_return_cmd(instance, cmd);
bdc6fb8d 4273
bdc6fb8d
YB
4274 return ret;
4275}
4276
21c9e160 4277/**
4278 * megasas_ld_list_query - Returns FW's ld_list structure
4279 * @instance: Adapter soft state
4280 * @ld_list: ld_list structure
4281 *
4282 * Issues an internal command (DCMD) to get the FW's controller PD
4283 * list structure. This information is mainly used to find out SYSTEM
4284 * supported by the FW.
4285 */
4286static int
4287megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4288{
4289 int ret = 0, ld_index = 0, ids = 0;
4290 struct megasas_cmd *cmd;
4291 struct megasas_dcmd_frame *dcmd;
4292 struct MR_LD_TARGETID_LIST *ci;
4293 dma_addr_t ci_h = 0;
94cd65dd 4294 u32 tgtid_count;
21c9e160 4295
4296 cmd = megasas_get_cmd(instance);
4297
4298 if (!cmd) {
1be18254
BH
4299 dev_warn(&instance->pdev->dev,
4300 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160 4301 return -ENOMEM;
4302 }
4303
4304 dcmd = &cmd->frame->dcmd;
4305
4306 ci = pci_alloc_consistent(instance->pdev,
4307 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4308
4309 if (!ci) {
1be18254
BH
4310 dev_warn(&instance->pdev->dev,
4311 "Failed to alloc mem for ld_list_query\n");
21c9e160 4312 megasas_return_cmd(instance, cmd);
4313 return -ENOMEM;
4314 }
4315
4316 memset(ci, 0, sizeof(*ci));
4317 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4318
4319 dcmd->mbox.b[0] = query_type;
51087a86
SS
4320 if (instance->supportmax256vd)
4321 dcmd->mbox.b[2] = 1;
21c9e160 4322
4323 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4324 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4325 dcmd->sge_count = 1;
94cd65dd 4326 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4327 dcmd->timeout = 0;
94cd65dd
SS
4328 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4329 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4330 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4331 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160 4332 dcmd->pad_0 = 0;
4333
90dc9d98 4334 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4335 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4336 else
4337 ret = megasas_issue_polled(instance, cmd);
21c9e160 4338
6d40afbc
SS
4339 switch (ret) {
4340 case DCMD_FAILED:
4341 dev_info(&instance->pdev->dev,
4342 "DCMD not supported by firmware - %s %d\n",
4343 __func__, __LINE__);
4344 ret = megasas_get_ld_list(instance);
4345 break;
4346 case DCMD_TIMEOUT:
4347 switch (dcmd_timeout_ocr_possible(instance)) {
4348 case INITIATE_OCR:
4349 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4350 /*
4351 * DCMD failed from AEN path.
4352 * AEN path already hold reset_mutex to avoid PCI access
4353 * while OCR is in progress.
4354 */
4355 mutex_unlock(&instance->reset_mutex);
4356 megasas_reset_fusion(instance->host,
4357 MFI_IO_TIMEOUT_OCR);
4358 mutex_lock(&instance->reset_mutex);
4359 break;
4360 case KILL_ADAPTER:
4361 megaraid_sas_kill_hba(instance);
4362 break;
4363 case IGNORE_TIMEOUT:
4364 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4365 __func__, __LINE__);
4366 break;
4367 }
4368
4369 break;
4370 case DCMD_SUCCESS:
4371 tgtid_count = le32_to_cpu(ci->count);
4372
4373 if ((tgtid_count > (instance->fw_supported_vd_count)))
4374 break;
94cd65dd 4375
21c9e160 4376 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4377 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160 4378 ids = ci->targetId[ld_index];
4379 instance->ld_ids[ids] = ci->targetId[ld_index];
4380 }
4381
6d40afbc 4382 break;
21c9e160 4383 }
4384
4385 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
6d40afbc 4386 ci, ci_h);
21c9e160 4387
6d40afbc
SS
4388 if (ret != DCMD_TIMEOUT)
4389 megasas_return_cmd(instance, cmd);
21c9e160 4390
4391 return ret;
4392}
4393
d009b576
SS
4394/*
4395 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4396 * instance : Controller's instance
4397*/
4398static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4399{
4400 struct fusion_context *fusion;
4401 u32 old_map_sz;
4402 u32 new_map_sz;
4403
4404 fusion = instance->ctrl_context;
4405 /* For MFI based controllers return dummy success */
4406 if (!fusion)
4407 return;
4408
4409 instance->supportmax256vd =
4410 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4411 /* Below is additional check to address future FW enhancement */
4412 if (instance->ctrl_info->max_lds > 64)
4413 instance->supportmax256vd = 1;
4414
4415 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4416 * MEGASAS_MAX_DEV_PER_CHANNEL;
4417 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4418 * MEGASAS_MAX_DEV_PER_CHANNEL;
4419 if (instance->supportmax256vd) {
4420 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4421 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4422 } else {
4423 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4424 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4425 }
d88da09a
SS
4426
4427 dev_info(&instance->pdev->dev,
4428 "firmware type\t: %s\n",
4429 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4430 "Legacy(64 VD) firmware");
d009b576 4431
da0dc9fb 4432 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
d009b576
SS
4433 (sizeof(struct MR_LD_SPAN_MAP) *
4434 (instance->fw_supported_vd_count - 1));
da0dc9fb
BH
4435 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4436 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
d009b576
SS
4437 (sizeof(struct MR_LD_SPAN_MAP) *
4438 (instance->drv_supported_vd_count - 1));
4439
4440 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4441
4442
4443 if (instance->supportmax256vd)
4444 fusion->current_map_sz = new_map_sz;
4445 else
4446 fusion->current_map_sz = old_map_sz;
d009b576
SS
4447}
4448
c4a3e0a5
BS
4449/**
4450 * megasas_get_controller_info - Returns FW's controller structure
4451 * @instance: Adapter soft state
c4a3e0a5
BS
4452 *
4453 * Issues an internal command (DCMD) to get the FW's controller structure.
4454 * This information is mainly used to find out the maximum IO transfer per
4455 * command supported by the FW.
4456 */
51087a86 4457int
d009b576 4458megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS
4459{
4460 int ret = 0;
4461 struct megasas_cmd *cmd;
4462 struct megasas_dcmd_frame *dcmd;
4463 struct megasas_ctrl_info *ci;
d009b576 4464 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS
4465 dma_addr_t ci_h = 0;
4466
d009b576
SS
4467 ctrl_info = instance->ctrl_info;
4468
c4a3e0a5
BS
4469 cmd = megasas_get_cmd(instance);
4470
4471 if (!cmd) {
1be18254 4472 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS
4473 return -ENOMEM;
4474 }
4475
4476 dcmd = &cmd->frame->dcmd;
4477
4478 ci = pci_alloc_consistent(instance->pdev,
4479 sizeof(struct megasas_ctrl_info), &ci_h);
4480
4481 if (!ci) {
1be18254 4482 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS
4483 megasas_return_cmd(instance, cmd);
4484 return -ENOMEM;
4485 }
4486
4487 memset(ci, 0, sizeof(*ci));
4488 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4489
4490 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4491 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4492 dcmd->sge_count = 1;
94cd65dd 4493 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4494 dcmd->timeout = 0;
780a3762 4495 dcmd->pad_0 = 0;
94cd65dd
SS
4496 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4497 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4498 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4499 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4500 dcmd->mbox.b[0] = 1;
c4a3e0a5 4501
90dc9d98 4502 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4503 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
90dc9d98
SS
4504 else
4505 ret = megasas_issue_polled(instance, cmd);
4506
6d40afbc
SS
4507 switch (ret) {
4508 case DCMD_SUCCESS:
c4a3e0a5 4509 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
6d40afbc
SS
4510 /* Save required controller information in
4511 * CPU endianness format.
4512 */
d009b576
SS
4513 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4514 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4515 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
6d40afbc
SS
4516
4517 /* Update the latest Ext VD info.
4518 * From Init path, store current firmware details.
4519 * From OCR path, detect any firmware properties changes.
4520 * in case of Firmware upgrade without system reboot.
4521 */
d009b576 4522 megasas_update_ext_vd_details(instance);
3761cb4c 4523 instance->use_seqnum_jbod_fp =
4524 ctrl_info->adapterOperations3.useSeqNumJbodFP;
6d40afbc
SS
4525
4526 /*Check whether controller is iMR or MR */
4026e9aa
SS
4527 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4528 dev_info(&instance->pdev->dev,
6d40afbc
SS
4529 "controller type\t: %s(%dMB)\n",
4530 instance->is_imr ? "iMR" : "MR",
4531 le16_to_cpu(ctrl_info->memory_size));
4532
c4bd2654 4533 instance->disableOnlineCtrlReset =
4534 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
3222251d 4535 instance->secure_jbod_support =
4536 ctrl_info->adapterOperations3.supportSecurityonJBOD;
6d40afbc
SS
4537 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4538 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4539 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4540 instance->secure_jbod_support ? "Yes" : "No");
6d40afbc
SS
4541 break;
4542
4543 case DCMD_TIMEOUT:
4544 switch (dcmd_timeout_ocr_possible(instance)) {
4545 case INITIATE_OCR:
4546 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4547 megasas_reset_fusion(instance->host,
4548 MFI_IO_TIMEOUT_OCR);
4549 break;
4550 case KILL_ADAPTER:
4551 megaraid_sas_kill_hba(instance);
4552 break;
4553 case IGNORE_TIMEOUT:
4554 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4555 __func__, __LINE__);
4556 break;
4557 }
4558 case DCMD_FAILED:
4559 megaraid_sas_kill_hba(instance);
4560 break;
4561
d009b576 4562 }
c4a3e0a5
BS
4563
4564 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4565 ci, ci_h);
4566
4026e9aa 4567 megasas_return_cmd(instance, cmd);
6d40afbc
SS
4568
4569
c4a3e0a5
BS
4570 return ret;
4571}
4572
fc62b3fc
SS
4573/*
4574 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4575 * to firmware
4576 *
4577 * @instance: Adapter soft state
4578 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4579 MR_CRASH_BUF_TURN_OFF = 0
4580 MR_CRASH_BUF_TURN_ON = 1
4581 * @return 0 on success non-zero on failure.
4582 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4583 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4584 * that driver supports crash dump feature. This DCMD will be sent only if
4585 * crash dump feature is supported by the FW.
4586 *
4587 */
4588int megasas_set_crash_dump_params(struct megasas_instance *instance,
4589 u8 crash_buf_state)
4590{
4591 int ret = 0;
4592 struct megasas_cmd *cmd;
4593 struct megasas_dcmd_frame *dcmd;
4594
4595 cmd = megasas_get_cmd(instance);
4596
4597 if (!cmd) {
4598 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4599 return -ENOMEM;
4600 }
4601
4602
4603 dcmd = &cmd->frame->dcmd;
4604
4605 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4606 dcmd->mbox.b[0] = crash_buf_state;
4607 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4608 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS
4609 dcmd->sge_count = 1;
4610 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4611 dcmd->timeout = 0;
4612 dcmd->pad_0 = 0;
4613 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4614 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4615 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4616 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4617
90dc9d98 4618 if (instance->ctrl_context && !instance->mask_interrupts)
6d40afbc 4619 ret = megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS);
fc62b3fc 4620 else
90dc9d98
SS
4621 ret = megasas_issue_polled(instance, cmd);
4622
6d40afbc
SS
4623 if (ret == DCMD_TIMEOUT) {
4624 switch (dcmd_timeout_ocr_possible(instance)) {
4625 case INITIATE_OCR:
4626 cmd->flags |= DRV_DCMD_SKIP_REFIRE;
4627 megasas_reset_fusion(instance->host,
4628 MFI_IO_TIMEOUT_OCR);
4629 break;
4630 case KILL_ADAPTER:
4631 megaraid_sas_kill_hba(instance);
4632 break;
4633 case IGNORE_TIMEOUT:
4634 dev_info(&instance->pdev->dev, "Ignore DCMD timeout: %s %d\n",
4635 __func__, __LINE__);
4636 break;
4637 }
4638 } else
4639 megasas_return_cmd(instance, cmd);
4640
fc62b3fc
SS
4641 return ret;
4642}
4643
31ea7088 4644/**
4645 * megasas_issue_init_mfi - Initializes the FW
4646 * @instance: Adapter soft state
4647 *
4648 * Issues the INIT MFI cmd
4649 */
4650static int
4651megasas_issue_init_mfi(struct megasas_instance *instance)
4652{
9ab9ed38 4653 __le32 context;
31ea7088 4654 struct megasas_cmd *cmd;
31ea7088 4655 struct megasas_init_frame *init_frame;
4656 struct megasas_init_queue_info *initq_info;
4657 dma_addr_t init_frame_h;
4658 dma_addr_t initq_info_h;
4659
4660 /*
4661 * Prepare a init frame. Note the init frame points to queue info
4662 * structure. Each frame has SGL allocated after first 64 bytes. For
4663 * this frame - since we don't need any SGL - we use SGL's space as
4664 * queue info structure
4665 *
4666 * We will not get a NULL command below. We just created the pool.
4667 */
4668 cmd = megasas_get_cmd(instance);
4669
4670 init_frame = (struct megasas_init_frame *)cmd->frame;
4671 initq_info = (struct megasas_init_queue_info *)
4672 ((unsigned long)init_frame + 64);
4673
4674 init_frame_h = cmd->frame_phys_addr;
4675 initq_info_h = init_frame_h + 64;
4676
4677 context = init_frame->context;
4678 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4679 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4680 init_frame->context = context;
4681
94cd65dd
SS
4682 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4683 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4684
94cd65dd
SS
4685 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4686 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4687
4688 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4689 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS
4690 init_frame->queue_info_new_phys_addr_lo =
4691 cpu_to_le32(lower_32_bits(initq_info_h));
4692 init_frame->queue_info_new_phys_addr_hi =
4693 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4694
94cd65dd 4695 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4696
4697 /*
4698 * disable the intr before firing the init frame to FW
4699 */
d46a3ad6 4700 instance->instancet->disable_intr(instance);
31ea7088 4701
4702 /*
4703 * Issue the init frame in polled mode
4704 */
4705
4706 if (megasas_issue_polled(instance, cmd)) {
1be18254 4707 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4708 megasas_return_cmd(instance, cmd);
4709 goto fail_fw_init;
4710 }
4711
4712 megasas_return_cmd(instance, cmd);
4713
4714 return 0;
4715
4716fail_fw_init:
4717 return -EINVAL;
4718}
4719
cd50ba8e 4720static u32
4721megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4722{
cd50ba8e 4723 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS
4724 u32 context_sz;
4725 u32 reply_q_sz;
c4a3e0a5
BS
4726
4727 reg_set = instance->reg_set;
4728
c4a3e0a5
BS
4729 /*
4730 * Get various operational parameters from status register
4731 */
1341c939 4732 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP
4733 /*
4734 * Reduce the max supported cmds by 1. This is to ensure that the
4735 * reply_q_sz (1 more than the max cmd that driver may send)
4736 * does not exceed max cmds that the FW can support
4737 */
4738 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4739 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4740 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4741 0x10;
f26ac3a1
SS
4742 /*
4743 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4744 * are reserved for IOCTL + driver's internal DCMDs.
4745 */
4746 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4747 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4748 instance->max_scsi_cmds = (instance->max_fw_cmds -
4749 MEGASAS_SKINNY_INT_CMDS);
4750 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4751 } else {
4752 instance->max_scsi_cmds = (instance->max_fw_cmds -
4753 MEGASAS_INT_CMDS);
4754 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4755 }
4756
308ec459 4757 instance->cur_can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS
4758 /*
4759 * Create a pool of commands
4760 */
4761 if (megasas_alloc_cmds(instance))
4762 goto fail_alloc_cmds;
4763
4764 /*
4765 * Allocate memory for reply queue. Length of reply queue should
4766 * be _one_ more than the maximum commands handled by the firmware.
4767 *
4768 * Note: When FW completes commands, it places corresponding contex
4769 * values in this circular reply queue. This circular queue is a fairly
4770 * typical producer-consumer queue. FW is the producer (of completed
4771 * commands) and the driver is the consumer.
4772 */
4773 context_sz = sizeof(u32);
4774 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4775
4776 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4777 reply_q_sz,
4778 &instance->reply_queue_h);
4779
4780 if (!instance->reply_queue) {
1be18254 4781 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS
4782 goto fail_reply_queue;
4783 }
4784
31ea7088 4785 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4786 goto fail_fw_init;
c4a3e0a5 4787
d009b576 4788 if (megasas_get_ctrl_info(instance)) {
51087a86
SS
4789 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4790 "Fail from %s %d\n", instance->unique_id,
4791 __func__, __LINE__);
4792 goto fail_fw_init;
4793 }
4794
39a98554 4795 instance->fw_support_ieee = 0;
4796 instance->fw_support_ieee =
4797 (instance->instancet->read_fw_status_reg(reg_set) &
4798 0x04000000);
4799
1be18254 4800 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4801 instance->fw_support_ieee);
4802
4803 if (instance->fw_support_ieee)
4804 instance->flag_ieee = 1;
4805
cd50ba8e 4806 return 0;
4807
4808fail_fw_init:
4809
4810 pci_free_consistent(instance->pdev, reply_q_sz,
4811 instance->reply_queue, instance->reply_queue_h);
4812fail_reply_queue:
4813 megasas_free_cmds(instance);
4814
4815fail_alloc_cmds:
cd50ba8e 4816 return 1;
4817}
4818
d3557fc8
SS
4819/*
4820 * megasas_setup_irqs_msix - register legacy interrupts.
4821 * @instance: Adapter soft state
4822 *
4823 * Do not enable interrupt, only setup ISRs.
4824 *
4825 * Return 0 on success.
4826 */
4827static int
4828megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4829{
4830 struct pci_dev *pdev;
4831
4832 pdev = instance->pdev;
4833 instance->irq_context[0].instance = instance;
4834 instance->irq_context[0].MSIxIndex = 0;
4835 if (request_irq(pdev->irq, instance->instancet->service_isr,
4836 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4837 dev_err(&instance->pdev->dev,
4838 "Failed to register IRQ from %s %d\n",
4839 __func__, __LINE__);
4840 return -1;
4841 }
4842 return 0;
4843}
4844
4845/**
4846 * megasas_setup_irqs_msix - register MSI-x interrupts.
4847 * @instance: Adapter soft state
4848 * @is_probe: Driver probe check
4849 *
4850 * Do not enable interrupt, only setup ISRs.
4851 *
4852 * Return 0 on success.
4853 */
4854static int
4855megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4856{
4857 int i, j, cpu;
4858 struct pci_dev *pdev;
4859
4860 pdev = instance->pdev;
4861
4862 /* Try MSI-x */
4863 cpu = cpumask_first(cpu_online_mask);
4864 for (i = 0; i < instance->msix_vectors; i++) {
4865 instance->irq_context[i].instance = instance;
4866 instance->irq_context[i].MSIxIndex = i;
4867 if (request_irq(instance->msixentry[i].vector,
4868 instance->instancet->service_isr, 0, "megasas",
4869 &instance->irq_context[i])) {
4870 dev_err(&instance->pdev->dev,
4871 "Failed to register IRQ for vector %d.\n", i);
4872 for (j = 0; j < i; j++) {
4873 if (smp_affinity_enable)
4874 irq_set_affinity_hint(
4875 instance->msixentry[j].vector, NULL);
4876 free_irq(instance->msixentry[j].vector,
4877 &instance->irq_context[j]);
4878 }
4879 /* Retry irq register for IO_APIC*/
4880 instance->msix_vectors = 0;
4881 if (is_probe)
4882 return megasas_setup_irqs_ioapic(instance);
4883 else
4884 return -1;
4885 }
4886 if (smp_affinity_enable) {
4887 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4888 get_cpu_mask(cpu)))
4889 dev_err(&instance->pdev->dev,
4890 "Failed to set affinity hint"
4891 " for cpu %d\n", cpu);
4892 cpu = cpumask_next(cpu, cpu_online_mask);
4893 }
4894 }
4895 return 0;
4896}
4897
4898/*
4899 * megasas_destroy_irqs- unregister interrupts.
4900 * @instance: Adapter soft state
4901 * return: void
4902 */
4903static void
4904megasas_destroy_irqs(struct megasas_instance *instance) {
4905
4906 int i;
4907
4908 if (instance->msix_vectors)
4909 for (i = 0; i < instance->msix_vectors; i++) {
4910 if (smp_affinity_enable)
4911 irq_set_affinity_hint(
4912 instance->msixentry[i].vector, NULL);
4913 free_irq(instance->msixentry[i].vector,
4914 &instance->irq_context[i]);
4915 }
4916 else
4917 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4918}
4919
3761cb4c 4920/**
4921 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
4922 * @instance: Adapter soft state
4923 * @is_probe: Driver probe check
4924 *
4925 * Return 0 on success.
4926 */
4927void
4928megasas_setup_jbod_map(struct megasas_instance *instance)
4929{
4930 int i;
4931 struct fusion_context *fusion = instance->ctrl_context;
4932 u32 pd_seq_map_sz;
4933
4934 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
4935 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
4936
4937 if (reset_devices || !fusion ||
4938 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
4939 dev_info(&instance->pdev->dev,
4940 "Jbod map is not supported %s %d\n",
4941 __func__, __LINE__);
4942 instance->use_seqnum_jbod_fp = false;
4943 return;
4944 }
4945
4946 if (fusion->pd_seq_sync[0])
4947 goto skip_alloc;
4948
4949 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
4950 fusion->pd_seq_sync[i] = dma_alloc_coherent
4951 (&instance->pdev->dev, pd_seq_map_sz,
4952 &fusion->pd_seq_phys[i], GFP_KERNEL);
4953 if (!fusion->pd_seq_sync[i]) {
4954 dev_err(&instance->pdev->dev,
4955 "Failed to allocate memory from %s %d\n",
4956 __func__, __LINE__);
4957 if (i == 1) {
4958 dma_free_coherent(&instance->pdev->dev,
4959 pd_seq_map_sz, fusion->pd_seq_sync[0],
4960 fusion->pd_seq_phys[0]);
4961 fusion->pd_seq_sync[0] = NULL;
4962 }
4963 instance->use_seqnum_jbod_fp = false;
4964 return;
4965 }
4966 }
4967
4968skip_alloc:
4969 if (!megasas_sync_pd_seq_num(instance, false) &&
4970 !megasas_sync_pd_seq_num(instance, true))
4971 instance->use_seqnum_jbod_fp = true;
4972 else
4973 instance->use_seqnum_jbod_fp = false;
4974}
4975
cd50ba8e 4976/**
4977 * megasas_init_fw - Initializes the FW
4978 * @instance: Adapter soft state
4979 *
4980 * This is the main function for initializing firmware
4981 */
4982
4983static int megasas_init_fw(struct megasas_instance *instance)
4984{
4985 u32 max_sectors_1;
4986 u32 max_sectors_2;
d46a3ad6 4987 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4988 resource_size_t base_addr;
cd50ba8e 4989 struct megasas_register_set __iomem *reg_set;
51087a86 4990 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4991 unsigned long bar_list;
d46a3ad6 4992 int i, loop, fw_msix_count = 0;
229fe47c 4993 struct IOV_111 *iovPtr;
5a8cb85b 4994 struct fusion_context *fusion;
4995
4996 fusion = instance->ctrl_context;
cd50ba8e 4997
4998 /* Find first memory bar */
4999 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
5000 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e 5001 if (pci_request_selected_regions(instance->pdev, instance->bar,
5002 "megasas: LSI")) {
1be18254 5003 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e 5004 return -EBUSY;
5005 }
5006
11f8a7b3
BC
5007 base_addr = pci_resource_start(instance->pdev, instance->bar);
5008 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e 5009
5010 if (!instance->reg_set) {
1be18254 5011 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e 5012 goto fail_ioremap;
5013 }
5014
5015 reg_set = instance->reg_set;
5016
5017 switch (instance->pdev->device) {
9c915a8c 5018 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5019 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5020 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5021 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 5022 case PCI_DEVICE_ID_LSI_INTRUDER:
5023 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 5024 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5025 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 5026 instance->instancet = &megasas_instance_template_fusion;
5027 break;
cd50ba8e 5028 case PCI_DEVICE_ID_LSI_SAS1078R:
5029 case PCI_DEVICE_ID_LSI_SAS1078DE:
5030 instance->instancet = &megasas_instance_template_ppc;
5031 break;
5032 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
5033 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
5034 instance->instancet = &megasas_instance_template_gen2;
5035 break;
5036 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
5037 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
5038 instance->instancet = &megasas_instance_template_skinny;
5039 break;
5040 case PCI_DEVICE_ID_LSI_SAS1064R:
5041 case PCI_DEVICE_ID_DELL_PERC5:
5042 default:
5043 instance->instancet = &megasas_instance_template_xscale;
5044 break;
5045 }
5046
6431f5d7
SS
5047 if (megasas_transition_to_ready(instance, 0)) {
5048 atomic_set(&instance->fw_reset_no_pci_access, 1);
5049 instance->instancet->adp_reset
5050 (instance, instance->reg_set);
5051 atomic_set(&instance->fw_reset_no_pci_access, 0);
5052 dev_info(&instance->pdev->dev,
1be18254 5053 "FW restarted successfully from %s!\n",
6431f5d7
SS
5054 __func__);
5055
5056 /*waitting for about 30 second before retry*/
5057 ssleep(30);
5058
5059 if (megasas_transition_to_ready(instance, 0))
5060 goto fail_ready_state;
5061 }
cd50ba8e 5062
d46a3ad6
SS
5063 /*
5064 * MSI-X host index 0 is common for all adapter.
5065 * It is used for all MPT based Adapters.
5066 */
5067 instance->reply_post_host_index_addr[0] =
8a232bb3 5068 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS
5069 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
5070
3f1abce4 5071 /* Check if MSI-X is supported while in ready state */
5072 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
5073 0x4000000) >> 0x1a;
c8e858fe 5074 if (msix_enable && !msix_disable) {
d46a3ad6
SS
5075 scratch_pad_2 = readl
5076 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 5077 /* Check max MSI-X vectors */
5a8cb85b 5078 if (fusion) {
5079 if (fusion->adapter_type == THUNDERBOLT_SERIES) { /* Thunderbolt Series*/
5080 instance->msix_vectors = (scratch_pad_2
5081 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
5082 fw_msix_count = instance->msix_vectors;
5083 } else { /* Invader series supports more than 8 MSI-x vectors*/
5084 instance->msix_vectors = ((scratch_pad_2
5085 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
5086 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
179ac142
SS
5087 if (rdpq_enable)
5088 instance->is_rdpq = (scratch_pad_2 & MR_RDPQ_MODE_OFFSET) ?
5089 1 : 0;
5a8cb85b 5090 fw_msix_count = instance->msix_vectors;
5091 /* Save 1-15 reply post index address to local memory
5092 * Index 0 is already saved from reg offset
5093 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
5094 */
5095 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
5096 instance->reply_post_host_index_addr[loop] =
5097 (u32 __iomem *)
5098 ((u8 __iomem *)instance->reg_set +
5099 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
5100 + (loop * 0x10));
5101 }
d46a3ad6
SS
5102 }
5103 if (msix_vectors)
5104 instance->msix_vectors = min(msix_vectors,
5105 instance->msix_vectors);
5a8cb85b 5106 } else /* MFI adapters */
c8e858fe 5107 instance->msix_vectors = 1;
5108 /* Don't bother allocating more MSI-X vectors than cpus */
5109 instance->msix_vectors = min(instance->msix_vectors,
5110 (unsigned int)num_online_cpus());
5111 for (i = 0; i < instance->msix_vectors; i++)
5112 instance->msixentry[i].entry = i;
8ae80ed1
AG
5113 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
5114 1, instance->msix_vectors);
c12de882 5115 if (i > 0)
8ae80ed1
AG
5116 instance->msix_vectors = i;
5117 else
c8e858fe 5118 instance->msix_vectors = 0;
5119 }
3f1abce4 5120
258c3af2
TH
5121 dev_info(&instance->pdev->dev,
5122 "firmware supports msix\t: (%d)", fw_msix_count);
5123 dev_info(&instance->pdev->dev,
5124 "current msix/online cpus\t: (%d/%d)\n",
5125 instance->msix_vectors, (unsigned int)num_online_cpus());
179ac142
SS
5126 dev_info(&instance->pdev->dev,
5127 "RDPQ mode\t: (%s)\n", instance->is_rdpq ? "enabled" : "disabled");
d3557fc8 5128
91626c27 5129 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5130 (unsigned long)instance);
5131
258c3af2
TH
5132 if (instance->msix_vectors ?
5133 megasas_setup_irqs_msix(instance, 1) :
5134 megasas_setup_irqs_ioapic(instance))
5135 goto fail_setup_irqs;
3f1abce4 5136
51087a86
SS
5137 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
5138 GFP_KERNEL);
5139 if (instance->ctrl_info == NULL)
5140 goto fail_init_adapter;
5141
5142 /*
5143 * Below are default value for legacy Firmware.
5144 * non-fusion based controllers
5145 */
5146 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
5147 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e 5148 /* Get operational params, sge flags, send init cmd to controller */
5149 if (instance->instancet->init_adapter(instance))
eb1b1237 5150 goto fail_init_adapter;
cd50ba8e 5151
258c3af2 5152
d3557fc8 5153 instance->instancet->enable_intr(instance);
cd50ba8e 5154
1be18254 5155 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 5156
3761cb4c 5157 megasas_setup_jbod_map(instance);
5158
39a98554 5159 /** for passthrough
da0dc9fb
BH
5160 * the following function will get the PD LIST.
5161 */
5162 memset(instance->pd_list, 0,
81e403ce 5163 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 5164 if (megasas_get_pd_list(instance) < 0) {
1be18254 5165 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 5166 goto fail_get_pd_list;
58968fc8 5167 }
81e403ce 5168
bdc6fb8d 5169 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160 5170 if (megasas_ld_list_query(instance,
5171 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
5172 megasas_get_ld_list(instance);
bdc6fb8d 5173
c4a3e0a5
BS
5174 /*
5175 * Compute the max allowed sectors per IO: The controller info has two
5176 * limits on max sectors. Driver should use the minimum of these two.
5177 *
5178 * 1 << stripe_sz_ops.min = max sectors per strip
5179 *
5180 * Note that older firmwares ( < FW ver 30) didn't report information
5181 * to calculate max_sectors_1. So the number ended up as zero always.
5182 */
14faea9f 5183 tmp_sectors = 0;
51087a86 5184 ctrl_info = instance->ctrl_info;
c4a3e0a5 5185
51087a86
SS
5186 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
5187 le16_to_cpu(ctrl_info->max_strips_per_io);
5188 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 5189
da0dc9fb 5190 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 5191
8f67c8c5
SS
5192 instance->peerIsPresent = ctrl_info->cluster.peerIsPresent;
5193 instance->passive = ctrl_info->cluster.passive;
5194 memcpy(instance->clusterId, ctrl_info->clusterId, sizeof(instance->clusterId));
51087a86
SS
5195 instance->UnevenSpanSupport =
5196 ctrl_info->adapterOperations2.supportUnevenSpans;
5197 if (instance->UnevenSpanSupport) {
5198 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS
5199 if (MR_ValidateMapInfo(instance))
5200 fusion->fast_path_io = 1;
5201 else
5202 fusion->fast_path_io = 0;
fc62b3fc 5203
51087a86
SS
5204 }
5205 if (ctrl_info->host_interface.SRIOV) {
92bb6505 5206 instance->requestorId = ctrl_info->iov.requestorId;
5207 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
5208 if (!ctrl_info->adapterOperations2.activePassive)
5209 instance->PlasmaFW111 = 1;
5210
5211 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
5212 instance->PlasmaFW111 ? "1.11" : "new");
5213
5214 if (instance->PlasmaFW111) {
5215 iovPtr = (struct IOV_111 *)
5216 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
5217 instance->requestorId = iovPtr->requestorId;
5218 }
fc62b3fc 5219 }
92bb6505 5220 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
5221 instance->requestorId);
51087a86
SS
5222 }
5223
51087a86
SS
5224 instance->crash_dump_fw_support =
5225 ctrl_info->adapterOperations3.supportCrashDump;
5226 instance->crash_dump_drv_support =
5227 (instance->crash_dump_fw_support &&
5228 instance->crash_dump_buf);
d88da09a 5229 if (instance->crash_dump_drv_support)
51087a86
SS
5230 megasas_set_crash_dump_params(instance,
5231 MR_CRASH_BUF_TURN_OFF);
5232
d88da09a 5233 else {
51087a86
SS
5234 if (instance->crash_dump_buf)
5235 pci_free_consistent(instance->pdev,
5236 CRASH_DMA_BUF_SIZE,
5237 instance->crash_dump_buf,
5238 instance->crash_dump_h);
5239 instance->crash_dump_buf = NULL;
14faea9f 5240 }
7497cde8 5241
d88da09a
SS
5242
5243 dev_info(&instance->pdev->dev,
5244 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
5245 le16_to_cpu(ctrl_info->pci.vendor_id),
5246 le16_to_cpu(ctrl_info->pci.device_id),
5247 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
5248 le16_to_cpu(ctrl_info->pci.sub_device_id));
5249 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
5250 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS
5251 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
5252 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 5253 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
5254 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS
5255
5256
14faea9f 5257 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 5258 SGE_BUFFER_SIZE / 512;
14faea9f 5259 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
5260 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 5261
ae09a6c1
SS
5262 /* Check for valid throttlequeuedepth module parameter */
5263 if (throttlequeuedepth &&
5264 throttlequeuedepth <= instance->max_scsi_cmds)
5265 instance->throttlequeuedepth = throttlequeuedepth;
5266 else
5267 instance->throttlequeuedepth =
5268 MEGASAS_THROTTLE_QUEUE_DEPTH;
5269
e3d178ca
SS
5270 if (resetwaittime > MEGASAS_RESET_WAIT_TIME)
5271 resetwaittime = MEGASAS_RESET_WAIT_TIME;
5272
5273 if ((scmd_timeout < 10) || (scmd_timeout > MEGASAS_DEFAULT_CMD_TIMEOUT))
5274 scmd_timeout = MEGASAS_DEFAULT_CMD_TIMEOUT;
ad84db2e 5275
229fe47c 5276 /* Launch SR-IOV heartbeat timer */
5277 if (instance->requestorId) {
5278 if (!megasas_sriov_start_heartbeat(instance, 1))
5279 megasas_start_timer(instance,
5280 &instance->sriov_heartbeat_timer,
5281 megasas_sriov_heartbeat_handler,
5282 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5283 else
5284 instance->skip_heartbeat_timer_del = 1;
5285 }
5286
c4a3e0a5
BS
5287 return 0;
5288
d3557fc8
SS
5289fail_get_pd_list:
5290 instance->instancet->disable_intr(instance);
eb1b1237 5291fail_init_adapter:
d3557fc8
SS
5292 megasas_destroy_irqs(instance);
5293fail_setup_irqs:
5294 if (instance->msix_vectors)
5295 pci_disable_msix(instance->pdev);
5296 instance->msix_vectors = 0;
cd50ba8e 5297fail_ready_state:
51087a86
SS
5298 kfree(instance->ctrl_info);
5299 instance->ctrl_info = NULL;
c4a3e0a5
BS
5300 iounmap(instance->reg_set);
5301
5302 fail_ioremap:
b6d5d880 5303 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS
5304
5305 return -EINVAL;
5306}
5307
5308/**
5309 * megasas_release_mfi - Reverses the FW initialization
4b63b286 5310 * @instance: Adapter soft state
c4a3e0a5
BS
5311 */
5312static void megasas_release_mfi(struct megasas_instance *instance)
5313{
9c915a8c 5314 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 5315
9c915a8c 5316 if (instance->reply_queue)
5317 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS
5318 instance->reply_queue, instance->reply_queue_h);
5319
5320 megasas_free_cmds(instance);
5321
5322 iounmap(instance->reg_set);
5323
b6d5d880 5324 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS
5325}
5326
5327/**
5328 * megasas_get_seq_num - Gets latest event sequence numbers
5329 * @instance: Adapter soft state
5330 * @eli: FW event log sequence numbers information
5331 *
5332 * FW maintains a log of all events in a non-volatile area. Upper layers would
5333 * usually find out the latest sequence number of the events, the seq number at
5334 * the boot etc. They would "read" all the events below the latest seq number
5335 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
5336 * number), they would subsribe to AEN (asynchronous event notification) and
5337 * wait for the events to happen.
5338 */
5339static int
5340megasas_get_seq_num(struct megasas_instance *instance,
5341 struct megasas_evt_log_info *eli)
5342{
5343 struct megasas_cmd *cmd;
5344 struct megasas_dcmd_frame *dcmd;
5345 struct megasas_evt_log_info *el_info;
5346 dma_addr_t el_info_h = 0;
5347
5348 cmd = megasas_get_cmd(instance);
5349
5350 if (!cmd) {
5351 return -ENOMEM;
5352 }
5353
5354 dcmd = &cmd->frame->dcmd;
5355 el_info = pci_alloc_consistent(instance->pdev,
5356 sizeof(struct megasas_evt_log_info),
5357 &el_info_h);
5358
5359 if (!el_info) {
5360 megasas_return_cmd(instance, cmd);
5361 return -ENOMEM;
5362 }
5363
5364 memset(el_info, 0, sizeof(*el_info));
5365 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5366
5367 dcmd->cmd = MFI_CMD_DCMD;
5368 dcmd->cmd_status = 0x0;
5369 dcmd->sge_count = 1;
94cd65dd 5370 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5371 dcmd->timeout = 0;
780a3762 5372 dcmd->pad_0 = 0;
94cd65dd
SS
5373 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5374 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5375 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5376 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5377
6d40afbc
SS
5378 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS) ==
5379 DCMD_SUCCESS) {
cfbe7554
SS
5380 /*
5381 * Copy the data back into callers buffer
5382 */
48100b0e
CH
5383 eli->newest_seq_num = el_info->newest_seq_num;
5384 eli->oldest_seq_num = el_info->oldest_seq_num;
5385 eli->clear_seq_num = el_info->clear_seq_num;
5386 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5387 eli->boot_seq_num = el_info->boot_seq_num;
6d40afbc
SS
5388 } else
5389 dev_err(&instance->pdev->dev, "DCMD failed "
5390 "from %s\n", __func__);
c4a3e0a5
BS
5391
5392 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5393 el_info, el_info_h);
5394
4026e9aa 5395 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
5396
5397 return 0;
5398}
5399
5400/**
5401 * megasas_register_aen - Registers for asynchronous event notification
5402 * @instance: Adapter soft state
5403 * @seq_num: The starting sequence number
5404 * @class_locale: Class of the event
5405 *
5406 * This function subscribes for AEN for events beyond the @seq_num. It requests
5407 * to be notified if and only if the event is of type @class_locale
5408 */
5409static int
5410megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5411 u32 class_locale_word)
5412{
5413 int ret_val;
5414 struct megasas_cmd *cmd;
5415 struct megasas_dcmd_frame *dcmd;
5416 union megasas_evt_class_locale curr_aen;
5417 union megasas_evt_class_locale prev_aen;
5418
5419 /*
5420 * If there an AEN pending already (aen_cmd), check if the
5421 * class_locale of that pending AEN is inclusive of the new
5422 * AEN request we currently have. If it is, then we don't have
5423 * to do anything. In other words, whichever events the current
5424 * AEN request is subscribing to, have already been subscribed
5425 * to.
5426 *
5427 * If the old_cmd is _not_ inclusive, then we have to abort
5428 * that command, form a class_locale that is superset of both
5429 * old and current and re-issue to the FW
5430 */
5431
5432 curr_aen.word = class_locale_word;
5433
5434 if (instance->aen_cmd) {
5435
a9555534
CH
5436 prev_aen.word =
5437 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS
5438
5439 /*
5440 * A class whose enum value is smaller is inclusive of all
5441 * higher values. If a PROGRESS (= -1) was previously
5442 * registered, then a new registration requests for higher
5443 * classes need not be sent to FW. They are automatically
5444 * included.
5445 *
5446 * Locale numbers don't have such hierarchy. They are bitmap
5447 * values
5448 */
5449 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5450 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS
5451 curr_aen.members.locale)) {
5452 /*
5453 * Previously issued event registration includes
5454 * current request. Nothing to do.
5455 */
5456 return 0;
5457 } else {
3993a862 5458 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS
5459
5460 if (prev_aen.members.class < curr_aen.members.class)
5461 curr_aen.members.class = prev_aen.members.class;
5462
5463 instance->aen_cmd->abort_aen = 1;
5464 ret_val = megasas_issue_blocked_abort_cmd(instance,
5465 instance->
cfbe7554 5466 aen_cmd, 30);
c4a3e0a5
BS
5467
5468 if (ret_val) {
1be18254 5469 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS
5470 "previous AEN command\n");
5471 return ret_val;
5472 }
5473 }
5474 }
5475
5476 cmd = megasas_get_cmd(instance);
5477
5478 if (!cmd)
5479 return -ENOMEM;
5480
5481 dcmd = &cmd->frame->dcmd;
5482
5483 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5484
5485 /*
5486 * Prepare DCMD for aen registration
5487 */
5488 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5489
5490 dcmd->cmd = MFI_CMD_DCMD;
5491 dcmd->cmd_status = 0x0;
5492 dcmd->sge_count = 1;
94cd65dd 5493 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5494 dcmd->timeout = 0;
780a3762 5495 dcmd->pad_0 = 0;
94cd65dd
SS
5496 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5497 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5498 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5499 instance->last_seq_num = seq_num;
94cd65dd
SS
5500 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5501 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5502 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5503
f4c9a131
YB
5504 if (instance->aen_cmd != NULL) {
5505 megasas_return_cmd(instance, cmd);
5506 return 0;
5507 }
5508
c4a3e0a5
BS
5509 /*
5510 * Store reference to the cmd used to register for AEN. When an
5511 * application wants us to register for AEN, we have to abort this
5512 * cmd and re-register with a new EVENT LOCALE supplied by that app
5513 */
5514 instance->aen_cmd = cmd;
5515
5516 /*
5517 * Issue the aen registration frame
5518 */
9c915a8c 5519 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS
5520
5521 return 0;
5522}
5523
5524/**
5525 * megasas_start_aen - Subscribes to AEN during driver load time
5526 * @instance: Adapter soft state
5527 */
5528static int megasas_start_aen(struct megasas_instance *instance)
5529{
5530 struct megasas_evt_log_info eli;
5531 union megasas_evt_class_locale class_locale;
5532
5533 /*
5534 * Get the latest sequence number from FW
5535 */
5536 memset(&eli, 0, sizeof(eli));
5537
5538 if (megasas_get_seq_num(instance, &eli))
5539 return -1;
5540
5541 /*
5542 * Register AEN with FW for latest sequence number plus 1
5543 */
5544 class_locale.members.reserved = 0;
5545 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5546 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5547
94cd65dd 5548 return megasas_register_aen(instance,
48100b0e 5549 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5550 class_locale.word);
c4a3e0a5
BS
5551}
5552
5553/**
5554 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5555 * @instance: Adapter soft state
5556 */
5557static int megasas_io_attach(struct megasas_instance *instance)
5558{
5559 struct Scsi_Host *host = instance->host;
5560
5561 /*
5562 * Export parameters required by SCSI mid-layer
5563 */
5564 host->irq = instance->pdev->irq;
5565 host->unique_id = instance->unique_id;
ae09a6c1 5566 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS
5567 host->this_id = instance->init_id;
5568 host->sg_tablesize = instance->max_num_sge;
42a8d2b3 5569
5570 if (instance->fw_support_ieee)
5571 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5572
1fd10685
YB
5573 /*
5574 * Check if the module parameter value for max_sectors can be used
5575 */
5576 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5577 instance->max_sectors_per_req = max_sectors;
5578 else {
5579 if (max_sectors) {
5580 if (((instance->pdev->device ==
5581 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5582 (instance->pdev->device ==
5583 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5584 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5585 instance->max_sectors_per_req = max_sectors;
5586 } else {
1be18254 5587 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB
5588 "and <= %d (or < 1MB for GEN2 controller)\n",
5589 instance->max_sectors_per_req);
5590 }
5591 }
5592 }
5593
c4a3e0a5 5594 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5595 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS
5596 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5597 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5598 host->max_lun = MEGASAS_MAX_LUN;
122da302 5599 host->max_cmd_len = 16;
c4a3e0a5 5600
9c915a8c 5601 /* Fusion only supports host reset */
5a8cb85b 5602 if (instance->ctrl_context) {
9c915a8c 5603 host->hostt->eh_device_reset_handler = NULL;
5604 host->hostt->eh_bus_reset_handler = NULL;
18365b13
SS
5605 host->hostt->eh_target_reset_handler = megasas_reset_target_fusion;
5606 host->hostt->eh_abort_handler = megasas_task_abort_fusion;
9c915a8c 5607 }
5608
c4a3e0a5
BS
5609 /*
5610 * Notify the mid-layer about the new controller
5611 */
5612 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS
5613 dev_err(&instance->pdev->dev,
5614 "Failed to add host from %s %d\n",
5615 __func__, __LINE__);
c4a3e0a5
BS
5616 return -ENODEV;
5617 }
5618
c4a3e0a5
BS
5619 return 0;
5620}
5621
31ea7088 5622static int
5623megasas_set_dma_mask(struct pci_dev *pdev)
5624{
5625 /*
da0dc9fb 5626 * All our controllers are capable of performing 64-bit DMA
31ea7088 5627 */
5628 if (IS_DMA64) {
6a35528a 5629 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5630
284901a9 5631 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5632 goto fail_set_dma_mask;
5633 }
5634 } else {
284901a9 5635 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5636 goto fail_set_dma_mask;
5637 }
46de63e2
SS
5638 /*
5639 * Ensure that all data structures are allocated in 32-bit
5640 * memory.
5641 */
5642 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5643 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5644 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5645 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5646 dev_info(&pdev->dev, "set 32bit DMA mask"
5647 "and 32 bit consistent mask\n");
5648 else
5649 goto fail_set_dma_mask;
5650 }
94cd65dd 5651
31ea7088 5652 return 0;
5653
5654fail_set_dma_mask:
5655 return 1;
5656}
5657
c4a3e0a5
BS
5658/**
5659 * megasas_probe_one - PCI hotplug entry point
5660 * @pdev: PCI device structure
0d49016b 5661 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5662 */
6f039790
GKH
5663static int megasas_probe_one(struct pci_dev *pdev,
5664 const struct pci_device_id *id)
c4a3e0a5 5665{
d3557fc8 5666 int rval, pos;
c4a3e0a5
BS
5667 struct Scsi_Host *host;
5668 struct megasas_instance *instance;
66192dfe 5669 u16 control = 0;
51087a86 5670 struct fusion_context *fusion = NULL;
66192dfe 5671
5672 /* Reset MSI-X in the kdump kernel */
5673 if (reset_devices) {
5674 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5675 if (pos) {
99369065 5676 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe 5677 &control);
5678 if (control & PCI_MSIX_FLAGS_ENABLE) {
5679 dev_info(&pdev->dev, "resetting MSI-X\n");
5680 pci_write_config_word(pdev,
99369065 5681 pos + PCI_MSIX_FLAGS,
66192dfe 5682 control &
5683 ~PCI_MSIX_FLAGS_ENABLE);
5684 }
5685 }
5686 }
c4a3e0a5 5687
c4a3e0a5
BS
5688 /*
5689 * PCI prepping: enable device set bus mastering and dma mask
5690 */
aeab3fd7 5691 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS
5692
5693 if (rval) {
5694 return rval;
5695 }
5696
5697 pci_set_master(pdev);
5698
31ea7088 5699 if (megasas_set_dma_mask(pdev))
5700 goto fail_set_dma_mask;
c4a3e0a5
BS
5701
5702 host = scsi_host_alloc(&megasas_template,
5703 sizeof(struct megasas_instance));
5704
5705 if (!host) {
1be18254 5706 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS
5707 goto fail_alloc_instance;
5708 }
5709
5710 instance = (struct megasas_instance *)host->hostdata;
5711 memset(instance, 0, sizeof(*instance));
da0dc9fb 5712 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 5713 instance->pdev = pdev;
c4a3e0a5 5714
9c915a8c 5715 switch (instance->pdev->device) {
5716 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5717 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5718 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5719 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 5720 case PCI_DEVICE_ID_LSI_INTRUDER:
5721 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 5722 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5723 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 5724 {
51087a86
SS
5725 instance->ctrl_context_pages =
5726 get_order(sizeof(struct fusion_context));
5727 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5728 instance->ctrl_context_pages);
9c915a8c 5729 if (!instance->ctrl_context) {
1be18254 5730 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c 5731 "memory for Fusion context info\n");
5732 goto fail_alloc_dma_buf;
5733 }
5734 fusion = instance->ctrl_context;
d009b576
SS
5735 memset(fusion, 0,
5736 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
5a8cb85b 5737 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
5738 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA))
5739 fusion->adapter_type = THUNDERBOLT_SERIES;
5740 else
5741 fusion->adapter_type = INVADER_SERIES;
9c915a8c 5742 }
5743 break;
5744 default: /* For all other supported controllers */
5745
5746 instance->producer =
5747 pci_alloc_consistent(pdev, sizeof(u32),
5748 &instance->producer_h);
5749 instance->consumer =
5750 pci_alloc_consistent(pdev, sizeof(u32),
5751 &instance->consumer_h);
5752
5753 if (!instance->producer || !instance->consumer) {
1be18254 5754 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c 5755 "memory for producer, consumer\n");
5756 goto fail_alloc_dma_buf;
5757 }
c4a3e0a5 5758
9c915a8c 5759 *instance->producer = 0;
5760 *instance->consumer = 0;
5761 break;
c4a3e0a5
BS
5762 }
5763
5765c5b8
SS
5764 instance->system_info_buf = pci_zalloc_consistent(pdev,
5765 sizeof(struct MR_DRV_SYSTEM_INFO),
5766 &instance->system_info_h);
5767
5768 if (!instance->system_info_buf)
5769 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5770
fc62b3fc
SS
5771 /* Crash dump feature related initialisation*/
5772 instance->drv_buf_index = 0;
5773 instance->drv_buf_alloc = 0;
5774 instance->crash_dump_fw_support = 0;
5775 instance->crash_dump_app_support = 0;
5776 instance->fw_crash_state = UNAVAILABLE;
5777 spin_lock_init(&instance->crashdump_lock);
5778 instance->crash_dump_buf = NULL;
5779
5780 if (!reset_devices)
5781 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5782 CRASH_DMA_BUF_SIZE,
5783 &instance->crash_dump_h);
5784 if (!instance->crash_dump_buf)
1be18254 5785 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS
5786 "crash dump DMA buffer\n");
5787
c3518837 5788 megasas_poll_wait_aen = 0;
f4c9a131 5789 instance->flag_ieee = 0;
7e8a75f4 5790 instance->ev = NULL;
39a98554 5791 instance->issuepend_done = 1;
8a01a41d 5792 atomic_set(&instance->adprecovery, MEGASAS_HBA_OPERATIONAL);
404a8a1a 5793 instance->is_imr = 0;
c4a3e0a5
BS
5794
5795 instance->evt_detail = pci_alloc_consistent(pdev,
5796 sizeof(struct
5797 megasas_evt_detail),
5798 &instance->evt_detail_h);
5799
5800 if (!instance->evt_detail) {
1be18254 5801 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS
5802 "event detail structure\n");
5803 goto fail_alloc_dma_buf;
5804 }
5805
2216c305
SS
5806 instance->pd_info = pci_alloc_consistent(pdev,
5807 sizeof(struct MR_PD_INFO), &instance->pd_info_h);
5808
5809 if (!instance->pd_info)
5810 dev_err(&instance->pdev->dev, "Failed to alloc mem for pd_info\n");
5811
c4a3e0a5
BS
5812 /*
5813 * Initialize locks and queues
5814 */
5815 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5816 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5817
e4a082c7
SP
5818 atomic_set(&instance->fw_outstanding,0);
5819
c4a3e0a5
BS
5820 init_waitqueue_head(&instance->int_cmd_wait_q);
5821 init_waitqueue_head(&instance->abort_cmd_wait_q);
5822
90dc9d98 5823 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5824 spin_lock_init(&instance->hba_lock);
7343eb65 5825 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5826
9c915a8c 5827 mutex_init(&instance->reset_mutex);
2216c305 5828 mutex_init(&instance->hba_mutex);
c4a3e0a5
BS
5829
5830 /*
5831 * Initialize PCI related and misc parameters
5832 */
c4a3e0a5
BS
5833 instance->host = host;
5834 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5835 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5836 instance->ctrl_info = NULL;
c4a3e0a5 5837
ae09a6c1 5838
7bebf5c7 5839 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5840 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5841 instance->flag_ieee = 1;
7bebf5c7 5842
658dcedb 5843 megasas_dbg_lvl = 0;
05e9ebbe 5844 instance->flag = 0;
0c79e681 5845 instance->unload = 1;
05e9ebbe 5846 instance->last_time = 0;
39a98554 5847 instance->disableOnlineCtrlReset = 1;
bc93d425 5848 instance->UnevenSpanSupport = 0;
39a98554 5849
5a8cb85b 5850 if (instance->ctrl_context) {
9c915a8c 5851 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS
5852 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5853 } else
9c915a8c 5854 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5855
0a77066a 5856 /*
5857 * Initialize MFI Firmware
5858 */
5859 if (megasas_init_fw(instance))
5860 goto fail_init_mfi;
5861
229fe47c 5862 if (instance->requestorId) {
5863 if (instance->PlasmaFW111) {
5864 instance->vf_affiliation_111 =
5865 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5866 &instance->vf_affiliation_111_h);
5867 if (!instance->vf_affiliation_111)
1be18254 5868 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5869 "memory for VF affiliation buffer\n");
5870 } else {
5871 instance->vf_affiliation =
5872 pci_alloc_consistent(pdev,
5873 (MAX_LOGICAL_DRIVES + 1) *
5874 sizeof(struct MR_LD_VF_AFFILIATION),
5875 &instance->vf_affiliation_h);
5876 if (!instance->vf_affiliation)
1be18254 5877 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5878 "memory for VF affiliation buffer\n");
5879 }
5880 }
5881
c4a3e0a5
BS
5882 /*
5883 * Store instance in PCI softstate
5884 */
5885 pci_set_drvdata(pdev, instance);
5886
5887 /*
5888 * Add this controller to megasas_mgmt_info structure so that it
5889 * can be exported to management applications
5890 */
5891 megasas_mgmt_info.count++;
5892 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5893 megasas_mgmt_info.max_index++;
5894
541f90b7 5895 /*
5896 * Register with SCSI mid-layer
5897 */
5898 if (megasas_io_attach(instance))
5899 goto fail_io_attach;
5900
5901 instance->unload = 0;
aa00832b
SS
5902 /*
5903 * Trigger SCSI to scan our drives
5904 */
5905 scsi_scan_host(host);
541f90b7 5906
c4a3e0a5
BS
5907 /*
5908 * Initiate AEN (Asynchronous Event Notification)
5909 */
5910 if (megasas_start_aen(instance)) {
1be18254 5911 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS
5912 goto fail_start_aen;
5913 }
5914
9ea81f81
AR
5915 /* Get current SR-IOV LD/VF affiliation */
5916 if (instance->requestorId)
5917 megasas_get_ld_vf_affiliation(instance, 1);
5918
c4a3e0a5
BS
5919 return 0;
5920
da0dc9fb
BH
5921fail_start_aen:
5922fail_io_attach:
c4a3e0a5
BS
5923 megasas_mgmt_info.count--;
5924 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5925 megasas_mgmt_info.max_index--;
5926
d46a3ad6 5927 instance->instancet->disable_intr(instance);
d3557fc8
SS
5928 megasas_destroy_irqs(instance);
5929
5a8cb85b 5930 if (instance->ctrl_context)
eb1b1237 5931 megasas_release_fusion(instance);
5932 else
5933 megasas_release_mfi(instance);
c8e858fe 5934 if (instance->msix_vectors)
0a77066a 5935 pci_disable_msix(instance->pdev);
d3557fc8 5936fail_init_mfi:
da0dc9fb 5937fail_alloc_dma_buf:
c4a3e0a5
BS
5938 if (instance->evt_detail)
5939 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5940 instance->evt_detail,
5941 instance->evt_detail_h);
5942
2216c305
SS
5943 if (instance->pd_info)
5944 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
5945 instance->pd_info,
5946 instance->pd_info_h);
eb1b1237 5947 if (instance->producer)
c4a3e0a5
BS
5948 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5949 instance->producer_h);
5950 if (instance->consumer)
5951 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5952 instance->consumer_h);
5953 scsi_host_put(host);
5954
da0dc9fb
BH
5955fail_alloc_instance:
5956fail_set_dma_mask:
c4a3e0a5
BS
5957 pci_disable_device(pdev);
5958
5959 return -ENODEV;
5960}
5961
5962/**
5963 * megasas_flush_cache - Requests FW to flush all its caches
5964 * @instance: Adapter soft state
5965 */
5966static void megasas_flush_cache(struct megasas_instance *instance)
5967{
5968 struct megasas_cmd *cmd;
5969 struct megasas_dcmd_frame *dcmd;
5970
8a01a41d 5971 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 5972 return;
5973
c4a3e0a5
BS
5974 cmd = megasas_get_cmd(instance);
5975
5976 if (!cmd)
5977 return;
5978
5979 dcmd = &cmd->frame->dcmd;
5980
5981 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5982
5983 dcmd->cmd = MFI_CMD_DCMD;
5984 dcmd->cmd_status = 0x0;
5985 dcmd->sge_count = 0;
94cd65dd 5986 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5987 dcmd->timeout = 0;
780a3762 5988 dcmd->pad_0 = 0;
c4a3e0a5 5989 dcmd->data_xfer_len = 0;
94cd65dd 5990 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS
5991 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5992
6d40afbc
SS
5993 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
5994 != DCMD_SUCCESS) {
5995 dev_err(&instance->pdev->dev,
5996 "return from %s %d\n", __func__, __LINE__);
5997 return;
5998 }
c4a3e0a5 5999
4026e9aa 6000 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
6001}
6002
6003/**
6004 * megasas_shutdown_controller - Instructs FW to shutdown the controller
6005 * @instance: Adapter soft state
31ea7088 6006 * @opcode: Shutdown/Hibernate
c4a3e0a5 6007 */
31ea7088 6008static void megasas_shutdown_controller(struct megasas_instance *instance,
6009 u32 opcode)
c4a3e0a5
BS
6010{
6011 struct megasas_cmd *cmd;
6012 struct megasas_dcmd_frame *dcmd;
6013
8a01a41d 6014 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR)
39a98554 6015 return;
6016
c4a3e0a5
BS
6017 cmd = megasas_get_cmd(instance);
6018
6019 if (!cmd)
6020 return;
6021
6022 if (instance->aen_cmd)
cfbe7554 6023 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6024 instance->aen_cmd, MFI_IO_TIMEOUT_SECS);
9c915a8c 6025 if (instance->map_update_cmd)
6026 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6027 instance->map_update_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6028 if (instance->jbod_seq_cmd)
6029 megasas_issue_blocked_abort_cmd(instance,
6d40afbc 6030 instance->jbod_seq_cmd, MFI_IO_TIMEOUT_SECS);
3761cb4c 6031
c4a3e0a5
BS
6032 dcmd = &cmd->frame->dcmd;
6033
6034 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
6035
6036 dcmd->cmd = MFI_CMD_DCMD;
6037 dcmd->cmd_status = 0x0;
6038 dcmd->sge_count = 0;
94cd65dd 6039 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 6040 dcmd->timeout = 0;
780a3762 6041 dcmd->pad_0 = 0;
c4a3e0a5 6042 dcmd->data_xfer_len = 0;
94cd65dd 6043 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 6044
6d40afbc
SS
6045 if (megasas_issue_blocked_cmd(instance, cmd, MFI_IO_TIMEOUT_SECS)
6046 != DCMD_SUCCESS) {
6047 dev_err(&instance->pdev->dev,
6048 "return from %s %d\n", __func__, __LINE__);
6049 return;
6050 }
c4a3e0a5 6051
4026e9aa 6052 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
6053}
6054
33139b21 6055#ifdef CONFIG_PM
31ea7088 6056/**
ad84db2e 6057 * megasas_suspend - driver suspend entry point
6058 * @pdev: PCI device structure
31ea7088 6059 * @state: PCI power state to suspend routine
6060 */
33139b21 6061static int
31ea7088 6062megasas_suspend(struct pci_dev *pdev, pm_message_t state)
6063{
6064 struct Scsi_Host *host;
6065 struct megasas_instance *instance;
6066
6067 instance = pci_get_drvdata(pdev);
6068 host = instance->host;
0c79e681 6069 instance->unload = 1;
31ea7088 6070
229fe47c 6071 /* Shutdown SR-IOV heartbeat timer */
6072 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6073 del_timer_sync(&instance->sriov_heartbeat_timer);
6074
31ea7088 6075 megasas_flush_cache(instance);
6076 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB
6077
6078 /* cancel the delayed work if this work still in queue */
6079 if (instance->ev != NULL) {
6080 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6081 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB
6082 instance->ev = NULL;
6083 }
6084
31ea7088 6085 tasklet_kill(&instance->isr_tasklet);
6086
6087 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 6088 instance->instancet->disable_intr(instance);
c8e858fe 6089
d3557fc8
SS
6090 megasas_destroy_irqs(instance);
6091
c8e858fe 6092 if (instance->msix_vectors)
80d9da98 6093 pci_disable_msix(instance->pdev);
31ea7088 6094
6095 pci_save_state(pdev);
6096 pci_disable_device(pdev);
6097
6098 pci_set_power_state(pdev, pci_choose_state(pdev, state));
6099
6100 return 0;
6101}
6102
6103/**
6104 * megasas_resume- driver resume entry point
6105 * @pdev: PCI device structure
6106 */
33139b21 6107static int
31ea7088 6108megasas_resume(struct pci_dev *pdev)
6109{
d3557fc8 6110 int rval;
31ea7088 6111 struct Scsi_Host *host;
6112 struct megasas_instance *instance;
6113
6114 instance = pci_get_drvdata(pdev);
6115 host = instance->host;
6116 pci_set_power_state(pdev, PCI_D0);
6117 pci_enable_wake(pdev, PCI_D0, 0);
6118 pci_restore_state(pdev);
6119
6120 /*
6121 * PCI prepping: enable device set bus mastering and dma mask
6122 */
aeab3fd7 6123 rval = pci_enable_device_mem(pdev);
31ea7088 6124
6125 if (rval) {
1be18254 6126 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 6127 return rval;
6128 }
6129
6130 pci_set_master(pdev);
6131
6132 if (megasas_set_dma_mask(pdev))
6133 goto fail_set_dma_mask;
6134
6135 /*
6136 * Initialize MFI Firmware
6137 */
6138
31ea7088 6139 atomic_set(&instance->fw_outstanding, 0);
6140
6141 /*
6142 * We expect the FW state to be READY
6143 */
058a8fac 6144 if (megasas_transition_to_ready(instance, 0))
31ea7088 6145 goto fail_ready_state;
6146
3f1abce4 6147 /* Now re-enable MSI-X */
dd088128 6148 if (instance->msix_vectors &&
8ae80ed1
AG
6149 pci_enable_msix_exact(instance->pdev, instance->msixentry,
6150 instance->msix_vectors))
dd088128 6151 goto fail_reenable_msix;
3f1abce4 6152
5a8cb85b 6153 if (instance->ctrl_context) {
9c915a8c 6154 megasas_reset_reply_desc(instance);
6155 if (megasas_ioc_init_fusion(instance)) {
6156 megasas_free_cmds(instance);
6157 megasas_free_cmds_fusion(instance);
6158 goto fail_init_mfi;
6159 }
6160 if (!megasas_get_map_info(instance))
6161 megasas_sync_map_info(instance);
5a8cb85b 6162 } else {
9c915a8c 6163 *instance->producer = 0;
6164 *instance->consumer = 0;
6165 if (megasas_issue_init_mfi(instance))
6166 goto fail_init_mfi;
9c915a8c 6167 }
31ea7088 6168
9c915a8c 6169 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
6170 (unsigned long)instance);
31ea7088 6171
d3557fc8
SS
6172 if (instance->msix_vectors ?
6173 megasas_setup_irqs_msix(instance, 0) :
6174 megasas_setup_irqs_ioapic(instance))
6175 goto fail_init_mfi;
31ea7088 6176
229fe47c 6177 /* Re-launch SR-IOV heartbeat timer */
6178 if (instance->requestorId) {
6179 if (!megasas_sriov_start_heartbeat(instance, 0))
6180 megasas_start_timer(instance,
6181 &instance->sriov_heartbeat_timer,
6182 megasas_sriov_heartbeat_handler,
6183 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 6184 else {
229fe47c 6185 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS
6186 goto fail_init_mfi;
6187 }
229fe47c 6188 }
6189
d46a3ad6 6190 instance->instancet->enable_intr(instance);
3761cb4c 6191 megasas_setup_jbod_map(instance);
0c79e681
YB
6192 instance->unload = 0;
6193
541f90b7 6194 /*
6195 * Initiate AEN (Asynchronous Event Notification)
6196 */
6197 if (megasas_start_aen(instance))
1be18254 6198 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 6199
31ea7088 6200 return 0;
6201
31ea7088 6202fail_init_mfi:
6203 if (instance->evt_detail)
6204 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6205 instance->evt_detail,
6206 instance->evt_detail_h);
6207
2216c305
SS
6208 if (instance->pd_info)
6209 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6210 instance->pd_info,
6211 instance->pd_info_h);
31ea7088 6212 if (instance->producer)
6213 pci_free_consistent(pdev, sizeof(u32), instance->producer,
6214 instance->producer_h);
6215 if (instance->consumer)
6216 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
6217 instance->consumer_h);
6218 scsi_host_put(host);
6219
6220fail_set_dma_mask:
6221fail_ready_state:
dd088128 6222fail_reenable_msix:
31ea7088 6223
6224 pci_disable_device(pdev);
6225
6226 return -ENODEV;
6227}
33139b21
JS
6228#else
6229#define megasas_suspend NULL
6230#define megasas_resume NULL
6231#endif
31ea7088 6232
c4a3e0a5
BS
6233/**
6234 * megasas_detach_one - PCI hot"un"plug entry point
6235 * @pdev: PCI device structure
6236 */
6f039790 6237static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS
6238{
6239 int i;
6240 struct Scsi_Host *host;
6241 struct megasas_instance *instance;
9c915a8c 6242 struct fusion_context *fusion;
3761cb4c 6243 u32 pd_seq_map_sz;
c4a3e0a5
BS
6244
6245 instance = pci_get_drvdata(pdev);
c3518837 6246 instance->unload = 1;
c4a3e0a5 6247 host = instance->host;
9c915a8c 6248 fusion = instance->ctrl_context;
c4a3e0a5 6249
229fe47c 6250 /* Shutdown SR-IOV heartbeat timer */
6251 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
6252 del_timer_sync(&instance->sriov_heartbeat_timer);
6253
fc62b3fc
SS
6254 if (instance->fw_crash_state != UNAVAILABLE)
6255 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS
6256 scsi_remove_host(instance->host);
6257 megasas_flush_cache(instance);
31ea7088 6258 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB
6259
6260 /* cancel the delayed work if this work still in queue*/
6261 if (instance->ev != NULL) {
6262 struct megasas_aen_event *ev = instance->ev;
c1d390d8 6263 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB
6264 instance->ev = NULL;
6265 }
6266
cfbe7554
SS
6267 /* cancel all wait events */
6268 wake_up_all(&instance->int_cmd_wait_q);
6269
5d018ad0 6270 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS
6271
6272 /*
6273 * Take the instance off the instance array. Note that we will not
6274 * decrement the max_index. We let this array be sparse array
6275 */
6276 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6277 if (megasas_mgmt_info.instance[i] == instance) {
6278 megasas_mgmt_info.count--;
6279 megasas_mgmt_info.instance[i] = NULL;
6280
6281 break;
6282 }
6283 }
6284
d46a3ad6 6285 instance->instancet->disable_intr(instance);
c4a3e0a5 6286
d3557fc8
SS
6287 megasas_destroy_irqs(instance);
6288
c8e858fe 6289 if (instance->msix_vectors)
80d9da98 6290 pci_disable_msix(instance->pdev);
c4a3e0a5 6291
5a8cb85b 6292 if (instance->ctrl_context) {
9c915a8c 6293 megasas_release_fusion(instance);
3761cb4c 6294 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
6295 (sizeof(struct MR_PD_CFG_SEQ) *
6296 (MAX_PHYSICAL_DEVICES - 1));
51087a86 6297 for (i = 0; i < 2 ; i++) {
9c915a8c 6298 if (fusion->ld_map[i])
6299 dma_free_coherent(&instance->pdev->dev,
51087a86 6300 fusion->max_map_sz,
9c915a8c 6301 fusion->ld_map[i],
51087a86
SS
6302 fusion->ld_map_phys[i]);
6303 if (fusion->ld_drv_map[i])
6304 free_pages((ulong)fusion->ld_drv_map[i],
6305 fusion->drv_map_pages);
546e559c
ML
6306 if (fusion->pd_seq_sync[i])
6307 dma_free_coherent(&instance->pdev->dev,
6308 pd_seq_map_sz,
6309 fusion->pd_seq_sync[i],
6310 fusion->pd_seq_phys[i]);
51087a86
SS
6311 }
6312 free_pages((ulong)instance->ctrl_context,
6313 instance->ctrl_context_pages);
5a8cb85b 6314 } else {
9c915a8c 6315 megasas_release_mfi(instance);
9c915a8c 6316 pci_free_consistent(pdev, sizeof(u32),
6317 instance->producer,
6318 instance->producer_h);
6319 pci_free_consistent(pdev, sizeof(u32),
6320 instance->consumer,
6321 instance->consumer_h);
9c915a8c 6322 }
c4a3e0a5 6323
51087a86
SS
6324 kfree(instance->ctrl_info);
6325
105900d5
SS
6326 if (instance->evt_detail)
6327 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
6328 instance->evt_detail, instance->evt_detail_h);
229fe47c 6329
2216c305
SS
6330 if (instance->pd_info)
6331 pci_free_consistent(pdev, sizeof(struct MR_PD_INFO),
6332 instance->pd_info,
6333 instance->pd_info_h);
229fe47c 6334 if (instance->vf_affiliation)
6335 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
6336 sizeof(struct MR_LD_VF_AFFILIATION),
6337 instance->vf_affiliation,
6338 instance->vf_affiliation_h);
6339
6340 if (instance->vf_affiliation_111)
6341 pci_free_consistent(pdev,
6342 sizeof(struct MR_LD_VF_AFFILIATION_111),
6343 instance->vf_affiliation_111,
6344 instance->vf_affiliation_111_h);
6345
6346 if (instance->hb_host_mem)
6347 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
6348 instance->hb_host_mem,
6349 instance->hb_host_mem_h);
6350
fc62b3fc
SS
6351 if (instance->crash_dump_buf)
6352 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
6353 instance->crash_dump_buf, instance->crash_dump_h);
6354
5765c5b8
SS
6355 if (instance->system_info_buf)
6356 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
6357 instance->system_info_buf, instance->system_info_h);
6358
c4a3e0a5
BS
6359 scsi_host_put(host);
6360
c4a3e0a5 6361 pci_disable_device(pdev);
c4a3e0a5
BS
6362}
6363
6364/**
6365 * megasas_shutdown - Shutdown entry point
6366 * @device: Generic device structure
6367 */
6368static void megasas_shutdown(struct pci_dev *pdev)
6369{
6370 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 6371
0c79e681 6372 instance->unload = 1;
c4a3e0a5 6373 megasas_flush_cache(instance);
530e6fc1 6374 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 6375 instance->instancet->disable_intr(instance);
d3557fc8
SS
6376 megasas_destroy_irqs(instance);
6377
c8e858fe 6378 if (instance->msix_vectors)
46fd256e 6379 pci_disable_msix(instance->pdev);
c4a3e0a5
BS
6380}
6381
6382/**
6383 * megasas_mgmt_open - char node "open" entry point
6384 */
6385static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6386{
6387 /*
6388 * Allow only those users with admin rights
6389 */
6390 if (!capable(CAP_SYS_ADMIN))
6391 return -EACCES;
6392
6393 return 0;
6394}
6395
c4a3e0a5
BS
6396/**
6397 * megasas_mgmt_fasync - Async notifier registration from applications
6398 *
6399 * This function adds the calling process to a driver global queue. When an
6400 * event occurs, SIGIO will be sent to all processes in this queue.
6401 */
6402static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6403{
6404 int rc;
6405
0b950672 6406 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS
6407
6408 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6409
0b950672 6410 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS
6411
6412 if (rc >= 0) {
6413 /* For sanity check when we get ioctl */
6414 filep->private_data = filep;
6415 return 0;
6416 }
6417
6418 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6419
6420 return rc;
6421}
6422
c3518837
YB
6423/**
6424 * megasas_mgmt_poll - char node "poll" entry point
6425 * */
6426static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6427{
6428 unsigned int mask;
6429 unsigned long flags;
da0dc9fb 6430
c3518837
YB
6431 poll_wait(file, &megasas_poll_wait, wait);
6432 spin_lock_irqsave(&poll_aen_lock, flags);
6433 if (megasas_poll_wait_aen)
da0dc9fb 6434 mask = (POLLIN | POLLRDNORM);
c3518837
YB
6435 else
6436 mask = 0;
51087a86 6437 megasas_poll_wait_aen = 0;
c3518837
YB
6438 spin_unlock_irqrestore(&poll_aen_lock, flags);
6439 return mask;
6440}
6441
fc62b3fc
SS
6442/*
6443 * megasas_set_crash_dump_params_ioctl:
6444 * Send CRASH_DUMP_MODE DCMD to all controllers
6445 * @cmd: MFI command frame
6446 */
6447
da0dc9fb 6448static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS
6449{
6450 struct megasas_instance *local_instance;
6451 int i, error = 0;
6452 int crash_support;
6453
6454 crash_support = cmd->frame->dcmd.mbox.w[0];
6455
6456 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6457 local_instance = megasas_mgmt_info.instance[i];
6458 if (local_instance && local_instance->crash_dump_drv_support) {
8a01a41d 6459 if ((atomic_read(&local_instance->adprecovery) ==
fc62b3fc
SS
6460 MEGASAS_HBA_OPERATIONAL) &&
6461 !megasas_set_crash_dump_params(local_instance,
6462 crash_support)) {
6463 local_instance->crash_dump_app_support =
6464 crash_support;
6465 dev_info(&local_instance->pdev->dev,
6466 "Application firmware crash "
6467 "dump mode set success\n");
6468 error = 0;
6469 } else {
6470 dev_info(&local_instance->pdev->dev,
6471 "Application firmware crash "
6472 "dump mode set failed\n");
6473 error = -1;
6474 }
6475 }
6476 }
6477 return error;
6478}
6479
c4a3e0a5
BS
6480/**
6481 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6482 * @instance: Adapter soft state
6483 * @argp: User's ioctl packet
6484 */
6485static int
6486megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6487 struct megasas_iocpacket __user * user_ioc,
6488 struct megasas_iocpacket *ioc)
6489{
6490 struct megasas_sge32 *kern_sge32;
6491 struct megasas_cmd *cmd;
6492 void *kbuff_arr[MAX_IOCTL_SGE];
6493 dma_addr_t buf_handle = 0;
6494 int error = 0, i;
6495 void *sense = NULL;
6496 dma_addr_t sense_handle;
7b2519af 6497 unsigned long *sense_ptr;
c4a3e0a5
BS
6498
6499 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6500
6501 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6502 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS
6503 ioc->sge_count, MAX_IOCTL_SGE);
6504 return -EINVAL;
6505 }
6506
6507 cmd = megasas_get_cmd(instance);
6508 if (!cmd) {
1be18254 6509 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS
6510 return -ENOMEM;
6511 }
6512
6513 /*
6514 * User's IOCTL packet has 2 frames (maximum). Copy those two
6515 * frames into our cmd's frames. cmd->frame's context will get
6516 * overwritten when we copy from user's frames. So set that value
6517 * alone separately
6518 */
6519 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6520 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6521 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS
6522 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6523 MFI_FRAME_SGL64 |
6524 MFI_FRAME_SENSE64));
c4a3e0a5 6525
fc62b3fc
SS
6526 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6527 error = megasas_set_crash_dump_params_ioctl(cmd);
6528 megasas_return_cmd(instance, cmd);
6529 return error;
6530 }
6531
c4a3e0a5
BS
6532 /*
6533 * The management interface between applications and the fw uses
6534 * MFI frames. E.g, RAID configuration changes, LD property changes
6535 * etc are accomplishes through different kinds of MFI frames. The
6536 * driver needs to care only about substituting user buffers with
6537 * kernel buffers in SGLs. The location of SGL is embedded in the
6538 * struct iocpacket itself.
6539 */
6540 kern_sge32 = (struct megasas_sge32 *)
6541 ((unsigned long)cmd->frame + ioc->sgl_off);
6542
6543 /*
6544 * For each user buffer, create a mirror buffer and copy in
6545 */
6546 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM
6547 if (!ioc->sgl[i].iov_len)
6548 continue;
6549
9f35fa8a 6550 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6551 ioc->sgl[i].iov_len,
9f35fa8a 6552 &buf_handle, GFP_KERNEL);
c4a3e0a5 6553 if (!kbuff_arr[i]) {
1be18254
BH
6554 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6555 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS
6556 error = -ENOMEM;
6557 goto out;
6558 }
6559
6560 /*
6561 * We don't change the dma_coherent_mask, so
6562 * pci_alloc_consistent only returns 32bit addresses
6563 */
94cd65dd
SS
6564 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6565 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS
6566
6567 /*
6568 * We created a kernel buffer corresponding to the
6569 * user buffer. Now copy in from the user buffer
6570 */
6571 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6572 (u32) (ioc->sgl[i].iov_len))) {
6573 error = -EFAULT;
6574 goto out;
6575 }
6576 }
6577
6578 if (ioc->sense_len) {
9f35fa8a
SP
6579 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6580 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS
6581 if (!sense) {
6582 error = -ENOMEM;
6583 goto out;
6584 }
6585
6586 sense_ptr =
7b2519af 6587 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6588 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS
6589 }
6590
6591 /*
6592 * Set the sync_cmd flag so that the ISR knows not to complete this
6593 * cmd to the SCSI mid-layer
6594 */
6595 cmd->sync_cmd = 1;
6d40afbc
SS
6596 if (megasas_issue_blocked_cmd(instance, cmd, 0) == DCMD_NOT_FIRED) {
6597 cmd->sync_cmd = 0;
6598 dev_err(&instance->pdev->dev,
6599 "return -EBUSY from %s %d opcode 0x%x cmd->cmd_status_drv 0x%x\n",
6600 __func__, __LINE__, cmd->frame->dcmd.opcode,
6601 cmd->cmd_status_drv);
6602 return -EBUSY;
6603 }
6604
c4a3e0a5
BS
6605 cmd->sync_cmd = 0;
6606
aa00832b
SS
6607 if (instance->unload == 1) {
6608 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6609 "don't submit data to application\n");
6610 goto out;
6611 }
c4a3e0a5
BS
6612 /*
6613 * copy out the kernel buffers to user buffers
6614 */
6615 for (i = 0; i < ioc->sge_count; i++) {
6616 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6617 ioc->sgl[i].iov_len)) {
6618 error = -EFAULT;
6619 goto out;
6620 }
6621 }
6622
6623 /*
6624 * copy out the sense
6625 */
6626 if (ioc->sense_len) {
6627 /*
b70a41e0 6628 * sense_ptr points to the location that has the user
c4a3e0a5
BS
6629 * sense buffer address
6630 */
7b2519af
YB
6631 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6632 ioc->sense_off);
c4a3e0a5 6633
b70a41e0 6634 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6635 sense, ioc->sense_len)) {
1be18254 6636 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6637 "sense data\n");
c4a3e0a5
BS
6638 error = -EFAULT;
6639 goto out;
6640 }
6641 }
6642
6643 /*
6644 * copy the status codes returned by the fw
6645 */
6646 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6647 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6648 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS
6649 error = -EFAULT;
6650 }
6651
da0dc9fb 6652out:
c4a3e0a5 6653 if (sense) {
9f35fa8a 6654 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS
6655 sense, sense_handle);
6656 }
6657
7a6a731b 6658 for (i = 0; i < ioc->sge_count; i++) {
3deb9438 6659 if (kbuff_arr[i]) {
7a6a731b 6660 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6661 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6662 kbuff_arr[i],
94cd65dd 6663 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6664 kbuff_arr[i] = NULL;
3deb9438 6665 }
c4a3e0a5
BS
6666 }
6667
4026e9aa 6668 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS
6669 return error;
6670}
6671
c4a3e0a5
BS
6672static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6673{
6674 struct megasas_iocpacket __user *user_ioc =
6675 (struct megasas_iocpacket __user *)arg;
6676 struct megasas_iocpacket *ioc;
6677 struct megasas_instance *instance;
6678 int error;
39a98554 6679 int i;
6680 unsigned long flags;
6681 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
6682
6683 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6684 if (!ioc)
6685 return -ENOMEM;
6686
6687 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6688 error = -EFAULT;
6689 goto out_kfree_ioc;
6690 }
6691
6692 instance = megasas_lookup_instance(ioc->host_no);
6693 if (!instance) {
6694 error = -ENODEV;
6695 goto out_kfree_ioc;
6696 }
6697
229fe47c 6698 /* Adjust ioctl wait time for VF mode */
6699 if (instance->requestorId)
6700 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6701
6702 /* Block ioctls in VF mode */
6703 if (instance->requestorId && !allow_vf_ioctls) {
6704 error = -ENODEV;
6705 goto out_kfree_ioc;
6706 }
6707
8a01a41d 6708 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6709 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB
6710 error = -ENODEV;
6711 goto out_kfree_ioc;
6712 }
6713
6714 if (instance->unload == 1) {
6715 error = -ENODEV;
6716 goto out_kfree_ioc;
6717 }
6718
c4a3e0a5
BS
6719 if (down_interruptible(&instance->ioctl_sem)) {
6720 error = -ERESTARTSYS;
6721 goto out_kfree_ioc;
6722 }
39a98554 6723
6724 for (i = 0; i < wait_time; i++) {
6725
6726 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6727 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 6728 spin_unlock_irqrestore(&instance->hba_lock, flags);
6729 break;
6730 }
6731 spin_unlock_irqrestore(&instance->hba_lock, flags);
6732
6733 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6734 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6735 "for controller reset to finish\n");
6736 }
6737
6738 msleep(1000);
6739 }
6740
6741 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6742 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 6743 spin_unlock_irqrestore(&instance->hba_lock, flags);
6744
1be18254 6745 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6746 "waiting for HBA to recover\n");
6747 error = -ENODEV;
c64e483e 6748 goto out_up;
39a98554 6749 }
6750 spin_unlock_irqrestore(&instance->hba_lock, flags);
6751
c4a3e0a5 6752 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 6753out_up:
c4a3e0a5
BS
6754 up(&instance->ioctl_sem);
6755
da0dc9fb 6756out_kfree_ioc:
c4a3e0a5
BS
6757 kfree(ioc);
6758 return error;
6759}
6760
6761static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6762{
6763 struct megasas_instance *instance;
6764 struct megasas_aen aen;
6765 int error;
39a98554 6766 int i;
6767 unsigned long flags;
6768 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS
6769
6770 if (file->private_data != file) {
6771 printk(KERN_DEBUG "megasas: fasync_helper was not "
6772 "called first\n");
6773 return -EINVAL;
6774 }
6775
6776 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6777 return -EFAULT;
6778
6779 instance = megasas_lookup_instance(aen.host_no);
6780
6781 if (!instance)
6782 return -ENODEV;
6783
8a01a41d 6784 if (atomic_read(&instance->adprecovery) == MEGASAS_HW_CRITICAL_ERROR) {
39a98554 6785 return -ENODEV;
0c79e681
YB
6786 }
6787
6788 if (instance->unload == 1) {
6789 return -ENODEV;
6790 }
6791
39a98554 6792 for (i = 0; i < wait_time; i++) {
6793
6794 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6795 if (atomic_read(&instance->adprecovery) == MEGASAS_HBA_OPERATIONAL) {
39a98554 6796 spin_unlock_irqrestore(&instance->hba_lock,
6797 flags);
6798 break;
6799 }
6800
6801 spin_unlock_irqrestore(&instance->hba_lock, flags);
6802
6803 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6804 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6805 "controller reset to finish\n");
6806 }
6807
6808 msleep(1000);
6809 }
6810
6811 spin_lock_irqsave(&instance->hba_lock, flags);
8a01a41d 6812 if (atomic_read(&instance->adprecovery) != MEGASAS_HBA_OPERATIONAL) {
39a98554 6813 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH
6814 dev_err(&instance->pdev->dev, "timed out while waiting"
6815 "for HBA to recover\n");
39a98554 6816 return -ENODEV;
6817 }
6818 spin_unlock_irqrestore(&instance->hba_lock, flags);
6819
11c71cb4 6820 mutex_lock(&instance->reset_mutex);
c4a3e0a5
BS
6821 error = megasas_register_aen(instance, aen.seq_num,
6822 aen.class_locale_word);
11c71cb4 6823 mutex_unlock(&instance->reset_mutex);
c4a3e0a5
BS
6824 return error;
6825}
6826
6827/**
6828 * megasas_mgmt_ioctl - char node ioctl entry point
6829 */
6830static long
6831megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6832{
6833 switch (cmd) {
6834 case MEGASAS_IOC_FIRMWARE:
6835 return megasas_mgmt_ioctl_fw(file, arg);
6836
6837 case MEGASAS_IOC_GET_AEN:
6838 return megasas_mgmt_ioctl_aen(file, arg);
6839 }
6840
6841 return -ENOTTY;
6842}
6843
6844#ifdef CONFIG_COMPAT
6845static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6846{
6847 struct compat_megasas_iocpacket __user *cioc =
6848 (struct compat_megasas_iocpacket __user *)arg;
6849 struct megasas_iocpacket __user *ioc =
6850 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6851 int i;
6852 int error = 0;
b3dc1a21 6853 compat_uptr_t ptr;
323c4a02 6854 u32 local_sense_off;
6855 u32 local_sense_len;
ea1c928b 6856 u32 user_sense_off;
c4a3e0a5 6857
83aabc1b
JG
6858 if (clear_user(ioc, sizeof(*ioc)))
6859 return -EFAULT;
c4a3e0a5
BS
6860
6861 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6862 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6863 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6864 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6865 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6866 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6867 return -EFAULT;
6868
b3dc1a21
TH
6869 /*
6870 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6871 * sense_len is not null, so prepare the 64bit value under
6872 * the same condition.
6873 */
ea1c928b
SS
6874 if (get_user(local_sense_off, &ioc->sense_off) ||
6875 get_user(local_sense_len, &ioc->sense_len) ||
6876 get_user(user_sense_off, &cioc->sense_off))
323c4a02 6877 return -EFAULT;
6878
323c4a02 6879 if (local_sense_len) {
b3dc1a21 6880 void __user **sense_ioc_ptr =
ea1c928b 6881 (void __user **)((u8 *)((unsigned long)&ioc->frame.raw) + local_sense_off);
b3dc1a21 6882 compat_uptr_t *sense_cioc_ptr =
ea1c928b 6883 (compat_uptr_t *)(((unsigned long)&cioc->frame.raw) + user_sense_off);
b3dc1a21
TH
6884 if (get_user(ptr, sense_cioc_ptr) ||
6885 put_user(compat_ptr(ptr), sense_ioc_ptr))
6886 return -EFAULT;
6887 }
c4a3e0a5 6888
b3dc1a21 6889 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS
6890 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6891 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6892 copy_in_user(&ioc->sgl[i].iov_len,
6893 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6894 return -EFAULT;
6895 }
6896
6897 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6898
6899 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6900 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6901 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6902 return -EFAULT;
6903 }
6904 return error;
6905}
6906
6907static long
6908megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6909 unsigned long arg)
6910{
6911 switch (cmd) {
cb59aa6a
SP
6912 case MEGASAS_IOC_FIRMWARE32:
6913 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS
6914 case MEGASAS_IOC_GET_AEN:
6915 return megasas_mgmt_ioctl_aen(file, arg);
6916 }
6917
6918 return -ENOTTY;
6919}
6920#endif
6921
6922/*
6923 * File operations structure for management interface
6924 */
00977a59 6925static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS
6926 .owner = THIS_MODULE,
6927 .open = megasas_mgmt_open,
c4a3e0a5
BS
6928 .fasync = megasas_mgmt_fasync,
6929 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6930 .poll = megasas_mgmt_poll,
c4a3e0a5
BS
6931#ifdef CONFIG_COMPAT
6932 .compat_ioctl = megasas_mgmt_compat_ioctl,
6933#endif
6038f373 6934 .llseek = noop_llseek,
c4a3e0a5
BS
6935};
6936
6937/*
6938 * PCI hotplug support registration structure
6939 */
6940static struct pci_driver megasas_pci_driver = {
6941
6942 .name = "megaraid_sas",
6943 .id_table = megasas_pci_table,
6944 .probe = megasas_probe_one,
6f039790 6945 .remove = megasas_detach_one,
31ea7088 6946 .suspend = megasas_suspend,
6947 .resume = megasas_resume,
c4a3e0a5
BS
6948 .shutdown = megasas_shutdown,
6949};
6950
6951/*
6952 * Sysfs driver attributes
6953 */
6954static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6955{
6956 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6957 MEGASAS_VERSION);
6958}
6959
6960static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6961
09fced19
SS
6962static ssize_t
6963megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6964{
6965 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6966 MEGASAS_RELDATE);
6967}
6968
6969static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6970
72c4fd36
YB
6971static ssize_t
6972megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6973{
6974 return sprintf(buf, "%u\n", support_poll_for_event);
6975}
6976
6977static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6978 megasas_sysfs_show_support_poll_for_event, NULL);
6979
837f5fe8
YB
6980 static ssize_t
6981megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6982{
6983 return sprintf(buf, "%u\n", support_device_change);
6984}
6985
6986static DRIVER_ATTR(support_device_change, S_IRUGO,
6987 megasas_sysfs_show_support_device_change, NULL);
6988
658dcedb
SP
6989static ssize_t
6990megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6991{
ad84db2e 6992 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP
6993}
6994
6995static ssize_t
6996megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6997{
6998 int retval = count;
da0dc9fb
BH
6999
7000 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP
7001 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
7002 retval = -EINVAL;
7003 }
7004 return retval;
7005}
7006
66dca9b8 7007static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 7008 megasas_sysfs_set_dbg_lvl);
7009
7e8a75f4
YB
7010static void
7011megasas_aen_polling(struct work_struct *work)
7012{
7013 struct megasas_aen_event *ev =
c1d390d8 7014 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB
7015 struct megasas_instance *instance = ev->instance;
7016 union megasas_evt_class_locale class_locale;
7017 struct Scsi_Host *host;
7018 struct scsi_device *sdev1;
7019 u16 pd_index = 0;
c9786842 7020 u16 ld_index = 0;
7e8a75f4 7021 int i, j, doscan = 0;
229fe47c 7022 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4 7023 int error;
6d40afbc 7024 u8 dcmd_ret = DCMD_SUCCESS;
7e8a75f4
YB
7025
7026 if (!instance) {
7027 printk(KERN_ERR "invalid instance!\n");
7028 kfree(ev);
7029 return;
7030 }
229fe47c 7031
7032 /* Adjust event workqueue thread wait time for VF mode */
7033 if (instance->requestorId)
7034 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
7035
7036 /* Don't run the event workqueue thread if OCR is running */
11c71cb4 7037 mutex_lock(&instance->reset_mutex);
229fe47c 7038
7e8a75f4
YB
7039 instance->ev = NULL;
7040 host = instance->host;
7041 if (instance->evt_detail) {
714f5177 7042 megasas_decode_evt(instance);
7e8a75f4 7043
94cd65dd 7044 switch (le32_to_cpu(instance->evt_detail->code)) {
c9786842 7045
11c71cb4 7046 case MR_EVT_PD_INSERTED:
7e8a75f4 7047 case MR_EVT_PD_REMOVED:
11c71cb4 7048 dcmd_ret = megasas_get_pd_list(instance);
6d40afbc 7049 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4 7050 doscan = SCAN_PD_CHANNEL;
c9786842
YB
7051 break;
7052
7053 case MR_EVT_LD_OFFLINE:
4c598b23 7054 case MR_EVT_CFG_CLEARED:
c9786842 7055 case MR_EVT_LD_DELETED:
c9786842 7056 case MR_EVT_LD_CREATED:
229fe47c 7057 if (!instance->requestorId ||
11c71cb4
SS
7058 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7059 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7060
6d40afbc 7061 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS
7062 doscan = SCAN_VD_CHANNEL;
7063
c9786842 7064 break;
11c71cb4 7065
7e8a75f4 7066 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 7067 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 7068 case MR_EVT_LD_STATE_CHANGE:
11c71cb4
SS
7069 dcmd_ret = megasas_get_pd_list(instance);
7070
6d40afbc 7071 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS
7072 break;
7073
7074 if (!instance->requestorId ||
7075 (instance->requestorId && megasas_get_ld_vf_affiliation(instance, 0)))
7076 dcmd_ret = megasas_ld_list_query(instance, MR_LD_QUERY_TYPE_EXPOSED_TO_HOST);
7077
6d40afbc 7078 if (dcmd_ret != DCMD_SUCCESS)
11c71cb4
SS
7079 break;
7080
7081 doscan = SCAN_VD_CHANNEL | SCAN_PD_CHANNEL;
7082 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
7083 instance->host->host_no);
7e8a75f4 7084 break;
11c71cb4 7085
c4bd2654 7086 case MR_EVT_CTRL_PROP_CHANGED:
11c71cb4
SS
7087 dcmd_ret = megasas_get_ctrl_info(instance);
7088 break;
7e8a75f4
YB
7089 default:
7090 doscan = 0;
7091 break;
7092 }
7093 } else {
1be18254 7094 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
11c71cb4 7095 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB
7096 kfree(ev);
7097 return;
7098 }
7099
11c71cb4
SS
7100 mutex_unlock(&instance->reset_mutex);
7101
7102 if (doscan & SCAN_PD_CHANNEL) {
7103 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
7104 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7105 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
7106 sdev1 = scsi_device_lookup(host, i, j, 0);
7107 if (instance->pd_list[pd_index].driveState ==
7108 MR_PD_STATE_SYSTEM) {
7109 if (!sdev1)
7110 scsi_add_device(host, i, j, 0);
7111 else
7112 scsi_device_put(sdev1);
7113 } else {
7114 if (sdev1) {
7115 scsi_remove_device(sdev1);
7116 scsi_device_put(sdev1);
7e8a75f4
YB
7117 }
7118 }
7119 }
7120 }
11c71cb4 7121 }
c9786842 7122
11c71cb4
SS
7123 if (doscan & SCAN_VD_CHANNEL) {
7124 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
7125 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
7126 ld_index = (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
7127 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7128 if (instance->ld_ids[ld_index] != 0xff) {
7129 if (!sdev1)
7130 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
7131 else
7132 scsi_device_put(sdev1);
7133 } else {
7134 if (sdev1) {
7135 scsi_remove_device(sdev1);
7136 scsi_device_put(sdev1);
c9786842
YB
7137 }
7138 }
7139 }
7140 }
7e8a75f4
YB
7141 }
7142
6d40afbc 7143 if (dcmd_ret == DCMD_SUCCESS)
11c71cb4
SS
7144 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7145 else
7146 seq_num = instance->last_seq_num;
7e8a75f4
YB
7147
7148 /* Register AEN with FW for latest sequence number plus 1 */
7149 class_locale.members.reserved = 0;
7150 class_locale.members.locale = MR_EVT_LOCALE_ALL;
7151 class_locale.members.class = MR_EVT_CLASS_DEBUG;
11c71cb4
SS
7152
7153 if (instance->aen_cmd != NULL) {
7154 kfree(ev);
7155 return;
7156 }
7157
7158 mutex_lock(&instance->reset_mutex);
7e8a75f4
YB
7159 error = megasas_register_aen(instance, seq_num,
7160 class_locale.word);
7e8a75f4 7161 if (error)
11c71cb4
SS
7162 dev_err(&instance->pdev->dev,
7163 "register aen failed error %x\n", error);
7e8a75f4 7164
11c71cb4 7165 mutex_unlock(&instance->reset_mutex);
7e8a75f4
YB
7166 kfree(ev);
7167}
7168
c4a3e0a5
BS
7169/**
7170 * megasas_init - Driver load entry point
7171 */
7172static int __init megasas_init(void)
7173{
7174 int rval;
7175
7176 /*
7177 * Announce driver version and other information
7178 */
d98a6deb 7179 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 7180
bd8d6dd4
KD
7181 spin_lock_init(&poll_aen_lock);
7182
72c4fd36 7183 support_poll_for_event = 2;
837f5fe8 7184 support_device_change = 1;
72c4fd36 7185
c4a3e0a5
BS
7186 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
7187
7188 /*
7189 * Register character device node
7190 */
7191 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
7192
7193 if (rval < 0) {
7194 printk(KERN_DEBUG "megasas: failed to open device node\n");
7195 return rval;
7196 }
7197
7198 megasas_mgmt_majorno = rval;
7199
7200 /*
7201 * Register ourselves as PCI hotplug module
7202 */
4041b9cd 7203 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS
7204
7205 if (rval) {
6774def6 7206 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG
7207 goto err_pcidrv;
7208 }
7209
7210 rval = driver_create_file(&megasas_pci_driver.driver,
7211 &driver_attr_version);
7212 if (rval)
7213 goto err_dcf_attr_ver;
72c4fd36 7214
09fced19
SS
7215 rval = driver_create_file(&megasas_pci_driver.driver,
7216 &driver_attr_release_date);
7217 if (rval)
7218 goto err_dcf_rel_date;
7219
72c4fd36
YB
7220 rval = driver_create_file(&megasas_pci_driver.driver,
7221 &driver_attr_support_poll_for_event);
7222 if (rval)
7223 goto err_dcf_support_poll_for_event;
7224
83aabc1b
JG
7225 rval = driver_create_file(&megasas_pci_driver.driver,
7226 &driver_attr_dbg_lvl);
7227 if (rval)
7228 goto err_dcf_dbg_lvl;
837f5fe8
YB
7229 rval = driver_create_file(&megasas_pci_driver.driver,
7230 &driver_attr_support_device_change);
7231 if (rval)
7232 goto err_dcf_support_device_change;
7233
c4a3e0a5 7234 return rval;
ad84db2e 7235
837f5fe8 7236err_dcf_support_device_change:
ad84db2e 7237 driver_remove_file(&megasas_pci_driver.driver,
7238 &driver_attr_dbg_lvl);
83aabc1b 7239err_dcf_dbg_lvl:
72c4fd36
YB
7240 driver_remove_file(&megasas_pci_driver.driver,
7241 &driver_attr_support_poll_for_event);
72c4fd36 7242err_dcf_support_poll_for_event:
09fced19
SS
7243 driver_remove_file(&megasas_pci_driver.driver,
7244 &driver_attr_release_date);
7245err_dcf_rel_date:
83aabc1b
JG
7246 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
7247err_dcf_attr_ver:
7248 pci_unregister_driver(&megasas_pci_driver);
7249err_pcidrv:
7250 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 7251 return rval;
c4a3e0a5
BS
7252}
7253
7254/**
7255 * megasas_exit - Driver unload entry point
7256 */
7257static void __exit megasas_exit(void)
7258{
658dcedb
SP
7259 driver_remove_file(&megasas_pci_driver.driver,
7260 &driver_attr_dbg_lvl);
837f5fe8
YB
7261 driver_remove_file(&megasas_pci_driver.driver,
7262 &driver_attr_support_poll_for_event);
7263 driver_remove_file(&megasas_pci_driver.driver,
7264 &driver_attr_support_device_change);
09fced19
SS
7265 driver_remove_file(&megasas_pci_driver.driver,
7266 &driver_attr_release_date);
83aabc1b 7267 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS
7268
7269 pci_unregister_driver(&megasas_pci_driver);
7270 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
7271}
7272
7273module_init(megasas_init);
7274module_exit(megasas_exit);
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