Merge tag 'char-misc-4.6-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[deliverable/linux.git] / sound / pci / hda / patch_cirrus.c
CommitLineData
e5f14248
TI
1/*
2 * HD audio interface patch for Cirrus Logic CS420x chip
3 *
4 * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
5 *
6 * This driver is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
e5f14248 22#include <linux/slab.h>
da155d5b 23#include <linux/module.h>
e5f14248 24#include <sound/core.h>
1077a024 25#include <sound/tlv.h>
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26#include "hda_codec.h"
27#include "hda_local.h"
128bc4ba 28#include "hda_auto_parser.h"
1835a0f9 29#include "hda_jack.h"
1077a024 30#include "hda_generic.h"
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31
32/*
33 */
34
35struct cs_spec {
1077a024 36 struct hda_gen_spec gen;
e5f14248 37
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TI
38 unsigned int gpio_mask;
39 unsigned int gpio_dir;
40 unsigned int gpio_data;
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41 unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
42 unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
ed208255 43
56487c27
TH
44 /* CS421x */
45 unsigned int spdif_detect:1;
1077a024 46 unsigned int spdif_present:1;
56487c27
TH
47 unsigned int sense_b:1;
48 hda_nid_t vendor_nid;
0c52db8c
TI
49
50 /* for MBP SPDIF control */
51 int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
52 struct snd_ctl_elem_value *ucontrol);
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TI
53};
54
56487c27 55/* available models with CS420x */
a6bae205 56enum {
4e7d7c60 57 CS420X_MBP53,
a6bae205 58 CS420X_MBP55,
1a5ba2e9 59 CS420X_IMAC27,
b35aabd7
TI
60 CS420X_GPIO_13,
61 CS420X_GPIO_23,
ef596a57 62 CS420X_MBP101,
ffe4d12b 63 CS420X_MBP81,
6ab982e8 64 CS420X_MBA42,
a6bae205 65 CS420X_AUTO,
03efce75
TI
66 /* aliases */
67 CS420X_IMAC27_122 = CS420X_GPIO_23,
68 CS420X_APPLE = CS420X_GPIO_13,
a6bae205
TI
69};
70
56487c27
TH
71/* CS421x boards */
72enum {
73 CS421X_CDB4210,
b35aabd7 74 CS421X_SENSE_B,
4af16107 75 CS421X_STUMPY,
56487c27
TH
76};
77
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TI
78/* Vendor-specific processing widget */
79#define CS420X_VENDOR_NID 0x11
80#define CS_DIG_OUT1_PIN_NID 0x10
81#define CS_DIG_OUT2_PIN_NID 0x15
16337e02
DB
82#define CS_DMIC1_PIN_NID 0x0e
83#define CS_DMIC2_PIN_NID 0x12
40c20fa0
TI
84
85/* coef indices */
86#define IDX_SPDIF_STAT 0x0000
87#define IDX_SPDIF_CTL 0x0001
88#define IDX_ADC_CFG 0x0002
89/* SZC bitmask, 4 modes below:
90 * 0 = immediate,
91 * 1 = digital immediate, analog zero-cross
92 * 2 = digtail & analog soft-ramp
93 * 3 = digital soft-ramp, analog zero-cross
94 */
95#define CS_COEF_ADC_SZC_MASK (3 << 0)
96#define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
97#define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
98/* PGA mode: 0 = differential, 1 = signle-ended */
99#define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
100#define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
101#define IDX_DAC_CFG 0x0003
102/* SZC bitmask, 4 modes below:
103 * 0 = Immediate
104 * 1 = zero-cross
105 * 2 = soft-ramp
106 * 3 = soft-ramp on zero-cross
107 */
108#define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
109#define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
110#define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
111
112#define IDX_BEEP_CFG 0x0004
113/* 0x0008 - test reg key */
114/* 0x0009 - 0x0014 -> 12 test regs */
115/* 0x0015 - visibility reg */
116
b5bf0a92
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117/* Cirrus Logic CS4208 */
118#define CS4208_VENDOR_NID 0x24
119
56487c27
TH
120/*
121 * Cirrus Logic CS4210
122 *
123 * 1 DAC => HP(sense) / Speakers,
124 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
125 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
126*/
127#define CS4210_DAC_NID 0x02
128#define CS4210_ADC_NID 0x03
5660ffd0 129#define CS4210_VENDOR_NID 0x0B
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TH
130#define CS421X_DMIC_PIN_NID 0x09 /* Port E */
131#define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
132
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TI
133#define CS421X_IDX_DEV_CFG 0x01
134#define CS421X_IDX_ADC_CFG 0x02
135#define CS421X_IDX_DAC_CFG 0x03
136#define CS421X_IDX_SPK_CTL 0x04
e5f14248 137
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TI
138/* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
139#define CS4213_VENDOR_NID 0x09
e5f14248 140
21a4dc43 141
1077a024 142static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
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TI
143{
144 struct cs_spec *spec = codec->spec;
1077a024
TI
145 snd_hda_codec_write(codec, spec->vendor_nid, 0,
146 AC_VERB_SET_COEF_INDEX, idx);
147 return snd_hda_codec_read(codec, spec->vendor_nid, 0,
148 AC_VERB_GET_PROC_COEF, 0);
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149}
150
1077a024
TI
151static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
152 unsigned int coef)
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153{
154 struct cs_spec *spec = codec->spec;
1077a024
TI
155 snd_hda_codec_write(codec, spec->vendor_nid, 0,
156 AC_VERB_SET_COEF_INDEX, idx);
157 snd_hda_codec_write(codec, spec->vendor_nid, 0,
158 AC_VERB_SET_PROC_COEF, coef);
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159}
160
21a4dc43
TI
161/*
162 * auto-mute and auto-mic switching
56487c27
TH
163 * CS421x auto-output redirecting
164 * HP/SPK/SPDIF
21a4dc43
TI
165 */
166
1077a024 167static void cs_automute(struct hda_codec *codec)
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TI
168{
169 struct cs_spec *spec = codec->spec;
e5f14248 170
1077a024
TI
171 /* mute HPs if spdif jack (SENSE_B) is present */
172 spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
56487c27 173
1077a024 174 snd_hda_gen_update_outputs(codec);
78e2a928 175
be8cf445 176 if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
1f7c6658
TI
177 if (spec->gen.automute_speaker)
178 spec->gpio_data = spec->gen.hp_jack_present ?
179 spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
180 else
181 spec->gpio_data =
182 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
3a385167 183 snd_hda_codec_write(codec, 0x01, 0,
039eb753 184 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
3a385167 185 }
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TI
186}
187
1077a024 188static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
e5f14248 189{
1077a024
TI
190 unsigned int val;
191 val = snd_hda_codec_get_pincfg(codec, nid);
192 return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
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193}
194
1077a024 195static void init_input_coef(struct hda_codec *codec)
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TI
196{
197 struct cs_spec *spec = codec->spec;
40c20fa0 198 unsigned int coef;
e5f14248 199
5660ffd0
DH
200 /* CS420x has multiple ADC, CS421x has single ADC */
201 if (spec->vendor_nid == CS420X_VENDOR_NID) {
16337e02 202 coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
56487c27 203 if (is_active_pin(codec, CS_DMIC2_PIN_NID))
16337e02 204 coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
56487c27 205 if (is_active_pin(codec, CS_DMIC1_PIN_NID))
16337e02 206 coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
56487c27
TH
207 * No effect if SPDIF_OUT2 is
208 * selected in IDX_SPDIF_CTL.
209 */
16337e02
DB
210
211 cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
56487c27 212 }
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TI
213}
214
c42d4782 215static const struct hda_verb cs_coef_init_verbs[] = {
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TI
216 {0x11, AC_VERB_SET_PROC_STATE, 1},
217 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
218 {0x11, AC_VERB_SET_PROC_COEF,
219 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
220 | 0x0040 /* Mute DACs on FIFO error */
221 | 0x1000 /* Enable DACs High Pass Filter */
222 | 0x0400 /* Disable Coefficient Auto increment */
223 )},
829e87e0
TI
224 /* ADC1/2 - Digital and Analog Soft Ramp */
225 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
226 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
40c20fa0 227 /* Beep */
5a83b4b5 228 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
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TI
229 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
230
231 {} /* terminator */
232};
233
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234static const struct hda_verb cs4208_coef_init_verbs[] = {
235 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
236 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
237 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
238 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
239 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
240 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
241 {} /* terminator */
242};
243
a769cbcf
BA
244/* Errata: CS4207 rev C0/C1/C2 Silicon
245 *
246 * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
247 *
248 * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
249 * may be excessive (up to an additional 200 μA), which is most easily
250 * observed while the part is being held in reset (RESET# active low).
251 *
252 * Root Cause: At initial powerup of the device, the logic that drives
253 * the clock and write enable to the S/PDIF SRC RAMs is not properly
254 * initialized.
255 * Certain random patterns will cause a steady leakage current in those
256 * RAM cells. The issue will resolve once the SRCs are used (turned on).
257 *
258 * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
259 * blocks, which will alleviate the issue.
260 */
261
c42d4782 262static const struct hda_verb cs_errata_init_verbs[] = {
a769cbcf
BA
263 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
264 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
265
266 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
267 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
268 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
269 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
270 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
271 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
272
273 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
274 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
275
276 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
277 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
278 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
279 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
280 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
281 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
282 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
283
38c07641 284#if 0 /* Don't to set to D3 as we are in power-up sequence */
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BA
285 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
286 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
287 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
38c07641 288#endif
a769cbcf
BA
289
290 {} /* terminator */
291};
292
40c20fa0 293/* SPDIF setup */
1077a024 294static void init_digital_coef(struct hda_codec *codec)
40c20fa0
TI
295{
296 unsigned int coef;
297
298 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
299 coef |= 0x0008; /* Replace with mute on error */
300 if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
301 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
302 * SPDIF_OUT2 is shared with GPIO1 and
303 * DMIC_SDA2.
304 */
305 cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
e5f14248
TI
306}
307
308static int cs_init(struct hda_codec *codec)
309{
310 struct cs_spec *spec = codec->spec;
311
be8cf445
TI
312 if (spec->vendor_nid == CS420X_VENDOR_NID) {
313 /* init_verb sequence for C0/C1/C2 errata*/
314 snd_hda_sequence_write(codec, cs_errata_init_verbs);
315 snd_hda_sequence_write(codec, cs_coef_init_verbs);
b5bf0a92
BW
316 } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
317 snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
be8cf445 318 }
ed208255 319
1077a024 320 snd_hda_gen_init(codec);
98415eac 321
ed208255
TI
322 if (spec->gpio_mask) {
323 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
324 spec->gpio_mask);
325 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
326 spec->gpio_dir);
327 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
328 spec->gpio_data);
329 }
330
be8cf445
TI
331 if (spec->vendor_nid == CS420X_VENDOR_NID) {
332 init_input_coef(codec);
333 init_digital_coef(codec);
334 }
01a61e12
TI
335
336 return 0;
e5f14248
TI
337}
338
0c52db8c
TI
339static int cs_build_controls(struct hda_codec *codec)
340{
341 int err;
342
343 err = snd_hda_gen_build_controls(codec);
344 if (err < 0)
345 return err;
346 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
347 return 0;
348}
349
1077a024 350#define cs_free snd_hda_gen_free
e5f14248 351
c42d4782 352static const struct hda_codec_ops cs_patch_ops = {
0c52db8c 353 .build_controls = cs_build_controls,
1077a024 354 .build_pcms = snd_hda_gen_build_pcms,
e5f14248
TI
355 .init = cs_init,
356 .free = cs_free,
5c2e4e0a 357 .unsol_event = snd_hda_jack_unsol_event,
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TI
358};
359
360static int cs_parse_auto_config(struct hda_codec *codec)
361{
362 struct cs_spec *spec = codec->spec;
363 int err;
de3df8a9 364 int i;
e5f14248 365
1077a024 366 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
ed208255
TI
367 if (err < 0)
368 return err;
369
1077a024 370 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
e5f14248
TI
371 if (err < 0)
372 return err;
1077a024 373
de3df8a9
TI
374 /* keep the ADCs powered up when it's dynamically switchable */
375 if (spec->gen.dyn_adc_switch) {
376 unsigned int done = 0;
377 for (i = 0; i < spec->gen.input_mux.num_items; i++) {
378 int idx = spec->gen.dyn_adc_idx[i];
379 if (done & (1 << idx))
380 continue;
381 snd_hda_gen_fix_pin_power(codec,
382 spec->gen.adc_nids[idx]);
383 done |= 1 << idx;
384 }
385 }
386
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TI
387 return 0;
388}
389
b35aabd7
TI
390static const struct hda_model_fixup cs420x_models[] = {
391 { .id = CS420X_MBP53, .name = "mbp53" },
392 { .id = CS420X_MBP55, .name = "mbp55" },
393 { .id = CS420X_IMAC27, .name = "imac27" },
394 { .id = CS420X_IMAC27_122, .name = "imac27_122" },
395 { .id = CS420X_APPLE, .name = "apple" },
ef596a57 396 { .id = CS420X_MBP101, .name = "mbp101" },
ffe4d12b 397 { .id = CS420X_MBP81, .name = "mbp81" },
6ab982e8 398 { .id = CS420X_MBA42, .name = "mba42" },
b35aabd7 399 {}
a6bae205
TI
400};
401
b35aabd7 402static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
4e7d7c60 403 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
87232dd4 404 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
a6bae205 405 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
f46119b7 406 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
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TI
407 /* this conflicts with too many other models */
408 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
6dfeb703 409
b35aabd7 410 /* codec SSID */
ffe4d12b 411 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
7e5bea19 412 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
ef596a57 413 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
2ddee91a 414 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
6ab982e8 415 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
6dfeb703 416 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
a6bae205
TI
417 {} /* terminator */
418};
419
b35aabd7 420static const struct hda_pintbl mbp53_pincfgs[] = {
4e7d7c60
VW
421 { 0x09, 0x012b4050 },
422 { 0x0a, 0x90100141 },
423 { 0x0b, 0x90100140 },
424 { 0x0c, 0x018b3020 },
425 { 0x0d, 0x90a00110 },
426 { 0x0e, 0x400000f0 },
427 { 0x0f, 0x01cbe030 },
428 { 0x10, 0x014be060 },
429 { 0x12, 0x400000f0 },
430 { 0x15, 0x400000f0 },
431 {} /* terminator */
432};
433
b35aabd7 434static const struct hda_pintbl mbp55_pincfgs[] = {
a6bae205
TI
435 { 0x09, 0x012b4030 },
436 { 0x0a, 0x90100121 },
437 { 0x0b, 0x90100120 },
438 { 0x0c, 0x400000f0 },
439 { 0x0d, 0x90a00110 },
440 { 0x0e, 0x400000f0 },
441 { 0x0f, 0x400000f0 },
442 { 0x10, 0x014be040 },
443 { 0x12, 0x400000f0 },
444 { 0x15, 0x400000f0 },
445 {} /* terminator */
446};
447
b35aabd7 448static const struct hda_pintbl imac27_pincfgs[] = {
1a5ba2e9
RAE
449 { 0x09, 0x012b4050 },
450 { 0x0a, 0x90100140 },
451 { 0x0b, 0x90100142 },
452 { 0x0c, 0x018b3020 },
453 { 0x0d, 0x90a00110 },
454 { 0x0e, 0x400000f0 },
455 { 0x0f, 0x01cbe030 },
456 { 0x10, 0x014be060 },
457 { 0x12, 0x01ab9070 },
458 { 0x15, 0x400000f0 },
459 {} /* terminator */
460};
461
ef596a57
TI
462static const struct hda_pintbl mbp101_pincfgs[] = {
463 { 0x0d, 0x40ab90f0 },
464 { 0x0e, 0x90a600f0 },
465 { 0x12, 0x50a600f0 },
466 {} /* terminator */
467};
468
6ab982e8
TI
469static const struct hda_pintbl mba42_pincfgs[] = {
470 { 0x09, 0x012b4030 }, /* HP */
471 { 0x0a, 0x400000f0 },
472 { 0x0b, 0x90100120 }, /* speaker */
473 { 0x0c, 0x400000f0 },
474 { 0x0d, 0x90a00110 }, /* mic */
475 { 0x0e, 0x400000f0 },
476 { 0x0f, 0x400000f0 },
477 { 0x10, 0x400000f0 },
478 { 0x12, 0x400000f0 },
479 { 0x15, 0x400000f0 },
480 {} /* terminator */
481};
482
b5bf0a92
BW
483static const struct hda_pintbl mba6_pincfgs[] = {
484 { 0x10, 0x032120f0 }, /* HP */
485 { 0x11, 0x500000f0 },
486 { 0x12, 0x90100010 }, /* Speaker */
487 { 0x13, 0x500000f0 },
488 { 0x14, 0x500000f0 },
489 { 0x15, 0x770000f0 },
490 { 0x16, 0x770000f0 },
491 { 0x17, 0x430000f0 },
492 { 0x18, 0x43ab9030 }, /* Mic */
493 { 0x19, 0x770000f0 },
494 { 0x1a, 0x770000f0 },
495 { 0x1b, 0x770000f0 },
496 { 0x1c, 0x90a00090 },
497 { 0x1d, 0x500000f0 },
498 { 0x1e, 0x500000f0 },
499 { 0x1f, 0x500000f0 },
500 { 0x20, 0x500000f0 },
501 { 0x21, 0x430000f0 },
502 { 0x22, 0x430000f0 },
503 {} /* terminator */
504};
505
b35aabd7
TI
506static void cs420x_fixup_gpio_13(struct hda_codec *codec,
507 const struct hda_fixup *fix, int action)
508{
509 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
510 struct cs_spec *spec = codec->spec;
511 spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
512 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
513 spec->gpio_mask = spec->gpio_dir =
514 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
515 }
516}
a6bae205 517
b35aabd7
TI
518static void cs420x_fixup_gpio_23(struct hda_codec *codec,
519 const struct hda_fixup *fix, int action)
a6bae205 520{
b35aabd7
TI
521 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
522 struct cs_spec *spec = codec->spec;
523 spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
524 spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
525 spec->gpio_mask = spec->gpio_dir =
526 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
527 }
a6bae205
TI
528}
529
b35aabd7
TI
530static const struct hda_fixup cs420x_fixups[] = {
531 [CS420X_MBP53] = {
532 .type = HDA_FIXUP_PINS,
533 .v.pins = mbp53_pincfgs,
534 .chained = true,
535 .chain_id = CS420X_APPLE,
536 },
537 [CS420X_MBP55] = {
538 .type = HDA_FIXUP_PINS,
539 .v.pins = mbp55_pincfgs,
540 .chained = true,
541 .chain_id = CS420X_GPIO_13,
542 },
543 [CS420X_IMAC27] = {
544 .type = HDA_FIXUP_PINS,
545 .v.pins = imac27_pincfgs,
546 .chained = true,
547 .chain_id = CS420X_GPIO_13,
548 },
549 [CS420X_GPIO_13] = {
550 .type = HDA_FIXUP_FUNC,
551 .v.func = cs420x_fixup_gpio_13,
552 },
553 [CS420X_GPIO_23] = {
554 .type = HDA_FIXUP_FUNC,
555 .v.func = cs420x_fixup_gpio_23,
556 },
ef596a57
TI
557 [CS420X_MBP101] = {
558 .type = HDA_FIXUP_PINS,
559 .v.pins = mbp101_pincfgs,
560 .chained = true,
ef596a57
TI
561 .chain_id = CS420X_GPIO_13,
562 },
ffe4d12b
TI
563 [CS420X_MBP81] = {
564 .type = HDA_FIXUP_VERBS,
565 .v.verbs = (const struct hda_verb[]) {
566 /* internal mic ADC2: right only, single ended */
567 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
568 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
569 {}
570 },
571 .chained = true,
572 .chain_id = CS420X_GPIO_13,
573 },
6ab982e8
TI
574 [CS420X_MBA42] = {
575 .type = HDA_FIXUP_PINS,
576 .v.pins = mba42_pincfgs,
577 .chained = true,
578 .chain_id = CS420X_GPIO_13,
579 },
b35aabd7
TI
580};
581
1077a024 582static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
e5f14248
TI
583{
584 struct cs_spec *spec;
e5f14248
TI
585
586 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
587 if (!spec)
1077a024 588 return NULL;
e5f14248 589 codec->spec = spec;
1077a024 590 spec->vendor_nid = vendor_nid;
3e19fec3 591 codec->power_save_node = 1;
1077a024
TI
592 snd_hda_gen_spec_init(&spec->gen);
593
594 return spec;
595}
596
597static int patch_cs420x(struct hda_codec *codec)
598{
599 struct cs_spec *spec;
600 int err;
e5f14248 601
1077a024
TI
602 spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
603 if (!spec)
604 return -ENOMEM;
56487c27 605
225068ab 606 codec->patch_ops = cs_patch_ops;
6d3073e1 607 spec->gen.automute_hook = cs_automute;
bad994f5 608 codec->single_adc_amp = 1;
6d3073e1 609
b35aabd7
TI
610 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
611 cs420x_fixups);
612 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
e5f14248 613
ed208255 614 err = cs_parse_auto_config(codec);
21a4dc43
TI
615 if (err < 0)
616 goto error;
617
b35aabd7
TI
618 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
619
e5f14248
TI
620 return 0;
621
622 error:
c5e0b6db 623 cs_free(codec);
e5f14248
TI
624 return err;
625}
626
be8cf445
TI
627/*
628 * CS4208 support:
b5bf0a92 629 * Its layout is no longer compatible with CS4206/CS4207
be8cf445
TI
630 */
631enum {
885845d7 632 CS4208_MAC_AUTO,
b5bf0a92 633 CS4208_MBA6,
0c52db8c 634 CS4208_MBP11,
2154cc0e 635 CS4208_MACMINI,
be8cf445
TI
636 CS4208_GPIO0,
637};
638
639static const struct hda_model_fixup cs4208_models[] = {
640 { .id = CS4208_GPIO0, .name = "gpio0" },
b5bf0a92 641 { .id = CS4208_MBA6, .name = "mba6" },
0c52db8c 642 { .id = CS4208_MBP11, .name = "mbp11" },
2154cc0e 643 { .id = CS4208_MACMINI, .name = "macmini" },
be8cf445
TI
644 {}
645};
646
647static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
885845d7
TI
648 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
649 {} /* terminator */
650};
651
652/* codec SSID matching */
653static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
0c52db8c 654 SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
2154cc0e 655 SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
b5bf0a92
BW
656 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
657 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
e8ff581f 658 SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
be8cf445
TI
659 {} /* terminator */
660};
661
662static void cs4208_fixup_gpio0(struct hda_codec *codec,
663 const struct hda_fixup *fix, int action)
664{
665 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
666 struct cs_spec *spec = codec->spec;
667 spec->gpio_eapd_hp = 0;
668 spec->gpio_eapd_speaker = 1;
669 spec->gpio_mask = spec->gpio_dir =
670 spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
671 }
672}
673
885845d7
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674static const struct hda_fixup cs4208_fixups[];
675
676/* remap the fixup from codec SSID and apply it */
677static void cs4208_fixup_mac(struct hda_codec *codec,
678 const struct hda_fixup *fix, int action)
679{
680 if (action != HDA_FIXUP_ACT_PRE_PROBE)
681 return;
f5662e1c
DH
682
683 codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
885845d7 684 snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
f5662e1c 685 if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
885845d7
TI
686 codec->fixup_id = CS4208_GPIO0; /* default fixup */
687 snd_hda_apply_fixup(codec, action);
688}
689
2154cc0e
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690/* MacMini 7,1 has the inverted jack detection */
691static void cs4208_fixup_macmini(struct hda_codec *codec,
692 const struct hda_fixup *fix, int action)
693{
694 static const struct hda_pintbl pincfgs[] = {
695 { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */
696 { 0x21, 0x004be140 }, /* SPDIF: disable detect */
697 { }
698 };
699
700 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
701 /* HP pin (0x10) has an inverted detection */
702 codec->inv_jack_detect = 1;
703 /* disable the bogus Mic and SPDIF jack detections */
704 snd_hda_apply_pincfgs(codec, pincfgs);
705 }
706}
707
0c52db8c
TI
708static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
709 struct snd_ctl_elem_value *ucontrol)
710{
711 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
712 struct cs_spec *spec = codec->spec;
713 hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
714 int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
715
716 snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
717 return spec->spdif_sw_put(kcontrol, ucontrol);
718}
719
720/* hook the SPDIF switch */
721static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
722 const struct hda_fixup *fix, int action)
723{
724 if (action == HDA_FIXUP_ACT_BUILD) {
725 struct cs_spec *spec = codec->spec;
726 struct snd_kcontrol *kctl;
727
728 if (!spec->gen.autocfg.dig_out_pins[0])
729 return;
730 kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
731 if (!kctl)
732 return;
733 spec->spdif_sw_put = kctl->put;
734 kctl->put = cs4208_spdif_sw_put;
735 }
736}
737
be8cf445 738static const struct hda_fixup cs4208_fixups[] = {
b5bf0a92
BW
739 [CS4208_MBA6] = {
740 .type = HDA_FIXUP_PINS,
741 .v.pins = mba6_pincfgs,
742 .chained = true,
743 .chain_id = CS4208_GPIO0,
744 },
0c52db8c
TI
745 [CS4208_MBP11] = {
746 .type = HDA_FIXUP_FUNC,
747 .v.func = cs4208_fixup_spdif_switch,
748 .chained = true,
749 .chain_id = CS4208_GPIO0,
750 },
2154cc0e
TI
751 [CS4208_MACMINI] = {
752 .type = HDA_FIXUP_FUNC,
753 .v.func = cs4208_fixup_macmini,
754 .chained = true,
755 .chain_id = CS4208_GPIO0,
756 },
be8cf445
TI
757 [CS4208_GPIO0] = {
758 .type = HDA_FIXUP_FUNC,
759 .v.func = cs4208_fixup_gpio0,
760 },
885845d7
TI
761 [CS4208_MAC_AUTO] = {
762 .type = HDA_FIXUP_FUNC,
763 .v.func = cs4208_fixup_mac,
764 },
be8cf445
TI
765};
766
b5bf0a92
BW
767/* correct the 0dB offset of input pins */
768static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
769{
770 unsigned int caps;
771
772 caps = query_amp_caps(codec, adc, HDA_INPUT);
773 caps &= ~(AC_AMPCAP_OFFSET);
774 caps |= 0x02;
775 snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
776}
777
be8cf445
TI
778static int patch_cs4208(struct hda_codec *codec)
779{
780 struct cs_spec *spec;
781 int err;
782
b5bf0a92 783 spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
be8cf445
TI
784 if (!spec)
785 return -ENOMEM;
786
225068ab 787 codec->patch_ops = cs_patch_ops;
be8cf445 788 spec->gen.automute_hook = cs_automute;
a1114a8c
TI
789 /* exclude NID 0x10 (HP) from output volumes due to different steps */
790 spec->gen.out_vol_mask = 1ULL << 0x10;
be8cf445
TI
791
792 snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
793 cs4208_fixups);
794 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
795
b5bf0a92
BW
796 snd_hda_override_wcaps(codec, 0x18,
797 get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
798 cs4208_fix_amp_caps(codec, 0x18);
799 cs4208_fix_amp_caps(codec, 0x1b);
800 cs4208_fix_amp_caps(codec, 0x1c);
801
be8cf445
TI
802 err = cs_parse_auto_config(codec);
803 if (err < 0)
804 goto error;
805
be8cf445
TI
806 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
807
808 return 0;
809
810 error:
811 cs_free(codec);
812 return err;
813}
814
56487c27
TH
815/*
816 * Cirrus Logic CS4210
817 *
818 * 1 DAC => HP(sense) / Speakers,
819 * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
820 * 1 SPDIF OUT => SPDIF Trasmitter(sense)
821*/
822
823/* CS4210 board names */
b35aabd7
TI
824static const struct hda_model_fixup cs421x_models[] = {
825 { .id = CS421X_CDB4210, .name = "cdb4210" },
4af16107 826 { .id = CS421X_STUMPY, .name = "stumpy" },
b35aabd7 827 {}
56487c27
TH
828};
829
b35aabd7 830static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
56487c27
TH
831 /* Test Intel board + CDB2410 */
832 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
833 {} /* terminator */
834};
835
836/* CS4210 board pinconfigs */
837/* Default CS4210 (CDB4210)*/
b35aabd7 838static const struct hda_pintbl cdb4210_pincfgs[] = {
56487c27
TH
839 { 0x05, 0x0321401f },
840 { 0x06, 0x90170010 },
841 { 0x07, 0x03813031 },
842 { 0x08, 0xb7a70037 },
843 { 0x09, 0xb7a6003e },
844 { 0x0a, 0x034510f0 },
845 {} /* terminator */
846};
847
4af16107
DR
848/* Stumpy ChromeBox */
849static const struct hda_pintbl stumpy_pincfgs[] = {
850 { 0x05, 0x022120f0 },
851 { 0x06, 0x901700f0 },
852 { 0x07, 0x02a120f0 },
853 { 0x08, 0x77a70037 },
854 { 0x09, 0x77a6003e },
855 { 0x0a, 0x434510f0 },
856 {} /* terminator */
857};
858
b35aabd7
TI
859/* Setup GPIO/SENSE for each board (if used) */
860static void cs421x_fixup_sense_b(struct hda_codec *codec,
861 const struct hda_fixup *fix, int action)
862{
863 struct cs_spec *spec = codec->spec;
864 if (action == HDA_FIXUP_ACT_PRE_PROBE)
865 spec->sense_b = 1;
866}
867
868static const struct hda_fixup cs421x_fixups[] = {
869 [CS421X_CDB4210] = {
870 .type = HDA_FIXUP_PINS,
871 .v.pins = cdb4210_pincfgs,
872 .chained = true,
873 .chain_id = CS421X_SENSE_B,
874 },
875 [CS421X_SENSE_B] = {
876 .type = HDA_FIXUP_FUNC,
877 .v.func = cs421x_fixup_sense_b,
4af16107
DR
878 },
879 [CS421X_STUMPY] = {
880 .type = HDA_FIXUP_PINS,
881 .v.pins = stumpy_pincfgs,
882 },
56487c27
TH
883};
884
885static const struct hda_verb cs421x_coef_init_verbs[] = {
886 {0x0B, AC_VERB_SET_PROC_STATE, 1},
887 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
888 /*
889 Disable Coefficient Index Auto-Increment(DAI)=1,
890 PDREF=0
891 */
892 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
893
894 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
895 /* ADC SZCMode = Digital Soft Ramp */
896 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
897
898 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
899 {0x0B, AC_VERB_SET_PROC_COEF,
900 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
901 | 0x0004 /* Mute DAC on FIFO error */
902 | 0x0008 /* Enable DAC High Pass Filter */
903 )},
904 {} /* terminator */
905};
906
907/* Errata: CS4210 rev A1 Silicon
908 *
909 * http://www.cirrus.com/en/pubs/errata/
910 *
911 * Description:
912 * 1. Performance degredation is present in the ADC.
913 * 2. Speaker output is not completely muted upon HP detect.
914 * 3. Noise is present when clipping occurs on the amplified
915 * speaker outputs.
916 *
917 * Workaround:
918 * The following verb sequence written to the registers during
919 * initialization will correct the issues listed above.
920 */
921
922static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
923 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
924
925 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
926 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
927
928 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
929 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
930
931 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
932 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
933
934 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
935 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
936
937 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
938 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
939
940 {} /* terminator */
941};
942
943/* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
944static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
945
946static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_info *uinfo)
948{
949 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
950 uinfo->count = 1;
951 uinfo->value.integer.min = 0;
952 uinfo->value.integer.max = 3;
953 return 0;
954}
955
956static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol)
958{
959 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
960
961 ucontrol->value.integer.value[0] =
962 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
963 return 0;
964}
965
966static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
967 struct snd_ctl_elem_value *ucontrol)
968{
969 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
970
971 unsigned int vol = ucontrol->value.integer.value[0];
972 unsigned int coef =
973 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
974 unsigned int original_coef = coef;
975
976 coef &= ~0x0003;
977 coef |= (vol & 0x0003);
978 if (original_coef == coef)
979 return 0;
980 else {
981 cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
982 return 1;
983 }
984}
985
1077a024 986static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
56487c27
TH
987
988 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
989 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
990 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
991 .name = "Speaker Boost Playback Volume",
992 .info = cs421x_boost_vol_info,
993 .get = cs421x_boost_vol_get,
994 .put = cs421x_boost_vol_put,
995 .tlv = { .p = cs421x_speaker_boost_db_scale },
996};
997
5660ffd0 998static void cs4210_pinmux_init(struct hda_codec *codec)
56487c27
TH
999{
1000 struct cs_spec *spec = codec->spec;
1001 unsigned int def_conf, coef;
1002
1003 /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
1004 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1005
1006 if (spec->gpio_mask)
1007 coef |= 0x0008; /* B1,B2 are GPIOs */
1008 else
1009 coef &= ~0x0008;
1010
1011 if (spec->sense_b)
1012 coef |= 0x0010; /* B2 is SENSE_B, not inverted */
1013 else
1014 coef &= ~0x0010;
1015
1016 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1017
1018 if ((spec->gpio_mask || spec->sense_b) &&
1019 is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
1020
1021 /*
1022 GPIO or SENSE_B forced - disconnect the DMIC pin.
1023 */
1024 def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
1025 def_conf &= ~AC_DEFCFG_PORT_CONN;
1026 def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
1027 snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
1028 }
1029}
1030
1077a024 1031static void cs4210_spdif_automute(struct hda_codec *codec,
1a4f69d5 1032 struct hda_jack_callback *tbl)
56487c27
TH
1033{
1034 struct cs_spec *spec = codec->spec;
1077a024
TI
1035 bool spdif_present = false;
1036 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
1037
1038 /* detect on spdif is specific to CS4210 */
1039 if (!spec->spdif_detect ||
1040 spec->vendor_nid != CS4210_VENDOR_NID)
1041 return;
1042
1043 spdif_present = snd_hda_jack_detect(codec, spdif_pin);
1044 if (spdif_present == spec->spdif_present)
1045 return;
1046
1047 spec->spdif_present = spdif_present;
1048 /* SPDIF TX on/off */
44008f08 1049 snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
56487c27 1050
1077a024
TI
1051 cs_automute(codec);
1052}
1053
1054static void parse_cs421x_digital(struct hda_codec *codec)
1055{
1056 struct cs_spec *spec = codec->spec;
1057 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
1058 int i;
56487c27
TH
1059
1060 for (i = 0; i < cfg->dig_outs; i++) {
1061 hda_nid_t nid = cfg->dig_out_pins[i];
56487c27 1062 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
56487c27 1063 spec->spdif_detect = 1;
1077a024 1064 snd_hda_jack_detect_enable_callback(codec, nid,
1077a024 1065 cs4210_spdif_automute);
56487c27
TH
1066 }
1067 }
1068}
1069
1070static int cs421x_init(struct hda_codec *codec)
1071{
1072 struct cs_spec *spec = codec->spec;
1073
5660ffd0
DH
1074 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1075 snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
1076 snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
1077 cs4210_pinmux_init(codec);
1078 }
56487c27 1079
1077a024
TI
1080 snd_hda_gen_init(codec);
1081
56487c27
TH
1082 if (spec->gpio_mask) {
1083 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
1084 spec->gpio_mask);
1085 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
1086 spec->gpio_dir);
1087 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
1088 spec->gpio_data);
1089 }
1090
1077a024 1091 init_input_coef(codec);
56487c27 1092
1077a024 1093 cs4210_spdif_automute(codec, NULL);
56487c27
TH
1094
1095 return 0;
1096}
1097
1077a024 1098static int cs421x_build_controls(struct hda_codec *codec)
56487c27 1099{
56487c27 1100 struct cs_spec *spec = codec->spec;
56487c27 1101 int err;
56487c27 1102
1077a024 1103 err = snd_hda_gen_build_controls(codec);
56487c27
TH
1104 if (err < 0)
1105 return err;
56487c27 1106
1077a024
TI
1107 if (spec->gen.autocfg.speaker_outs &&
1108 spec->vendor_nid == CS4210_VENDOR_NID) {
56487c27 1109 err = snd_hda_ctl_add(codec, 0,
1077a024 1110 snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
56487c27
TH
1111 if (err < 0)
1112 return err;
1113 }
01a61e12 1114 return 0;
56487c27
TH
1115}
1116
1077a024 1117static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
56487c27 1118{
1077a024 1119 unsigned int caps;
56487c27 1120
1077a024
TI
1121 /* set the upper-limit for mixer amp to 0dB */
1122 caps = query_amp_caps(codec, dac, HDA_OUTPUT);
1123 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
1124 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
1125 << AC_AMPCAP_NUM_STEPS_SHIFT;
1126 snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
56487c27
TH
1127}
1128
1129static int cs421x_parse_auto_config(struct hda_codec *codec)
1130{
1131 struct cs_spec *spec = codec->spec;
1077a024 1132 hda_nid_t dac = CS4210_DAC_NID;
56487c27
TH
1133 int err;
1134
1077a024
TI
1135 fix_volume_caps(codec, dac);
1136
1137 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
56487c27
TH
1138 if (err < 0)
1139 return err;
1077a024
TI
1140
1141 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
56487c27
TH
1142 if (err < 0)
1143 return err;
1077a024
TI
1144
1145 parse_cs421x_digital(codec);
56487c27
TH
1146 return 0;
1147}
1148
1149#ifdef CONFIG_PM
1150/*
1151 Manage PDREF, when transitioning to D3hot
1152 (DAC,ADC) -> D3, PDREF=1, AFG->D3
1153*/
68cb2b55 1154static int cs421x_suspend(struct hda_codec *codec)
56487c27 1155{
5660ffd0 1156 struct cs_spec *spec = codec->spec;
56487c27
TH
1157 unsigned int coef;
1158
1159 snd_hda_shutup_pins(codec);
1160
1161 snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
1162 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1163 snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
1164 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1165
5660ffd0
DH
1166 if (spec->vendor_nid == CS4210_VENDOR_NID) {
1167 coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
1168 coef |= 0x0004; /* PDREF */
1169 cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
1170 }
56487c27
TH
1171
1172 return 0;
1173}
1174#endif
1175
00e17f76 1176static const struct hda_codec_ops cs421x_patch_ops = {
56487c27 1177 .build_controls = cs421x_build_controls,
1077a024 1178 .build_pcms = snd_hda_gen_build_pcms,
56487c27
TH
1179 .init = cs421x_init,
1180 .free = cs_free,
5c2e4e0a 1181 .unsol_event = snd_hda_jack_unsol_event,
56487c27
TH
1182#ifdef CONFIG_PM
1183 .suspend = cs421x_suspend,
1184#endif
1185};
1186
5660ffd0 1187static int patch_cs4210(struct hda_codec *codec)
56487c27
TH
1188{
1189 struct cs_spec *spec;
1190 int err;
1191
1077a024 1192 spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
56487c27
TH
1193 if (!spec)
1194 return -ENOMEM;
56487c27 1195
225068ab 1196 codec->patch_ops = cs421x_patch_ops;
6d3073e1
TI
1197 spec->gen.automute_hook = cs_automute;
1198
b35aabd7
TI
1199 snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
1200 cs421x_fixups);
1201 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
56487c27
TH
1202
1203 /*
1204 Update the GPIO/DMIC/SENSE_B pinmux before the configuration
1205 is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
1206 is disabled.
1207 */
5660ffd0 1208 cs4210_pinmux_init(codec);
56487c27
TH
1209
1210 err = cs421x_parse_auto_config(codec);
1211 if (err < 0)
1212 goto error;
1213
b35aabd7
TI
1214 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
1215
5660ffd0
DH
1216 return 0;
1217
1218 error:
c5e0b6db 1219 cs_free(codec);
5660ffd0
DH
1220 return err;
1221}
1222
1223static int patch_cs4213(struct hda_codec *codec)
1224{
1225 struct cs_spec *spec;
1226 int err;
1227
1077a024 1228 spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
5660ffd0
DH
1229 if (!spec)
1230 return -ENOMEM;
5660ffd0 1231
225068ab
TI
1232 codec->patch_ops = cs421x_patch_ops;
1233
5660ffd0
DH
1234 err = cs421x_parse_auto_config(codec);
1235 if (err < 0)
1236 goto error;
56487c27
TH
1237
1238 return 0;
1239
1240 error:
c5e0b6db 1241 cs_free(codec);
56487c27
TH
1242 return err;
1243}
1244
e5f14248
TI
1245
1246/*
1247 * patch entries
1248 */
b9a94a9c
TI
1249static const struct hda_device_id snd_hda_id_cirrus[] = {
1250 HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
1251 HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
1252 HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
1253 HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
1254 HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
e5f14248
TI
1255 {} /* terminator */
1256};
b9a94a9c 1257MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus);
e5f14248
TI
1258
1259MODULE_LICENSE("GPL");
1260MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
1261
d8a766a1 1262static struct hda_codec_driver cirrus_driver = {
b9a94a9c 1263 .id = snd_hda_id_cirrus,
e5f14248
TI
1264};
1265
d8a766a1 1266module_hda_codec_driver(cirrus_driver);
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