Merge remote-tracking branch 'tty/tty-next'

[deliverable/linux.git] / drivers / dma / dw / core.c

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 12eedd45719399734b48e7b6b08cfa658c0698a9..c2c0a613cb7aab53ac5f8e85c6c7441ecc7ef3fc 100644 (file)
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -46,9 +46,9 @@
                u8 _dmsize = _is_slave ? _sconfig->dst_maxburst :       \
                        DW_DMA_MSIZE_16;                        \
                u8 _dms = (_dwc->direction == DMA_MEM_TO_DEV) ?         \
-                       _dwc->p_master : _dwc->m_master;                \
+                       _dwc->dws.p_master : _dwc->dws.m_master;        \
                u8 _sms = (_dwc->direction == DMA_DEV_TO_MEM) ?         \
-                       _dwc->p_master : _dwc->m_master;                \
+                       _dwc->dws.p_master : _dwc->dws.m_master;        \
                                                                \
                (DWC_CTLL_DST_MSIZE(_dmsize)                    \
                 | DWC_CTLL_SRC_MSIZE(_smsize)                  \
@@ -143,12 +143,16 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
        struct dw_dma *dw = to_dw_dma(dwc->chan.device);
        u32 cfghi = DWC_CFGH_FIFO_MODE;
        u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
+       bool hs_polarity = dwc->dws.hs_polarity;
 
        if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
                return;
 
-       cfghi |= DWC_CFGH_DST_PER(dwc->dst_id);
-       cfghi |= DWC_CFGH_SRC_PER(dwc->src_id);
+       cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
+       cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
+
+       /* Set polarity of handshake interface */
+       cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
 
        channel_writel(dwc, CFG_LO, cfglo);
        channel_writel(dwc, CFG_HI, cfghi);
@@ -209,7 +213,7 @@ static inline void dwc_do_single_block(struct dw_dma_chan *dwc,
 static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
 {
        struct dw_dma   *dw = to_dw_dma(dwc->chan.device);
-       u8              lms = DWC_LLP_LMS(dwc->m_master);
+       u8              lms = DWC_LLP_LMS(dwc->dws.m_master);
        unsigned long   was_soft_llp;
 
        /* ASSERT:  channel is idle */
@@ -660,7 +664,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
        struct dw_desc          *prev;
        size_t                  xfer_count;
        size_t                  offset;
-       u8                      m_master = dwc->m_master;
+       u8                      m_master = dwc->dws.m_master;
        unsigned int            src_width;
        unsigned int            dst_width;
        unsigned int            data_width = dw->pdata->data_width[m_master];
@@ -738,7 +742,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
        struct dw_desc          *prev;
        struct dw_desc          *first;
        u32                     ctllo;
-       u8                      m_master = dwc->m_master;
+       u8                      m_master = dwc->dws.m_master;
        u8                      lms = DWC_LLP_LMS(m_master);
        dma_addr_t              reg;
        unsigned int            reg_width;
@@ -893,12 +897,7 @@ bool dw_dma_filter(struct dma_chan *chan, void *param)
                return false;
 
        /* We have to copy data since dws can be temporary storage */
-
-       dwc->src_id = dws->src_id;
-       dwc->dst_id = dws->dst_id;
-
-       dwc->m_master = dws->m_master;
-       dwc->p_master = dws->p_master;
+       memcpy(&dwc->dws, dws, sizeof(struct dw_dma_slave));
 
        return true;
 }
@@ -1165,11 +1164,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
        spin_lock_irqsave(&dwc->lock, flags);
 
        /* Clear custom channel configuration */
-       dwc->src_id = 0;
-       dwc->dst_id = 0;
-
-       dwc->m_master = 0;
-       dwc->p_master = 0;
+       memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));
 
        clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
 
@@ -1262,7 +1257,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
        struct dw_cyclic_desc           *retval = NULL;
        struct dw_desc                  *desc;
        struct dw_desc                  *last = NULL;
-       u8                              lms = DWC_LLP_LMS(dwc->m_master);
+       u8                              lms = DWC_LLP_LMS(dwc->dws.m_master);
        unsigned long                   was_cyclic;
        unsigned int                    reg_width;
        unsigned int                    periods;
@@ -1574,11 +1569,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
                                (dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
                } else {
                        dwc->block_size = pdata->block_size;
-
-                       /* Check if channel supports multi block transfer */
-                       channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
-                       dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
-                       channel_writel(dwc, LLP, 0);
+                       dwc->nollp = pdata->is_nollp;
                }
        }