arm/arm64: KVM: Support edge-triggered forwarded interrupts
authorChristoffer Dall <christoffer.dall@linaro.org>
Fri, 4 Sep 2015 19:25:12 +0000 (21:25 +0200)
committerChristoffer Dall <christoffer.dall@linaro.org>
Thu, 22 Oct 2015 21:01:44 +0000 (23:01 +0200)
commit8fe2f19e6e6015911bdd4cfcdb23a32e146ba570
treeaba5549ec12b1ef1542df6d32c89e878543acf7f
parent4b4b4512da2a844b8da2585609b67fae1ce4f4db
arm/arm64: KVM: Support edge-triggered forwarded interrupts

We mark edge-triggered interrupts with the HW bit set as queued to
prevent the VGIC code from injecting LRs with both the Active and
Pending bits set at the same time while also setting the HW bit,
because the hardware does not support this.

However, this means that we must also clear the queued flag when we sync
back a LR where the state on the physical distributor went from active
to inactive because the guest deactivated the interrupt.  At this point
we must also check if the interrupt is pending on the distributor, and
tell the VGIC to queue it again if it is.

Since these actions on the sync path are extremely close to those for
level-triggered interrupts, rename process_level_irq to
process_queued_irq, allowing it to cater for both cases.

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
virt/kvm/arm/vgic.c
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