irqchip/gic-v3: Change unsigned types for AArch32 compatibility
authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Thu, 1 Oct 2015 12:47:15 +0000 (13:47 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Fri, 9 Oct 2015 22:11:52 +0000 (23:11 +0100)
commitf6c86a41e1dc2214363b00cc0eadb8a5401c892d
treeff47035d9a9b35c2b1aab591a26a8eb68eb396cf
parent7936e914f7b0827c2dcfe63fbefdc21de2d61dcb
irqchip/gic-v3: Change unsigned types for AArch32 compatibility

This patch does a few simple compatibility-related changes:
- change the system register access prototypes to their actual size,
- homogenise mpidr accesses with unsigned long,
- force the 64bit register values to unsigned long long.

Note: the list registers are 64bit on GICv3, but the AArch32 vGIC driver
will need to split their values into two 32bit registers: LRn and LRCn.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/asm/arch_gicv3.h
drivers/irqchip/irq-gic-v3.c
include/linux/irqchip/arm-gic-v3.h
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