ARM: dts: imx6q-sabrelite: add ecspi1 pinctrl support
authorHui Wang <jason77.wang@gmail.com>
Wed, 20 Jun 2012 06:41:50 +0000 (14:41 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Thu, 12 Jul 2012 06:59:11 +0000 (14:59 +0800)
Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b,
we need to add pinctrl information for it in the dts, otherwise the
ecspi1 driver can't work and the connected flash is wrongly
detected as a mr25h256 flash like this:

m25p80 spi32766.0: found mr25h256, expected sst25vf016b
m25p80 spi32766.0: mr25h256 (32 Kbytes)

Cc: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q.dtsi

index 46fdfd1d5cd12f2d1b4003497c38aa41594d3bf8..d42e851ceb97e423fd785e3cd357ba6d70b23d8c 100644 (file)
@@ -27,6 +27,8 @@
                                ecspi@02008000 { /* eCSPI1 */
                                        fsl,spi-num-chipselects = <1>;
                                        cs-gpios = <&gpio3 19 0>;
+                                       pinctrl-names = "default";
+                                       pinctrl-0 = <&pinctrl_ecspi1_1>;
                                        status = "okay";
 
                                        flash: m25p80@0 {
@@ -50,6 +52,7 @@
                                        pinctrl_gpio_hog: gpiohog {
                                                fsl,pins = <
                                                           144  0x80000000      /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
+                                                          121  0x80000000      /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
                                                           >;
                                        };
                                };
index 693f31f206ddb355ee1673e8603546c1a2cd1610..c25d49584814aade377b4c57f964967ec1f71a09 100644 (file)
                                                            1517 0x17059>;      /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
                                        };
                                };
+
+                               ecspi1 {
+                                       pinctrl_ecspi1_1: ecspi1grp-1 {
+                                               fsl,pins = <101 0x100b1         /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
+                                                           109 0x100b1         /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
+                                                           94  0x100b1>;       /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
+                                       };
+                               };
                        };
 
                        dcic@020e4000 { /* DCIC1 */
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