Commit | Line | Data |
---|---|---|
2e1cdfe1 PP |
1 | What: /sys/bus/coresight/devices/<memory_map>.etm/enable_source |
2 | Date: April 2015 | |
3 | KernelVersion: 4.01 | |
4 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
5 | Description: (RW) Enable/disable tracing on this specific trace entiry. | |
6 | Enabling a source implies the source has been configured | |
7 | properly and a sink has been identidifed for it. The path | |
8 | of coresight components linking the source to the sink is | |
9 | configured and managed automatically by the coresight framework. | |
10 | ||
11 | What: /sys/bus/coresight/devices/<memory_map>.etm/cpu | |
12 | Date: April 2015 | |
13 | KernelVersion: 4.01 | |
14 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
15 | Description: (R) The CPU this tracing entity is associated with. | |
c0ddbfea PP |
16 | |
17 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_pe_cmp | |
18 | Date: April 2015 | |
19 | KernelVersion: 4.01 | |
20 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
21 | Description: (R) Indicates the number of PE comparator inputs that are | |
22 | available for tracing. | |
23 | ||
24 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_addr_cmp | |
25 | Date: April 2015 | |
26 | KernelVersion: 4.01 | |
27 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
28 | Description: (R) Indicates the number of address comparator pairs that are | |
29 | available for tracing. | |
30 | ||
31 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_cntr | |
32 | Date: April 2015 | |
33 | KernelVersion: 4.01 | |
34 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
35 | Description: (R) Indicates the number of counters that are available for | |
36 | tracing. | |
37 | ||
38 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ext_inp | |
39 | Date: April 2015 | |
40 | KernelVersion: 4.01 | |
41 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
42 | Description: (R) Indicates how many external inputs are implemented. | |
43 | ||
44 | What: /sys/bus/coresight/devices/<memory_map>.etm/numcidc | |
45 | Date: April 2015 | |
46 | KernelVersion: 4.01 | |
47 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
48 | Description: (R) Indicates the number of Context ID comparators that are | |
49 | available for tracing. | |
50 | ||
51 | What: /sys/bus/coresight/devices/<memory_map>.etm/numvmidc | |
52 | Date: April 2015 | |
53 | KernelVersion: 4.01 | |
54 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
55 | Description: (R) Indicates the number of VMID comparators that are available | |
56 | for tracing. | |
57 | ||
58 | What: /sys/bus/coresight/devices/<memory_map>.etm/nrseqstate | |
59 | Date: April 2015 | |
60 | KernelVersion: 4.01 | |
61 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
62 | Description: (R) Indicates the number of sequencer states that are | |
63 | implemented. | |
64 | ||
65 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_resource | |
66 | Date: April 2015 | |
67 | KernelVersion: 4.01 | |
68 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
69 | Description: (R) Indicates the number of resource selection pairs that are | |
70 | available for tracing. | |
71 | ||
72 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ss_cmp | |
73 | Date: April 2015 | |
74 | KernelVersion: 4.01 | |
75 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
76 | Description: (R) Indicates the number of single-shot comparator controls that | |
77 | are available for tracing. | |
d8c66962 PP |
78 | |
79 | What: /sys/bus/coresight/devices/<memory_map>.etm/reset | |
80 | Date: April 2015 | |
81 | KernelVersion: 4.01 | |
82 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
83 | Description: (W) Cancels all configuration on a trace unit and set it back | |
84 | to its boot configuration. | |
85 | ||
86 | What: /sys/bus/coresight/devices/<memory_map>.etm/mode | |
87 | Date: April 2015 | |
88 | KernelVersion: 4.01 | |
89 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
90 | Description: (RW) Controls various modes supported by this ETM, for example | |
91 | P0 instruction tracing, branch broadcast, cycle counting and | |
92 | context ID tracing. | |
93 | ||
94 | What: /sys/bus/coresight/devices/<memory_map>.etm/pe | |
95 | Date: April 2015 | |
96 | KernelVersion: 4.01 | |
97 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
98 | Description: (RW) Controls which PE to trace. | |
99 | ||
100 | What: /sys/bus/coresight/devices/<memory_map>.etm/event | |
101 | Date: April 2015 | |
102 | KernelVersion: 4.01 | |
103 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
104 | Description: (RW) Controls the tracing of arbitrary events from bank 0 to 3. | |
105 | ||
106 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_instren | |
107 | Date: April 2015 | |
108 | KernelVersion: 4.01 | |
109 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
110 | Description: (RW) Controls the behavior of the events in bank 0 to 3. | |
b460daf8 PP |
111 | |
112 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_ts | |
113 | Date: April 2015 | |
114 | KernelVersion: 4.01 | |
115 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
116 | Description: (RW) Controls the insertion of global timestamps in the trace | |
117 | streams. | |
118 | ||
119 | What: /sys/bus/coresight/devices/<memory_map>.etm/syncfreq | |
120 | Date: April 2015 | |
121 | KernelVersion: 4.01 | |
122 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
123 | Description: (RW) Controls how often trace synchronization requests occur. | |
124 | ||
125 | What: /sys/bus/coresight/devices/<memory_map>.etm/cyc_threshold | |
126 | Date: April 2015 | |
127 | KernelVersion: 4.01 | |
128 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
129 | Description: (RW) Sets the threshold value for cycle counting. | |
130 | ||
131 | What: /sys/bus/coresight/devices/<memory_map>.etm/bb_ctrl | |
132 | Date: April 2015 | |
133 | KernelVersion: 4.01 | |
134 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
135 | Description: (RW) Controls which regions in the memory map are enabled to | |
136 | use branch broadcasting. | |
43ba6a7b PP |
137 | |
138 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_vinst | |
139 | Date: April 2015 | |
140 | KernelVersion: 4.01 | |
141 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
142 | Description: (RW) Controls instruction trace filtering. | |
143 | ||
144 | What: /sys/bus/coresight/devices/<memory_map>.etm/s_exlevel_vinst | |
145 | Date: April 2015 | |
146 | KernelVersion: 4.01 | |
147 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
148 | Description: (RW) In Secure state, each bit controls whether instruction | |
149 | tracing is enabled for the corresponding exception level. | |
150 | ||
151 | What: /sys/bus/coresight/devices/<memory_map>.etm/ns_exlevel_vinst | |
152 | Date: April 2015 | |
153 | KernelVersion: 4.01 | |
154 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
155 | Description: (RW) In non-secure state, each bit controls whether instruction | |
156 | tracing is enabled for the corresponding exception level. | |
35c9b29b PP |
157 | |
158 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_idx | |
159 | Date: April 2015 | |
160 | KernelVersion: 4.01 | |
161 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
162 | Description: (RW) Select which address comparator or pair (of comparators) to | |
163 | work with. | |
164 | ||
165 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_instdatatype | |
166 | Date: April 2015 | |
167 | KernelVersion: 4.01 | |
168 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
169 | Description: (RW) Controls what type of comparison the trace unit performs. | |
170 | ||
171 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_single | |
172 | Date: April 2015 | |
173 | KernelVersion: 4.01 | |
174 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
175 | Description: (RW) Used to setup single address comparator values. | |
176 | ||
177 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_range | |
178 | Date: April 2015 | |
179 | KernelVersion: 4.01 | |
180 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
181 | Description: (RW) Used to setup address range comparator values. | |
5e5ff344 PP |
182 | |
183 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_idx | |
184 | Date: April 2015 | |
185 | KernelVersion: 4.01 | |
186 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
187 | Description: (RW) Select which sequensor. | |
188 | ||
189 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_state | |
190 | Date: April 2015 | |
191 | KernelVersion: 4.01 | |
192 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
193 | Description: (RW) Use this to set, or read, the sequencer state. | |
194 | ||
195 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_event | |
196 | Date: April 2015 | |
197 | KernelVersion: 4.01 | |
198 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
199 | Description: (RW) Moves the sequencer state to a specific state. | |
200 | ||
201 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_reset_event | |
202 | Date: April 2015 | |
203 | KernelVersion: 4.01 | |
204 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
205 | Description: (RW) Moves the sequencer to state 0 when a programmed event | |
206 | occurs. | |
add2d5d0 PP |
207 | |
208 | What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_idx | |
209 | Date: April 2015 | |
210 | KernelVersion: 4.01 | |
211 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
212 | Description: (RW) Select which counter unit to work with. | |
213 | ||
214 | What: /sys/bus/coresight/devices/<memory_map>.etm/cntrldvr | |
215 | Date: April 2015 | |
216 | KernelVersion: 4.01 | |
217 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
218 | Description: (RW) This sets or returns the reload count value of the | |
219 | specific counter. | |
220 | ||
221 | What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_val | |
222 | Date: April 2015 | |
223 | KernelVersion: 4.01 | |
224 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
225 | Description: (RW) This sets or returns the current count value of the | |
226 | specific counter. | |
227 | ||
228 | What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_ctrl | |
229 | Date: April 2015 | |
230 | KernelVersion: 4.01 | |
231 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
232 | Description: (RW) Controls the operation of the selected counter. | |
6afa8a13 PP |
233 | |
234 | What: /sys/bus/coresight/devices/<memory_map>.etm/res_idx | |
235 | Date: April 2015 | |
236 | KernelVersion: 4.01 | |
237 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
238 | Description: (RW) Select which resource selection unit to work with. | |
239 | ||
240 | What: /sys/bus/coresight/devices/<memory_map>.etm/res_ctrl | |
241 | Date: April 2015 | |
242 | KernelVersion: 4.01 | |
243 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
244 | Description: (RW) Controls the selection of the resources in the trace unit. | |
4a584be1 PP |
245 | |
246 | What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_idx | |
247 | Date: April 2015 | |
248 | KernelVersion: 4.01 | |
249 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
250 | Description: (RW) Select which context ID comparator to work with. | |
251 | ||
cd196ac3 | 252 | What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid |
4a584be1 PP |
253 | Date: April 2015 |
254 | KernelVersion: 4.01 | |
255 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
256 | Description: (RW) Get/Set the context ID comparator value to trigger on. | |
257 | ||
258 | What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_masks | |
259 | Date: April 2015 | |
260 | KernelVersion: 4.01 | |
261 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
262 | Description: (RW) Mask for all 8 context ID comparator value | |
263 | registers (if implemented). | |
40d8ebf0 PP |
264 | |
265 | What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_idx | |
266 | Date: April 2015 | |
267 | KernelVersion: 4.01 | |
268 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
269 | Description: (RW) Select which virtual machine ID comparator to work with. | |
270 | ||
271 | What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_val | |
272 | Date: April 2015 | |
273 | KernelVersion: 4.01 | |
274 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
275 | Description: (RW) Get/Set the virtual machine ID comparator value to | |
276 | trigger on. | |
277 | ||
278 | What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_masks | |
279 | Date: April 2015 | |
280 | KernelVersion: 4.01 | |
281 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
282 | Description: (RW) Mask for all 8 virtual machine ID comparator value | |
283 | registers (if implemented). | |
a467dae1 MP |
284 | |
285 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcoslsr | |
286 | Date: April 2015 | |
287 | KernelVersion: 4.01 | |
288 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
289 | Description: (R) Print the content of the OS Lock Status Register (0x304). | |
290 | The value it taken directly from the HW. | |
291 | ||
292 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdcr | |
293 | Date: April 2015 | |
294 | KernelVersion: 4.01 | |
295 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
296 | Description: (R) Print the content of the Power Down Control Register | |
297 | (0x310). The value is taken directly from the HW. | |
298 | ||
299 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdsr | |
300 | Date: April 2015 | |
301 | KernelVersion: 4.01 | |
302 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
303 | Description: (R) Print the content of the Power Down Status Register | |
304 | (0x314). The value is taken directly from the HW. | |
305 | ||
306 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trclsr | |
307 | Date: April 2015 | |
308 | KernelVersion: 4.01 | |
309 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
310 | Description: (R) Print the content of the SW Lock Status Register | |
311 | (0xFB4). The value is taken directly from the HW. | |
312 | ||
313 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcauthstatus | |
314 | Date: April 2015 | |
315 | KernelVersion: 4.01 | |
316 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
317 | Description: (R) Print the content of the Authentication Status Register | |
318 | (0xFB8). The value is taken directly from the HW. | |
319 | ||
320 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevid | |
321 | Date: April 2015 | |
322 | KernelVersion: 4.01 | |
323 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
324 | Description: (R) Print the content of the Device ID Register | |
325 | (0xFC8). The value is taken directly from the HW. | |
326 | ||
327 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevtype | |
328 | Date: April 2015 | |
329 | KernelVersion: 4.01 | |
330 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
331 | Description: (R) Print the content of the Device Type Register | |
332 | (0xFCC). The value is taken directly from the HW. | |
333 | ||
334 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr0 | |
335 | Date: April 2015 | |
336 | KernelVersion: 4.01 | |
337 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
338 | Description: (R) Print the content of the Peripheral ID0 Register | |
339 | (0xFE0). The value is taken directly from the HW. | |
340 | ||
341 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr1 | |
342 | Date: April 2015 | |
343 | KernelVersion: 4.01 | |
344 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
345 | Description: (R) Print the content of the Peripheral ID1 Register | |
346 | (0xFE4). The value is taken directly from the HW. | |
347 | ||
348 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr2 | |
349 | Date: April 2015 | |
350 | KernelVersion: 4.01 | |
351 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
352 | Description: (R) Print the content of the Peripheral ID2 Register | |
353 | (0xFE8). The value is taken directly from the HW. | |
354 | ||
355 | What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr3 | |
356 | Date: April 2015 | |
357 | KernelVersion: 4.01 | |
358 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
359 | Description: (R) Print the content of the Peripheral ID3 Register | |
360 | (0xFEC). The value is taken directly from the HW. | |
5625988e MP |
361 | |
362 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr0 | |
363 | Date: April 2015 | |
364 | KernelVersion: 4.01 | |
365 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
366 | Description: (R) Returns the tracing capabilities of the trace unit (0x1E0). | |
367 | The value is taken directly from the HW. | |
368 | ||
369 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr1 | |
370 | Date: April 2015 | |
371 | KernelVersion: 4.01 | |
372 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
373 | Description: (R) Returns the tracing capabilities of the trace unit (0x1E4). | |
374 | The value is taken directly from the HW. | |
375 | ||
376 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr2 | |
377 | Date: April 2015 | |
378 | KernelVersion: 4.01 | |
379 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
380 | Description: (R) Returns the maximum size of the data value, data address, | |
381 | VMID, context ID and instuction address in the trace unit | |
382 | (0x1E8). The value is taken directly from the HW. | |
383 | ||
384 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr3 | |
385 | Date: April 2015 | |
386 | KernelVersion: 4.01 | |
387 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
388 | Description: (R) Returns the value associated with various resources | |
389 | available to the trace unit. See the Trace Macrocell | |
390 | architecture specification for more details (0x1E8). | |
391 | The value is taken directly from the HW. | |
392 | ||
393 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr4 | |
394 | Date: April 2015 | |
395 | KernelVersion: 4.01 | |
396 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
397 | Description: (R) Returns how many resources the trace unit supports (0x1F0). | |
398 | The value is taken directly from the HW. | |
399 | ||
400 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr5 | |
401 | Date: April 2015 | |
402 | KernelVersion: 4.01 | |
403 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
404 | Description: (R) Returns how many resources the trace unit supports (0x1F4). | |
405 | The value is taken directly from the HW. | |
406 | ||
407 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr8 | |
408 | Date: April 2015 | |
409 | KernelVersion: 4.01 | |
410 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
411 | Description: (R) Returns the maximum speculation depth of the instruction | |
412 | trace stream. (0x180). The value is taken directly from the HW. | |
413 | ||
414 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr9 | |
415 | Date: April 2015 | |
416 | KernelVersion: 4.01 | |
417 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
418 | Description: (R) Returns the number of P0 right-hand keys that the trace unit | |
419 | can use (0x184). The value is taken directly from the HW. | |
420 | ||
421 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr10 | |
422 | Date: April 2015 | |
423 | KernelVersion: 4.01 | |
424 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
425 | Description: (R) Returns the number of P1 right-hand keys that the trace unit | |
426 | can use (0x188). The value is taken directly from the HW. | |
427 | ||
428 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr11 | |
429 | Date: April 2015 | |
430 | KernelVersion: 4.01 | |
431 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
432 | Description: (R) Returns the number of special P1 right-hand keys that the | |
433 | trace unit can use (0x18C). The value is taken directly from | |
434 | the HW. | |
435 | ||
436 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr12 | |
437 | Date: April 2015 | |
438 | KernelVersion: 4.01 | |
439 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
440 | Description: (R) Returns the number of conditional P1 right-hand keys that | |
441 | the trace unit can use (0x190). The value is taken directly | |
442 | from the HW. | |
443 | ||
444 | What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr13 | |
445 | Date: April 2015 | |
446 | KernelVersion: 4.01 | |
447 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | |
448 | Description: (R) Returns the number of special conditional P1 right-hand keys | |
449 | that the trace unit can use (0x194). The value is taken | |
450 | directly from the HW. |