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1 | Marvell Armada 370 and Armada XP Interrupt Controller |
2 | ----------------------------------------------------- | |
3 | ||
4 | Required properties: | |
5 | - compatible: Should be "marvell,mpic" | |
6 | - interrupt-controller: Identifies the node as an interrupt controller. | |
7 | - #interrupt-cells: The number of cells to define the interrupts. Should be 1. | |
8 | The cell is the IRQ number | |
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10 | - reg: Should contain PMIC registers location and length. First pair |
11 | for the main interrupt registers, second pair for the per-CPU | |
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12 | interrupt registers. For this last pair, to be compliant with SMP |
13 | support, the "virtual" must be use (For the record, these registers | |
14 | automatically map to the interrupt controller registers of the | |
15 | current CPU) | |
16 | ||
17 | ||
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18 | |
19 | Example: | |
20 | ||
21 | mpic: interrupt-controller@d0020000 { | |
22 | compatible = "marvell,mpic"; | |
23 | #interrupt-cells = <1>; | |
24 | #address-cells = <1>; | |
25 | #size-cells = <1>; | |
26 | interrupt-controller; | |
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27 | reg = <0xd0020a00 0x1d0>, |
28 | <0xd0021070 0x58>; | |
0d01b7a1 | 29 | }; |