Commit | Line | Data |
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6a588703 JL |
1 | Mediatek hifsys controller |
2 | ============================ | |
3 | ||
4 | The Mediatek hifsys controller provides various clocks and reset | |
5 | outputs to the system. | |
6 | ||
7 | Required Properties: | |
8 | ||
9 | - compatible: Should be: | |
10 | - "mediatek,mt2701-hifsys", "syscon" | |
11 | - #clock-cells: Must be 1 | |
12 | ||
13 | The hifsys controller uses the common clk binding from | |
14 | Documentation/devicetree/bindings/clock/clock-bindings.txt | |
15 | The available clocks are defined in dt-bindings/clock/mt*-clk.h. | |
16 | ||
17 | Example: | |
18 | ||
19 | hifsys: clock-controller@1a000000 { | |
20 | compatible = "mediatek,mt2701-hifsys", "syscon"; | |
21 | reg = <0 0x1a000000 0 0x1000>; | |
22 | #clock-cells = <1>; | |
23 | #reset-cells = <1>; | |
24 | }; |