Commit | Line | Data |
---|---|---|
7b5bb891 YS |
1 | Renesas H8S2678 PLL clock |
2 | ||
3 | This device is Clock multiplyer | |
4 | ||
5 | Required Properties: | |
6 | ||
7 | - compatible: Must be "renesas,h8s2678-pll-clock" | |
8 | ||
9 | - clocks: Reference to the parent clocks | |
10 | ||
11 | - #clock-cells: Must be 0 | |
12 | ||
13 | - reg: Two rate selector (Multiply / Divide) register address | |
14 | ||
15 | Example | |
16 | ------- | |
17 | ||
18 | pllclk: pllclk { | |
19 | compatible = "renesas,h8s2678-pll-clock"; | |
20 | clocks = <&xclk>; | |
21 | #clock-cells = <0>; | |
22 | reg = <0xfee03b 2>, <0xfee045 2>; | |
23 | }; |