Commit | Line | Data |
---|---|---|
6a721db1 MR |
1 | Gate clock outputs |
2 | ------------------ | |
3 | ||
4 | * AHB1 gates ("allwinner,sun6i-a31-ahb1-gates-clk") | |
5 | ||
6 | MIPI DSI 1 | |
7 | ||
8 | SS 5 | |
9 | DMA 6 | |
10 | ||
11 | MMC0 8 | |
12 | MMC1 9 | |
13 | MMC2 10 | |
14 | MMC3 11 | |
15 | ||
16 | NAND1 12 | |
17 | NAND0 13 | |
18 | SDRAM 14 | |
19 | ||
20 | GMAC 17 | |
21 | TS 18 | |
22 | HSTIMER 19 | |
23 | SPI0 20 | |
24 | SPI1 21 | |
25 | SPI2 22 | |
26 | SPI3 23 | |
27 | USB_OTG 24 | |
28 | ||
29 | EHCI0 26 | |
30 | EHCI1 27 | |
31 | ||
32 | OHCI0 29 | |
33 | OHCI1 30 | |
34 | OHCI2 31 | |
35 | VE 32 | |
36 | ||
37 | LCD0 36 | |
38 | LCD1 37 | |
39 | ||
40 | CSI 40 | |
41 | ||
42 | HDMI 43 | |
43 | DE_BE0 44 | |
44 | DE_BE1 45 | |
45 | DE_FE1 46 | |
46 | DE_FE1 47 | |
47 | ||
48 | MP 50 | |
49 | ||
50 | GPU 52 | |
51 | ||
52 | DEU0 55 | |
53 | DEU1 56 | |
54 | DRC0 57 | |
55 | DRC1 58 | |
56 | ||
57 | * APB1 gates ("allwinner,sun6i-a31-apb1-gates-clk") | |
58 | ||
59 | CODEC 0 | |
60 | ||
61 | DIGITAL MIC 4 | |
62 | PIO 5 | |
63 | ||
64 | DAUDIO0 12 | |
65 | DAUDIO1 13 | |
66 | ||
67 | * APB2 gates ("allwinner,sun6i-a31-apb2-gates-clk") | |
68 | ||
69 | I2C0 0 | |
70 | I2C1 1 | |
71 | I2C2 2 | |
72 | I2C3 3 | |
73 | ||
74 | UART0 16 | |
75 | UART1 17 | |
76 | UART2 18 | |
77 | UART3 19 | |
78 | UART4 20 | |
79 | UART5 21 | |
80 | ||
81 | Notation: | |
82 | [*]: The datasheet didn't mention these, but they are present on AW code | |
83 | [**]: The datasheet had this marked as "NC" but they are used on AW code |