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42f59967 HS |
1 | * Texas Instruments Davinci EMAC |
2 | ||
3 | This file provides information, what the device node | |
4 | for the davinci_emac interface contains. | |
5 | ||
6 | Required properties: | |
de390083 TL |
7 | - compatible: "ti,davinci-dm6467-emac", "ti,am3517-emac" or |
8 | "ti,dm816-emac" | |
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9 | - reg: Offset and length of the register set for the device |
10 | - ti,davinci-ctrl-reg-offset: offset to control register | |
11 | - ti,davinci-ctrl-mod-reg-offset: offset to control module register | |
12 | - ti,davinci-ctrl-ram-offset: offset to control module ram | |
13 | - ti,davinci-ctrl-ram-size: size of control module ram | |
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14 | - interrupts: interrupt mapping for the davinci emac interrupts sources: |
15 | 4 sources: <Receive Threshold Interrupt | |
16 | Receive Interrupt | |
17 | Transmit Interrupt | |
18 | Miscellaneous Interrupt> | |
19 | ||
20 | Optional properties: | |
e8f08ee0 | 21 | - phy-handle: See ethernet.txt file in the same directory. |
2c2dc161 | 22 | If absent, davinci_emac driver defaults to 100/FULL. |
731ff244 | 23 | - ti,davinci-rmii-en: 1 byte, 1 means use RMII |
589dcb8a | 24 | - ti,davinci-no-bd-ram: boolean, does EMAC have BD RAM? |
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25 | |
26 | Example (enbw_cmc board): | |
27 | eth0: emac@1e20000 { | |
28 | compatible = "ti,davinci-dm6467-emac"; | |
29 | reg = <0x220000 0x4000>; | |
30 | ti,davinci-ctrl-reg-offset = <0x3000>; | |
31 | ti,davinci-ctrl-mod-reg-offset = <0x2000>; | |
32 | ti,davinci-ctrl-ram-offset = <0>; | |
33 | ti,davinci-ctrl-ram-size = <0x2000>; | |
34 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
35 | interrupts = <33 | |
36 | 34 | |
37 | 35 | |
38 | 36 | |
39 | >; | |
40 | interrupt-parent = <&intc>; | |
41 | }; |