Commit | Line | Data |
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fb97a846 JCPV |
1 | * Cadence MACB/GEM Ethernet controller |
2 | ||
3 | Required properties: | |
4 | - compatible: Should be "cdns,[<chip>-]{macb|gem}" | |
fc6c6c2b BB |
5 | Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP |
6 | available on sama5d3 SoCs. | |
fb97a846 | 7 | Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb". |
5ade7e42 | 8 | Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on |
fb97a846 | 9 | the Cadence GEM, or the generic form: "cdns,gem". |
f76a28c2 | 10 | Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs. |
f58393f4 | 11 | Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs. |
988d6f07 | 12 | Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. |
fb97a846 JCPV |
13 | - reg: Address and length of the register set for the device |
14 | - interrupts: Should contain macb interrupt | |
e8f08ee0 | 15 | - phy-mode: See ethernet.txt file in the same directory. |
e2897d7e SB |
16 | - clock-names: Tuple listing input clock names. |
17 | Required elements: 'pclk', 'hclk' | |
18 | Optional elements: 'tx_clk' | |
19 | - clocks: Phandles to input clocks. | |
fb97a846 | 20 | |
fb97a846 JCPV |
21 | Examples: |
22 | ||
23 | macb0: ethernet@fffc4000 { | |
24 | compatible = "cdns,at32ap7000-macb"; | |
25 | reg = <0xfffc4000 0x4000>; | |
26 | interrupts = <21>; | |
27 | phy-mode = "rmii"; | |
28 | local-mac-address = [3a 0e 03 04 05 06]; | |
e2897d7e SB |
29 | clock-names = "pclk", "hclk", "tx_clk"; |
30 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; | |
fb97a846 | 31 | }; |