Commit | Line | Data |
---|---|---|
735ea23c | 1 | Broadcom BCM281xx Pin Controller |
9bb412e5 SY |
2 | |
3 | This is a pin controller for the Broadcom BCM281xx SoC family, which includes | |
4 | BCM11130, BCM11140, BCM11351, BCM28145, and BCM28155 SoCs. | |
5 | ||
6 | === Pin Controller Node === | |
7 | ||
8 | Required Properties: | |
9 | ||
735ea23c | 10 | - compatible: Must be "brcm,bcm11351-pinctrl" |
9bb412e5 SY |
11 | - reg: Base address of the PAD Controller register block and the size |
12 | of the block. | |
13 | ||
14 | For example, the following is the bare minimum node: | |
15 | ||
16 | pinctrl@35004800 { | |
735ea23c | 17 | compatible = "brcm,bcm11351-pinctrl"; |
9bb412e5 SY |
18 | reg = <0x35004800 0x430>; |
19 | }; | |
20 | ||
21 | As a pin controller device, in addition to the required properties, this node | |
22 | should also contain the pin configuration nodes that client devices reference, | |
23 | if any. | |
24 | ||
25 | === Pin Configuration Node === | |
26 | ||
27 | Each pin configuration node is a sub-node of the pin controller node and is a | |
28 | container of an arbitrary number of subnodes, called pin group nodes in this | |
29 | document. | |
30 | ||
31 | Please refer to the pinctrl-bindings.txt in this directory for details of the | |
32 | common pinctrl bindings used by client devices, including the definition of a | |
33 | "pin configuration node". | |
34 | ||
35 | === Pin Group Node === | |
36 | ||
37 | A pin group node specifies the desired pin mux and/or pin configuration for an | |
38 | arbitrary number of pins. The name of the pin group node is optional and not | |
39 | used. | |
40 | ||
41 | A pin group node only affects the properties specified in the node, and has no | |
42 | effect on any properties that are omitted. | |
43 | ||
44 | The pin group node accepts a subset of the generic pin config properties. For | |
45 | details generic pin config properties, please refer to pinctrl-bindings.txt | |
46 | and <include/linux/pinctrl/pinconfig-generic.h>. | |
47 | ||
48 | Each pin controlled by this pin controller belong to one of three types: | |
49 | Standard, I2C, and HDMI. Each type accepts a different set of pin config | |
50 | properties. A list of pins and their types is provided below. | |
51 | ||
52 | Required Properties (applicable to all pins): | |
53 | ||
54 | - pins: Multiple strings. Specifies the name(s) of one or more pins to | |
55 | be configured by this node. | |
56 | ||
57 | Optional Properties (for standard pins): | |
58 | ||
59 | - function: String. Specifies the pin mux selection. Values | |
60 | must be one of: "alt1", "alt2", "alt3", "alt4" | |
61 | - input-schmitt-enable: No arguments. Enable schmitt-trigger mode. | |
62 | - input-schmitt-disable: No arguments. Disable schmitt-trigger mode. | |
63 | - bias-pull-up: No arguments. Pull up on pin. | |
64 | - bias-pull-down: No arguments. Pull down on pin. | |
65 | - bias-disable: No arguments. Disable pin bias. | |
66 | - slew-rate: Integer. Meaning depends on configured pin mux: | |
67 | *_SCL or *_SDA: | |
68 | 0: Standard(100kbps)& Fast(400kbps) mode | |
69 | 1: Highspeed (3.4Mbps) mode | |
70 | IC_DM or IC_DP: | |
71 | 0: normal slew rate | |
72 | 1: fast slew rate | |
73 | Otherwise: | |
74 | 0: fast slew rate | |
75 | 1: normal slew rate | |
c98be0c9 | 76 | - input-enable: No arguments. Enable input (does not affect |
9bb412e5 | 77 | output.) |
c98be0c9 | 78 | - input-disable: No arguments. Disable input (does not affect |
9bb412e5 SY |
79 | output.) |
80 | - drive-strength: Integer. Drive strength in mA. Valid values are | |
81 | 2, 4, 6, 8, 10, 12, 14, 16 mA. | |
82 | ||
83 | Optional Properties (for I2C pins): | |
84 | ||
85 | - function: String. Specifies the pin mux selection. Values | |
86 | must be one of: "alt1", "alt2", "alt3", "alt4" | |
87 | - bias-pull-up: Integer. Pull up strength in Ohm. There are 3 | |
88 | pull-up resisitors (1.2k, 1.8k, 2.7k) available | |
89 | in parallel for I2C pins, so the valid values | |
90 | are: 568, 720, 831, 1080, 1200, 1800, 2700 Ohm. | |
91 | - bias-disable: No arguments. Disable pin bias. | |
92 | - slew-rate: Integer. Meaning depends on configured pin mux: | |
93 | *_SCL or *_SDA: | |
94 | 0: Standard(100kbps)& Fast(400kbps) mode | |
95 | 1: Highspeed (3.4Mbps) mode | |
96 | IC_DM or IC_DP: | |
97 | 0: normal slew rate | |
98 | 1: fast slew rate | |
99 | Otherwise: | |
100 | 0: fast slew rate | |
101 | 1: normal slew rate | |
c98be0c9 | 102 | - input-enable: No arguments. Enable input (does not affect |
9bb412e5 | 103 | output.) |
c98be0c9 | 104 | - input-disable: No arguments. Disable input (does not affect |
9bb412e5 SY |
105 | output.) |
106 | ||
107 | Optional Properties (for HDMI pins): | |
108 | ||
109 | - function: String. Specifies the pin mux selection. Values | |
110 | must be one of: "alt1", "alt2", "alt3", "alt4" | |
111 | - slew-rate: Integer. Controls slew rate. | |
112 | 0: Standard(100kbps)& Fast(400kbps) mode | |
113 | 1: Highspeed (3.4Mbps) mode | |
c98be0c9 | 114 | - input-enable: No arguments. Enable input (does not affect |
9bb412e5 | 115 | output.) |
c98be0c9 | 116 | - input-disable: No arguments. Disable input (does not affect |
9bb412e5 SY |
117 | output.) |
118 | ||
119 | Example: | |
120 | // pin controller node | |
121 | pinctrl@35004800 { | |
735ea23c | 122 | compatible = "brcmbcm11351-pinctrl"; |
9bb412e5 SY |
123 | reg = <0x35004800 0x430>; |
124 | ||
125 | // pin configuration node | |
126 | dev_a_default: dev_a_active { | |
127 | //group node defining 1 standard pin | |
128 | grp_1 { | |
129 | pins = "std_pin1"; | |
130 | function = "alt1"; | |
131 | input-schmitt-enable; | |
132 | bias-disable; | |
133 | slew-rate = <1>; | |
134 | drive-strength = <4>; | |
135 | }; | |
136 | ||
137 | // group node defining 2 I2C pins | |
138 | grp_2 { | |
139 | pins = "i2c_pin1", "i2c_pin2"; | |
140 | function = "alt2"; | |
141 | bias-pull-up = <720>; | |
142 | input-enable; | |
143 | }; | |
144 | ||
145 | // group node defining 2 HDMI pins | |
146 | grp_3 { | |
147 | pins = "hdmi_pin1", "hdmi_pin2"; | |
148 | function = "alt3"; | |
149 | slew-rate = <1>; | |
150 | }; | |
151 | ||
152 | // other pin group nodes | |
153 | ... | |
154 | }; | |
155 | ||
156 | // other pin configuration nodes | |
157 | ... | |
158 | }; | |
159 | ||
160 | In the example above, "dev_a_active" is a pin configuration node with a number | |
161 | of sub-nodes. In the pin group node "grp_1", one pin, "std_pin1", is defined in | |
162 | the "pins" property. Thus, the remaining properties in the "grp_1" node applies | |
163 | only to this pin, including the following settings: | |
164 | - setting pinmux to "alt1" | |
165 | - enabling schmitt-trigger (hystersis) mode | |
166 | - disabling pin bias | |
167 | - setting the slew-rate to 1 | |
168 | - setting the drive strength to 4 mA | |
169 | Note that neither "input-enable" nor "input-disable" was specified - the pinctrl | |
170 | subsystem will therefore leave this property unchanged from whatever state it | |
171 | was in before applying these changes. | |
172 | ||
173 | The "pins" property in the pin group node "grp_2" specifies two pins - | |
174 | "i2c_pin1" and "i2c_pin2"; the remaining properties in this pin group node, | |
175 | therefore, applies to both of these pins. The properties include: | |
176 | - setting pinmux to "alt2" | |
177 | - setting pull-up resistance to 720 Ohm (ie. enabling 1.2k and 1.8k resistors | |
178 | in parallel) | |
179 | - enabling both pins' input | |
180 | "slew-rate" is not specified in this pin group node, so the slew-rate for these | |
181 | pins are left as-is. | |
182 | ||
183 | Finally, "grp_3" defines two HDMI pins. The following properties are applied to | |
184 | both pins: | |
185 | - setting pinmux to "alt3" | |
186 | - setting slew-rate to 1; for HDMI pins, this corresponds to the 3.4 Mbps | |
187 | Highspeed mode | |
188 | The input is neither enabled or disabled, and is left untouched. | |
189 | ||
190 | === Pin Names and Type === | |
191 | ||
192 | The following are valid pin names and their pin types: | |
193 | ||
194 | "adcsync", Standard | |
195 | "bat_rm", Standard | |
196 | "bsc1_scl", I2C | |
197 | "bsc1_sda", I2C | |
198 | "bsc2_scl", I2C | |
199 | "bsc2_sda", I2C | |
200 | "classgpwr", Standard | |
201 | "clk_cx8", Standard | |
202 | "clkout_0", Standard | |
203 | "clkout_1", Standard | |
204 | "clkout_2", Standard | |
205 | "clkout_3", Standard | |
206 | "clkreq_in_0", Standard | |
207 | "clkreq_in_1", Standard | |
208 | "cws_sys_req1", Standard | |
209 | "cws_sys_req2", Standard | |
210 | "cws_sys_req3", Standard | |
211 | "digmic1_clk", Standard | |
212 | "digmic1_dq", Standard | |
213 | "digmic2_clk", Standard | |
214 | "digmic2_dq", Standard | |
215 | "gpen13", Standard | |
216 | "gpen14", Standard | |
217 | "gpen15", Standard | |
218 | "gpio00", Standard | |
219 | "gpio01", Standard | |
220 | "gpio02", Standard | |
221 | "gpio03", Standard | |
222 | "gpio04", Standard | |
223 | "gpio05", Standard | |
224 | "gpio06", Standard | |
225 | "gpio07", Standard | |
226 | "gpio08", Standard | |
227 | "gpio09", Standard | |
228 | "gpio10", Standard | |
229 | "gpio11", Standard | |
230 | "gpio12", Standard | |
231 | "gpio13", Standard | |
232 | "gpio14", Standard | |
233 | "gps_pablank", Standard | |
234 | "gps_tmark", Standard | |
235 | "hdmi_scl", HDMI | |
236 | "hdmi_sda", HDMI | |
237 | "ic_dm", Standard | |
238 | "ic_dp", Standard | |
239 | "kp_col_ip_0", Standard | |
240 | "kp_col_ip_1", Standard | |
241 | "kp_col_ip_2", Standard | |
242 | "kp_col_ip_3", Standard | |
243 | "kp_row_op_0", Standard | |
244 | "kp_row_op_1", Standard | |
245 | "kp_row_op_2", Standard | |
246 | "kp_row_op_3", Standard | |
247 | "lcd_b_0", Standard | |
248 | "lcd_b_1", Standard | |
249 | "lcd_b_2", Standard | |
250 | "lcd_b_3", Standard | |
251 | "lcd_b_4", Standard | |
252 | "lcd_b_5", Standard | |
253 | "lcd_b_6", Standard | |
254 | "lcd_b_7", Standard | |
255 | "lcd_g_0", Standard | |
256 | "lcd_g_1", Standard | |
257 | "lcd_g_2", Standard | |
258 | "lcd_g_3", Standard | |
259 | "lcd_g_4", Standard | |
260 | "lcd_g_5", Standard | |
261 | "lcd_g_6", Standard | |
262 | "lcd_g_7", Standard | |
263 | "lcd_hsync", Standard | |
264 | "lcd_oe", Standard | |
265 | "lcd_pclk", Standard | |
266 | "lcd_r_0", Standard | |
267 | "lcd_r_1", Standard | |
268 | "lcd_r_2", Standard | |
269 | "lcd_r_3", Standard | |
270 | "lcd_r_4", Standard | |
271 | "lcd_r_5", Standard | |
272 | "lcd_r_6", Standard | |
273 | "lcd_r_7", Standard | |
274 | "lcd_vsync", Standard | |
275 | "mdmgpio0", Standard | |
276 | "mdmgpio1", Standard | |
277 | "mdmgpio2", Standard | |
278 | "mdmgpio3", Standard | |
279 | "mdmgpio4", Standard | |
280 | "mdmgpio5", Standard | |
281 | "mdmgpio6", Standard | |
282 | "mdmgpio7", Standard | |
283 | "mdmgpio8", Standard | |
284 | "mphi_data_0", Standard | |
285 | "mphi_data_1", Standard | |
286 | "mphi_data_2", Standard | |
287 | "mphi_data_3", Standard | |
288 | "mphi_data_4", Standard | |
289 | "mphi_data_5", Standard | |
290 | "mphi_data_6", Standard | |
291 | "mphi_data_7", Standard | |
292 | "mphi_data_8", Standard | |
293 | "mphi_data_9", Standard | |
294 | "mphi_data_10", Standard | |
295 | "mphi_data_11", Standard | |
296 | "mphi_data_12", Standard | |
297 | "mphi_data_13", Standard | |
298 | "mphi_data_14", Standard | |
299 | "mphi_data_15", Standard | |
300 | "mphi_ha0", Standard | |
301 | "mphi_hat0", Standard | |
302 | "mphi_hat1", Standard | |
303 | "mphi_hce0_n", Standard | |
304 | "mphi_hce1_n", Standard | |
305 | "mphi_hrd_n", Standard | |
306 | "mphi_hwr_n", Standard | |
307 | "mphi_run0", Standard | |
308 | "mphi_run1", Standard | |
309 | "mtx_scan_clk", Standard | |
310 | "mtx_scan_data", Standard | |
311 | "nand_ad_0", Standard | |
312 | "nand_ad_1", Standard | |
313 | "nand_ad_2", Standard | |
314 | "nand_ad_3", Standard | |
315 | "nand_ad_4", Standard | |
316 | "nand_ad_5", Standard | |
317 | "nand_ad_6", Standard | |
318 | "nand_ad_7", Standard | |
319 | "nand_ale", Standard | |
320 | "nand_cen_0", Standard | |
321 | "nand_cen_1", Standard | |
322 | "nand_cle", Standard | |
323 | "nand_oen", Standard | |
324 | "nand_rdy_0", Standard | |
325 | "nand_rdy_1", Standard | |
326 | "nand_wen", Standard | |
327 | "nand_wp", Standard | |
328 | "pc1", Standard | |
329 | "pc2", Standard | |
330 | "pmu_int", Standard | |
331 | "pmu_scl", I2C | |
332 | "pmu_sda", I2C | |
333 | "rfst2g_mtsloten3g", Standard | |
334 | "rgmii_0_rx_ctl", Standard | |
335 | "rgmii_0_rxc", Standard | |
336 | "rgmii_0_rxd_0", Standard | |
337 | "rgmii_0_rxd_1", Standard | |
338 | "rgmii_0_rxd_2", Standard | |
339 | "rgmii_0_rxd_3", Standard | |
340 | "rgmii_0_tx_ctl", Standard | |
341 | "rgmii_0_txc", Standard | |
342 | "rgmii_0_txd_0", Standard | |
343 | "rgmii_0_txd_1", Standard | |
344 | "rgmii_0_txd_2", Standard | |
345 | "rgmii_0_txd_3", Standard | |
346 | "rgmii_1_rx_ctl", Standard | |
347 | "rgmii_1_rxc", Standard | |
348 | "rgmii_1_rxd_0", Standard | |
349 | "rgmii_1_rxd_1", Standard | |
350 | "rgmii_1_rxd_2", Standard | |
351 | "rgmii_1_rxd_3", Standard | |
352 | "rgmii_1_tx_ctl", Standard | |
353 | "rgmii_1_txc", Standard | |
354 | "rgmii_1_txd_0", Standard | |
355 | "rgmii_1_txd_1", Standard | |
356 | "rgmii_1_txd_2", Standard | |
357 | "rgmii_1_txd_3", Standard | |
358 | "rgmii_gpio_0", Standard | |
359 | "rgmii_gpio_1", Standard | |
360 | "rgmii_gpio_2", Standard | |
361 | "rgmii_gpio_3", Standard | |
362 | "rtxdata2g_txdata3g1", Standard | |
363 | "rtxen2g_txdata3g2", Standard | |
364 | "rxdata3g0", Standard | |
365 | "rxdata3g1", Standard | |
366 | "rxdata3g2", Standard | |
367 | "sdio1_clk", Standard | |
368 | "sdio1_cmd", Standard | |
369 | "sdio1_data_0", Standard | |
370 | "sdio1_data_1", Standard | |
371 | "sdio1_data_2", Standard | |
372 | "sdio1_data_3", Standard | |
373 | "sdio4_clk", Standard | |
374 | "sdio4_cmd", Standard | |
375 | "sdio4_data_0", Standard | |
376 | "sdio4_data_1", Standard | |
377 | "sdio4_data_2", Standard | |
378 | "sdio4_data_3", Standard | |
379 | "sim_clk", Standard | |
380 | "sim_data", Standard | |
381 | "sim_det", Standard | |
382 | "sim_resetn", Standard | |
383 | "sim2_clk", Standard | |
384 | "sim2_data", Standard | |
385 | "sim2_det", Standard | |
386 | "sim2_resetn", Standard | |
387 | "sri_c", Standard | |
388 | "sri_d", Standard | |
389 | "sri_e", Standard | |
390 | "ssp_extclk", Standard | |
391 | "ssp0_clk", Standard | |
392 | "ssp0_fs", Standard | |
393 | "ssp0_rxd", Standard | |
394 | "ssp0_txd", Standard | |
395 | "ssp2_clk", Standard | |
396 | "ssp2_fs_0", Standard | |
397 | "ssp2_fs_1", Standard | |
398 | "ssp2_fs_2", Standard | |
399 | "ssp2_fs_3", Standard | |
400 | "ssp2_rxd_0", Standard | |
401 | "ssp2_rxd_1", Standard | |
402 | "ssp2_txd_0", Standard | |
403 | "ssp2_txd_1", Standard | |
404 | "ssp3_clk", Standard | |
405 | "ssp3_fs", Standard | |
406 | "ssp3_rxd", Standard | |
407 | "ssp3_txd", Standard | |
408 | "ssp4_clk", Standard | |
409 | "ssp4_fs", Standard | |
410 | "ssp4_rxd", Standard | |
411 | "ssp4_txd", Standard | |
412 | "ssp5_clk", Standard | |
413 | "ssp5_fs", Standard | |
414 | "ssp5_rxd", Standard | |
415 | "ssp5_txd", Standard | |
416 | "ssp6_clk", Standard | |
417 | "ssp6_fs", Standard | |
418 | "ssp6_rxd", Standard | |
419 | "ssp6_txd", Standard | |
420 | "stat_1", Standard | |
421 | "stat_2", Standard | |
422 | "sysclken", Standard | |
423 | "traceclk", Standard | |
424 | "tracedt00", Standard | |
425 | "tracedt01", Standard | |
426 | "tracedt02", Standard | |
427 | "tracedt03", Standard | |
428 | "tracedt04", Standard | |
429 | "tracedt05", Standard | |
430 | "tracedt06", Standard | |
431 | "tracedt07", Standard | |
432 | "tracedt08", Standard | |
433 | "tracedt09", Standard | |
434 | "tracedt10", Standard | |
435 | "tracedt11", Standard | |
436 | "tracedt12", Standard | |
437 | "tracedt13", Standard | |
438 | "tracedt14", Standard | |
439 | "tracedt15", Standard | |
440 | "txdata3g0", Standard | |
441 | "txpwrind", Standard | |
442 | "uartb1_ucts", Standard | |
443 | "uartb1_urts", Standard | |
444 | "uartb1_urxd", Standard | |
445 | "uartb1_utxd", Standard | |
446 | "uartb2_urxd", Standard | |
447 | "uartb2_utxd", Standard | |
448 | "uartb3_ucts", Standard | |
449 | "uartb3_urts", Standard | |
450 | "uartb3_urxd", Standard | |
451 | "uartb3_utxd", Standard | |
452 | "uartb4_ucts", Standard | |
453 | "uartb4_urts", Standard | |
454 | "uartb4_urxd", Standard | |
455 | "uartb4_utxd", Standard | |
456 | "vc_cam1_scl", I2C | |
457 | "vc_cam1_sda", I2C | |
458 | "vc_cam2_scl", I2C | |
459 | "vc_cam2_sda", I2C | |
460 | "vc_cam3_scl", I2C | |
461 | "vc_cam3_sda", I2C |