dmaengine: fsl-edma: fix dmamux index calculating error
[deliverable/linux.git] / Documentation / dmaengine.txt
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1 DMA Engine API Guide
2 ====================
3
4 Vinod Koul <vinod dot koul at intel.com>
5
6NOTE: For DMA Engine usage in async_tx please see:
7 Documentation/crypto/async-tx-api.txt
8
9
10Below is a guide to device driver writers on how to use the Slave-DMA API of the
11DMA Engine. This is applicable only for slave DMA usage only.
12
5a42fb93 13The slave DMA usage consists of following steps:
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141. Allocate a DMA slave channel
152. Set slave and controller specific parameters
163. Get a descriptor for transaction
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174. Submit the transaction
185. Issue pending requests and wait for callback notification
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19
201. Allocate a DMA slave channel
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21
22 Channel allocation is slightly different in the slave DMA context,
23 client drivers typically need a channel from a particular DMA
24 controller only and even in some cases a specific channel is desired.
25 To request a channel dma_request_channel() API is used.
26
27 Interface:
28 struct dma_chan *dma_request_channel(dma_cap_mask_t mask,
29 dma_filter_fn filter_fn,
30 void *filter_param);
31 where dma_filter_fn is defined as:
32 typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
33
34 The 'filter_fn' parameter is optional, but highly recommended for
35 slave and cyclic channels as they typically need to obtain a specific
36 DMA channel.
37
38 When the optional 'filter_fn' parameter is NULL, dma_request_channel()
39 simply returns the first channel that satisfies the capability mask.
40
41 Otherwise, the 'filter_fn' routine will be called once for each free
42 channel which has a capability in 'mask'. 'filter_fn' is expected to
43 return 'true' when the desired DMA channel is found.
44
45 A channel allocated via this interface is exclusive to the caller,
46 until dma_release_channel() is called.
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47
482. Set slave and controller specific parameters
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49
50 Next step is always to pass some specific information to the DMA
51 driver. Most of the generic information which a slave DMA can use
52 is in struct dma_slave_config. This allows the clients to specify
53 DMA direction, DMA addresses, bus widths, DMA burst lengths etc
54 for the peripheral.
55
56 If some DMA controllers have more parameters to be sent then they
57 should try to embed struct dma_slave_config in their controller
58 specific structure. That gives flexibility to client to pass more
59 parameters, if required.
60
61 Interface:
62 int dmaengine_slave_config(struct dma_chan *chan,
63 struct dma_slave_config *config)
64
65 Please see the dma_slave_config structure definition in dmaengine.h
40e47125 66 for a detailed explanation of the struct members. Please note
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67 that the 'direction' member will be going away as it duplicates the
68 direction given in the prepare call.
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69
703. Get a descriptor for transaction
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71
72 For slave usage the various modes of slave transfers supported by the
73 DMA-engine are:
74
75 slave_sg - DMA a list of scatter gather buffers from/to a peripheral
76 dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the
46b2903c 77 operation is explicitly stopped.
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78 interleaved_dma - This is common to Slave as well as M2M clients. For slave
79 address of devices' fifo could be already known to the driver.
80 Various types of operations could be expressed by setting
81 appropriate values to the 'dma_interleaved_template' members.
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82
83 A non-NULL return of this transfer API represents a "descriptor" for
84 the given transaction.
85
86 Interface:
96cb9898 87 struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
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88 struct dma_chan *chan, struct scatterlist *sgl,
89 unsigned int sg_len, enum dma_data_direction direction,
46b2903c 90 unsigned long flags);
5a42fb93 91
96cb9898 92 struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
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93 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
94 size_t period_len, enum dma_data_direction direction);
95
96cb9898 96 struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
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97 struct dma_chan *chan, struct dma_interleaved_template *xt,
98 unsigned long flags);
99
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100 The peripheral driver is expected to have mapped the scatterlist for
101 the DMA operation prior to calling device_prep_slave_sg, and must
102 keep the scatterlist mapped until the DMA operation has completed.
103 The scatterlist must be mapped using the DMA struct device. So,
104 normal setup should look like this:
105
106 nr_sg = dma_map_sg(chan->device->dev, sgl, sg_len);
107 if (nr_sg == 0)
108 /* error */
109
96cb9898 110 desc = dmaengine_prep_slave_sg(chan, sgl, nr_sg, direction, flags);
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111
112 Once a descriptor has been obtained, the callback information can be
113 added and the descriptor must then be submitted. Some DMA engine
114 drivers may hold a spinlock between a successful preparation and
115 submission so it is important that these two operations are closely
116 paired.
117
118 Note:
119 Although the async_tx API specifies that completion callback
120 routines cannot submit any new operations, this is not the
121 case for slave/cyclic DMA.
122
123 For slave DMA, the subsequent transaction may not be available
124 for submission prior to callback function being invoked, so
125 slave DMA callbacks are permitted to prepare and submit a new
126 transaction.
127
128 For cyclic DMA, a callback function may wish to terminate the
129 DMA via dmaengine_terminate_all().
130
131 Therefore, it is important that DMA engine drivers drop any
132 locks before calling the callback function which may cause a
133 deadlock.
134
135 Note that callbacks will always be invoked from the DMA
136 engines tasklet, never from interrupt context.
137
1384. Submit the transaction
139
140 Once the descriptor has been prepared and the callback information
141 added, it must be placed on the DMA engine drivers pending queue.
142
143 Interface:
144 dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc)
145
146 This returns a cookie can be used to check the progress of DMA engine
147 activity via other DMA engine calls not covered in this document.
148
149 dmaengine_submit() will not start the DMA operation, it merely adds
150 it to the pending queue. For this, see step 5, dma_async_issue_pending.
151
1525. Issue pending DMA requests and wait for callback notification
153
154 The transactions in the pending queue can be activated by calling the
155 issue_pending API. If channel is idle then the first transaction in
156 queue is started and subsequent ones queued up.
157
158 On completion of each DMA operation, the next in queue is started and
159 a tasklet triggered. The tasklet will then call the client driver
160 completion callback routine for notification, if set.
161
162 Interface:
163 void dma_async_issue_pending(struct dma_chan *chan);
164
165Further APIs:
166
1671. int dmaengine_terminate_all(struct dma_chan *chan)
168
169 This causes all activity for the DMA channel to be stopped, and may
170 discard data in the DMA FIFO which hasn't been fully transferred.
171 No callback functions will be called for any incomplete transfers.
172
1732. int dmaengine_pause(struct dma_chan *chan)
174
175 This pauses activity on the DMA channel without data loss.
176
1773. int dmaengine_resume(struct dma_chan *chan)
178
179 Resume a previously paused DMA channel. It is invalid to resume a
180 channel which is not currently paused.
181
1824. enum dma_status dma_async_is_tx_complete(struct dma_chan *chan,
183 dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used)
184
185 This can be used to check the status of the channel. Please see
186 the documentation in include/linux/dmaengine.h for a more complete
187 description of this API.
188
189 This can be used in conjunction with dma_async_is_complete() and
96cb9898 190 the cookie returned from dmaengine_submit() to check for
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191 completion of a specific DMA transaction.
192
193 Note:
194 Not all DMA engine drivers can return reliable information for
195 a running DMA channel. It is recommended that DMA engine users
196 pause or stop (via dmaengine_terminate_all) the channel before
197 using this API.
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