Commit | Line | Data |
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5db3d3da JD |
1 | Kernel driver f71805f |
2 | ===================== | |
3 | ||
4 | Supported chips: | |
5 | * Fintek F71805F/FG | |
6 | Prefix: 'f71805f' | |
7 | Addresses scanned: none, address read from Super I/O config space | |
aba5073d | 8 | Datasheet: Available from the Fintek website |
9cab0217 JD |
9 | * Fintek F71806F/FG |
10 | Prefix: 'f71872f' | |
11 | Addresses scanned: none, address read from Super I/O config space | |
12 | Datasheet: Available from the Fintek website | |
51c997d8 JD |
13 | * Fintek F71872F/FG |
14 | Prefix: 'f71872f' | |
15 | Addresses scanned: none, address read from Super I/O config space | |
aba5073d | 16 | Datasheet: Available from the Fintek website |
5db3d3da | 17 | |
7c81c60f | 18 | Author: Jean Delvare <jdelvare@suse.de> |
5db3d3da JD |
19 | |
20 | Thanks to Denis Kieft from Barracuda Networks for the donation of a | |
21 | test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and | |
22 | for providing initial documentation. | |
23 | ||
e9cea646 JD |
24 | Thanks to Kris Chen and Aaron Huang from Fintek for answering technical |
25 | questions and providing additional documentation. | |
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26 | |
27 | Thanks to Chris Lin from Jetway for providing wiring schematics and | |
15fe25ca | 28 | answering technical questions. |
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29 | |
30 | ||
31 | Description | |
32 | ----------- | |
33 | ||
34 | The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring | |
35 | capabilities. It can monitor up to 9 voltages (counting its own power | |
36 | source), 3 fans and 3 temperature sensors. | |
37 | ||
38 | This chip also has fan controlling features, using either DC or PWM, in | |
e9cea646 | 39 | three different modes (one manual, two automatic). |
5db3d3da | 40 | |
51c997d8 JD |
41 | The Fintek F71872F/FG Super I/O chip is almost the same, with two |
42 | additional internal voltages monitored (VSB and battery). It also features | |
43 | 6 VID inputs. The VID inputs are not yet supported by this driver. | |
44 | ||
9cab0217 JD |
45 | The Fintek F71806F/FG Super-I/O chip is essentially the same as the |
46 | F71872F/FG, and is undistinguishable therefrom. | |
47 | ||
5db3d3da JD |
48 | The driver assumes that no more than one chip is present, which seems |
49 | reasonable. | |
50 | ||
51 | ||
52 | Voltage Monitoring | |
53 | ------------------ | |
54 | ||
55 | Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported | |
56 | range is thus from 0 to 2.040 V. Voltage values outside of this range | |
57 | need external resistors. An exception is in0, which is used to monitor | |
58 | the chip's own power source (+3.3V), and is divided internally by a | |
51c997d8 JD |
59 | factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also |
60 | divided internally by a factor 2. | |
5db3d3da JD |
61 | |
62 | The two LSB of the voltage limit registers are not used (always 0), so | |
63 | you can only set the limits in steps of 32 mV (before scaling). | |
64 | ||
65 | The wirings and resistor values suggested by Fintek are as follow: | |
66 | ||
67 | pin expected | |
68 | name use R1 R2 divider raw val. | |
69 | ||
70 | in0 VCC VCC3.3V int. int. 2.00 1.65 V | |
71 | in1 VIN1 VTT1.2V 10K - 1.00 1.20 V | |
72 | in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V (1) | |
73 | in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V (2) | |
74 | in4 VIN4 VCC5V 200K 47K 5.25 0.95 V | |
75 | in5 VIN5 +12V 200K 20K 11.00 1.05 V | |
76 | in6 VIN6 VCC1.5V 10K - 1.00 1.50 V | |
77 | in7 VIN7 VCORE 10K - 1.00 ~1.40 V (1) | |
78 | in8 VIN8 VSB5V 200K 47K 1.00 0.95 V | |
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79 | in10 VSB VSB3.3V int. int. 2.00 1.65 V (3) |
80 | in9 VBAT VBATTERY int. int. 2.00 1.50 V (3) | |
5db3d3da JD |
81 | |
82 | (1) Depends on your hardware setup. | |
83 | (2) Obviously not correct, swapping R1 and R2 would make more sense. | |
51c997d8 | 84 | (3) F71872F/FG only. |
5db3d3da JD |
85 | |
86 | These values can be used as hints at best, as motherboard manufacturers | |
87 | are free to use a completely different setup. As a matter of fact, the | |
88 | Jetway K8M8MS uses a significantly different setup. You will have to | |
89 | find out documentation about your own motherboard, and edit sensors.conf | |
90 | accordingly. | |
91 | ||
92 | Each voltage measured has associated low and high limits, each of which | |
93 | triggers an alarm when crossed. | |
94 | ||
95 | ||
96 | Fan Monitoring | |
97 | -------------- | |
98 | ||
99 | Fan rotation speeds are reported as 12-bit values from a gated clock | |
100 | signal. Speeds down to 366 RPM can be measured. There is no theoretical | |
101 | high limit, but values over 6000 RPM seem to cause problem. The effective | |
102 | resolution is much lower than you would expect, the step between different | |
103 | register values being 10 rather than 1. | |
104 | ||
105 | The chip assumes 2 pulse-per-revolution fans. | |
106 | ||
107 | An alarm is triggered if the rotation speed drops below a programmable | |
108 | limit or is too low to be measured. | |
109 | ||
110 | ||
111 | Temperature Monitoring | |
112 | ---------------------- | |
113 | ||
114 | Temperatures are reported in degrees Celsius. Each temperature measured | |
115 | has a high limit, those crossing triggers an alarm. There is an associated | |
116 | hysteresis value, below which the temperature has to drop before the | |
117 | alarm is cleared. | |
118 | ||
119 | All temperature channels are external, there is no embedded temperature | |
120 | sensor. Each channel can be used for connecting either a thermal diode | |
121 | or a thermistor. The driver reports the currently selected mode, but | |
122 | doesn't allow changing it. In theory, the BIOS should have configured | |
123 | everything properly. | |
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124 | |
125 | ||
126 | Fan Control | |
127 | ----------- | |
128 | ||
129 | Both PWM (pulse-width modulation) and DC fan speed control methods are | |
130 | supported. The right one to use depends on external circuitry on the | |
131 | motherboard, so the driver assumes that the BIOS set the method | |
132 | properly. The driver will report the method, but won't let you change | |
133 | it. | |
134 | ||
135 | When the PWM method is used, you can select the operating frequency, | |
136 | from 187.5 kHz (default) to 31 Hz. The best frequency depends on the | |
137 | fan model. As a rule of thumb, lower frequencies seem to give better | |
aba5073d PE |
138 | control, but may generate annoying high-pitch noise. So a frequency just |
139 | above the audible range, such as 25 kHz, may be a good choice; if this | |
140 | doesn't give you good linear control, try reducing it. Fintek recommends | |
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141 | not going below 1 kHz, as the fan tachometers get confused by lower |
142 | frequencies as well. | |
143 | ||
144 | When the DC method is used, Fintek recommends not going below 5 V, which | |
145 | corresponds to a pwm value of 106 for the driver. The driver doesn't | |
146 | enforce this limit though. | |
147 | ||
aba5073d PE |
148 | Three different fan control modes are supported; the mode number is written |
149 | to the pwm<n>_enable file. | |
e9cea646 | 150 | |
aba5073d PE |
151 | * 1: Manual mode |
152 | You ask for a specific PWM duty cycle or DC voltage by writing to the | |
153 | pwm<n> file. | |
e9cea646 | 154 | |
aba5073d PE |
155 | * 2: Temperature mode |
156 | You define 3 temperature/fan speed trip points using the | |
157 | pwm<n>_auto_point<m>_temp and _fan files. These define a staircase | |
158 | relationship between temperature and fan speed with two additional points | |
159 | interpolated between the values that you define. When the temperature | |
160 | is below auto_point1_temp the fan is switched off. | |
e9cea646 | 161 | |
aba5073d PE |
162 | * 3: Fan speed mode |
163 | You ask for a specific fan speed by writing to the fan<n>_target file. | |
164 | ||
165 | Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to | |
166 | fan2 and pwm3 to fan3. Temperature mode also requires that temp1 corresponds | |
167 | to pwm1 and fan1, etc. |