[deliverable/linux.git] / arch / alpha / kernel / sys_marvel.c

/*
 * linux/arch/alpha/kernel/sys_marvel.c
 *
 * Marvel / IO7 support
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/bitops.h>

#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/dma.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/core_marvel.h>
#include <asm/hwrpb.h>
#include <asm/tlbflush.h>
#include <asm/vga.h>

#include "proto.h"
#include "err_impl.h"
#include "irq_impl.h"
#include "pci_impl.h"
#include "machvec_impl.h"

#if NR_IRQS < MARVEL_NR_IRQS
# error NR_IRQS < MARVEL_NR_IRQS !!!
#endif

\f
/*
 * Interrupt handling.
 */
static void 
io7_device_interrupt(unsigned long vector)
{
	unsigned int pid;
	unsigned int irq;

	/*
	 * Vector is 0x800 + (interrupt)
	 *
	 * where (interrupt) is:
	 *
	 *	...16|15 14|13     4|3 0
	 *	-----+-----+--------+---
	 *	  PE |  0  |   irq  | 0
	 *
	 * where (irq) is 
	 *
	 *       0x0800 - 0x0ff0	 - 0x0800 + (LSI id << 4)
	 *	 0x1000 - 0x2ff0	 - 0x1000 + (MSI_DAT<8:0> << 4)
	 */
	pid = vector >> 16;
	irq = ((vector & 0xffff) - 0x800) >> 4;

	irq += 16;				/* offset for legacy */
	irq &= MARVEL_IRQ_VEC_IRQ_MASK;		/* not too many bits */
	irq |= pid << MARVEL_IRQ_VEC_PE_SHIFT;	/* merge the pid     */

	handle_irq(irq);
}

static volatile unsigned long *
io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
{
	volatile unsigned long *ctl;
	unsigned int pid;
	struct io7 *io7;

	pid = irq >> MARVEL_IRQ_VEC_PE_SHIFT;

	if (!(io7 = marvel_find_io7(pid))) {
		printk(KERN_ERR 
		       "%s for nonexistent io7 -- vec %x, pid %d\n",
		       __FUNCTION__, irq, pid);
		return NULL;
	}

	irq &= MARVEL_IRQ_VEC_IRQ_MASK;	/* isolate the vector    */
	irq -= 16;			/* subtract legacy bias  */

	if (irq >= 0x180) {
		printk(KERN_ERR 
		       "%s for invalid irq -- pid %d adjusted irq %x\n",
		       __FUNCTION__, pid, irq);
		return NULL;
	}

	ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */
	if (irq >= 0x80)	     	/* MSI */
		ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;

	if (pio7) *pio7 = io7;
	return ctl;
}

static void
io7_enable_irq(unsigned int irq)
{
	volatile unsigned long *ctl;
	struct io7 *io7;

	ctl = io7_get_irq_ctl(irq, &io7);
	if (!ctl || !io7) {
		printk(KERN_ERR "%s: get_ctl failed for irq %x\n", 
		       __FUNCTION__, irq);
		return;
	}
		
	spin_lock(&io7->irq_lock);
	*ctl |= 1UL << 24;
	mb();
	*ctl;
	spin_unlock(&io7->irq_lock);
}

static void
io7_disable_irq(unsigned int irq)
{
	volatile unsigned long *ctl;
	struct io7 *io7;

	ctl = io7_get_irq_ctl(irq, &io7);
	if (!ctl || !io7) {
		printk(KERN_ERR "%s: get_ctl failed for irq %x\n", 
		       __FUNCTION__, irq);
		return;
	}
		
	spin_lock(&io7->irq_lock);
	*ctl &= ~(1UL << 24);
	mb();
	*ctl;
	spin_unlock(&io7->irq_lock);
}

static unsigned int
io7_startup_irq(unsigned int irq)
{
	io7_enable_irq(irq);
	return 0;	/* never anything pending */
}

static void
io7_end_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		io7_enable_irq(irq);
}

static void
marvel_irq_noop(unsigned int irq) 
{ 
	return; 
}

static unsigned int
marvel_irq_noop_return(unsigned int irq) 
{ 
	return 0; 
}

static struct hw_interrupt_type marvel_legacy_irq_type = {
	.typename	= "LEGACY",
	.startup	= marvel_irq_noop_return,
	.shutdown	= marvel_irq_noop,
	.enable		= marvel_irq_noop,
	.disable	= marvel_irq_noop,
	.ack		= marvel_irq_noop,
	.end		= marvel_irq_noop,
};

static struct hw_interrupt_type io7_lsi_irq_type = {
	.typename	= "LSI",
	.startup	= io7_startup_irq,
	.shutdown	= io7_disable_irq,
	.enable		= io7_enable_irq,
	.disable	= io7_disable_irq,
	.ack		= io7_disable_irq,
	.end		= io7_end_irq,
};

static struct hw_interrupt_type io7_msi_irq_type = {
	.typename	= "MSI",
	.startup	= io7_startup_irq,
	.shutdown	= io7_disable_irq,
	.enable		= io7_enable_irq,
	.disable	= io7_disable_irq,
	.ack		= marvel_irq_noop,
	.end		= io7_end_irq,
};

static void
io7_redirect_irq(struct io7 *io7, 
		 volatile unsigned long *csr, 
		 unsigned int where)
{
	unsigned long val;
	
	val = *csr;
	val &= ~(0x1ffUL << 24);		/* clear the target pid   */
	val |= ((unsigned long)where << 24);	/* set the new target pid */
	
	*csr = val;
	mb();
	*csr;
}

static void 
io7_redirect_one_lsi(struct io7 *io7, unsigned int which, unsigned int where)
{
	unsigned long val;

	/*
	 * LSI_CTL has target PID @ 14
	 */
	val = io7->csrs->PO7_LSI_CTL[which].csr;
	val &= ~(0x1ffUL << 14);		/* clear the target pid */
	val |= ((unsigned long)where << 14);	/* set the new target pid */

	io7->csrs->PO7_LSI_CTL[which].csr = val;
	mb();
	io7->csrs->PO7_LSI_CTL[which].csr;
}

static void 
io7_redirect_one_msi(struct io7 *io7, unsigned int which, unsigned int where)
{
	unsigned long val;

	/*
	 * MSI_CTL has target PID @ 14
	 */
	val = io7->csrs->PO7_MSI_CTL[which].csr;
	val &= ~(0x1ffUL << 14);		/* clear the target pid */
	val |= ((unsigned long)where << 14);	/* set the new target pid */

	io7->csrs->PO7_MSI_CTL[which].csr = val;
	mb();
	io7->csrs->PO7_MSI_CTL[which].csr;
}

static void __init
init_one_io7_lsi(struct io7 *io7, unsigned int which, unsigned int where)
{
	/*
	 * LSI_CTL has target PID @ 14
	 */
	io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);
	mb();
	io7->csrs->PO7_LSI_CTL[which].csr;
}

static void __init
init_one_io7_msi(struct io7 *io7, unsigned int which, unsigned int where)
{
	/*
	 * MSI_CTL has target PID @ 14
	 */
	io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);
	mb();
	io7->csrs->PO7_MSI_CTL[which].csr;
}

static void __init
init_io7_irqs(struct io7 *io7, 
	      struct hw_interrupt_type *lsi_ops,
	      struct hw_interrupt_type *msi_ops)
{
	long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16;
	long i;

	printk("Initializing interrupts for IO7 at PE %u - base %lx\n",
		io7->pe, base);

	/*
	 * Where should interrupts from this IO7 go?
	 *
	 * They really should be sent to the local CPU to avoid having to
	 * traverse the mesh, but if it's not an SMP kernel, they have to
	 * go to the boot CPU. Send them all to the boot CPU for now,
	 * as each secondary starts, it can redirect it's local device 
	 * interrupts.
	 */
	printk("  Interrupts reported to CPU at PE %u\n", boot_cpuid);

	spin_lock(&io7->irq_lock);

	/* set up the error irqs */
	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);
	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);
	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);
	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);

	/* Set up the lsi irqs.  */
	for (i = 0; i < 128; ++i) {
		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
		irq_desc[base + i].chip = lsi_ops;
	}

	/* Disable the implemented irqs in hardware.  */
	for (i = 0; i < 0x60; ++i) 
		init_one_io7_lsi(io7, i, boot_cpuid);

	init_one_io7_lsi(io7, 0x74, boot_cpuid);
	init_one_io7_lsi(io7, 0x75, boot_cpuid);


	/* Set up the msi irqs.  */
	for (i = 128; i < (128 + 512); ++i) {
		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
		irq_desc[base + i].chip = msi_ops;
	}

	for (i = 0; i < 16; ++i)
		init_one_io7_msi(io7, i, boot_cpuid);

	spin_unlock(&io7->irq_lock);
}

static void __init
marvel_init_irq(void)
{
	int i;
	struct io7 *io7 = NULL;

	/* Reserve the legacy irqs.  */
	for (i = 0; i < 16; ++i) {
		irq_desc[i].status = IRQ_DISABLED;
		irq_desc[i].chip = &marvel_legacy_irq_type;
	}

	/* Init the io7 irqs.  */
	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
		init_io7_irqs(io7, &io7_lsi_irq_type, &io7_msi_irq_type);
}

static int 
marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	struct pci_controller *hose = dev->sysdata;
	struct io7_port *io7_port = hose->sysdata;
	struct io7 *io7 = io7_port->io7;
	int msi_loc, msi_data_off;
	u16 msg_ctl;
	u16 msg_dat;
	u8 intline; 
	int irq;

	pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
	irq = intline;

	msi_loc = pci_find_capability(dev, PCI_CAP_ID_MSI);
	msg_ctl = 0;
	if (msi_loc) 
		pci_read_config_word(dev, msi_loc + PCI_MSI_FLAGS, &msg_ctl);

	if (msg_ctl & PCI_MSI_FLAGS_ENABLE) {
 		msi_data_off = PCI_MSI_DATA_32;
		if (msg_ctl & PCI_MSI_FLAGS_64BIT) 
			msi_data_off = PCI_MSI_DATA_64;
		pci_read_config_word(dev, msi_loc + msi_data_off, &msg_dat);

		irq = msg_dat & 0x1ff;		/* we use msg_data<8:0> */
		irq += 0x80;			/* offset for lsi       */

#if 1
		printk("PCI:%d:%d:%d (hose %d) is using MSI\n",
		       dev->bus->number, 
		       PCI_SLOT(dev->devfn), 
		       PCI_FUNC(dev->devfn),
		       hose->index);
		printk("  %d message(s) from 0x%04x\n", 
		       1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4),
		       msg_dat);
		printk("  reporting on %d IRQ(s) from %d (0x%x)\n", 
		       1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4),
		       (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT),
		       (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT));
#endif

#if 0
		pci_write_config_word(dev, msi_loc + PCI_MSI_FLAGS,
				      msg_ctl & ~PCI_MSI_FLAGS_ENABLE);
		pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
		irq = intline;

		printk("  forcing LSI interrupt on irq %d [0x%x]\n", irq, irq);
#endif
	}

	irq += 16;					/* offset for legacy */
	irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT;	/* merge the pid     */

	return irq; 
}

static void __init
marvel_init_pci(void)
{
	struct io7 *io7;

	marvel_register_error_handlers();

	pci_probe_only = 1;
	common_init_pci();
	locate_and_init_vga(NULL);

	/* Clear any io7 errors.  */
	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) 
		io7_clear_errors(io7);
}

static void __init
marvel_init_rtc(void)
{
	init_rtc_irq();
}

static void
marvel_smp_callin(void)
{
	int cpuid = hard_smp_processor_id();
	struct io7 *io7 = marvel_find_io7(cpuid);
	unsigned int i;

	if (!io7)
		return;

	/* 
	 * There is a local IO7 - redirect all of its interrupts here.
	 */
	printk("Redirecting IO7 interrupts to local CPU at PE %u\n", cpuid);

	/* Redirect the error IRQS here.  */
	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);

	/* Redirect the implemented LSIs here.  */
	for (i = 0; i < 0x60; ++i) 
		io7_redirect_one_lsi(io7, i, cpuid);

	io7_redirect_one_lsi(io7, 0x74, cpuid);
	io7_redirect_one_lsi(io7, 0x75, cpuid);

	/* Redirect the MSIs here.  */
	for (i = 0; i < 16; ++i)
		io7_redirect_one_msi(io7, i, cpuid);
}
\f
/*
 * System Vectors
 */
struct alpha_machine_vector marvel_ev7_mv __initmv = {
	.vector_name		= "MARVEL/EV7",
	DO_EV7_MMU,
	DO_DEFAULT_RTC,
	DO_MARVEL_IO,
	.machine_check		= marvel_machine_check,
	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,
	.min_io_address		= DEFAULT_IO_BASE,
	.min_mem_address	= DEFAULT_MEM_BASE,
	.pci_dac_offset		= IO7_DAC_OFFSET,

	.nr_irqs		= MARVEL_NR_IRQS,
	.device_interrupt	= io7_device_interrupt,

	.agp_info		= marvel_agp_info,

	.smp_callin		= marvel_smp_callin,
	.init_arch		= marvel_init_arch,
	.init_irq		= marvel_init_irq,
	.init_rtc		= marvel_init_rtc,
	.init_pci		= marvel_init_pci,
	.kill_arch		= marvel_kill_arch,
	.pci_map_irq		= marvel_map_irq,
	.pci_swizzle		= common_swizzle,

	.pa_to_nid		= marvel_pa_to_nid,
	.cpuid_to_nid		= marvel_cpuid_to_nid,
	.node_mem_start		= marvel_node_mem_start,
	.node_mem_size		= marvel_node_mem_size,
};
ALIAS_MV(marvel_ev7)
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/alpha/kernel/sys_marvel.c
	3	*
	4	* Marvel / IO7 support
	5	*/
	6
	7	#include <linux/kernel.h>
	8	#include <linux/types.h>
	9	#include <linux/mm.h>
	10	#include <linux/sched.h>
	11	#include <linux/pci.h>
	12	#include <linux/init.h>
	13	#include <linux/bitops.h>
	14
	15	#include <asm/ptrace.h>
	16	#include <asm/system.h>
	17	#include <asm/dma.h>
	18	#include <asm/irq.h>
	19	#include <asm/mmu_context.h>
	20	#include <asm/io.h>
	21	#include <asm/pgtable.h>
	22	#include <asm/core_marvel.h>
	23	#include <asm/hwrpb.h>
	24	#include <asm/tlbflush.h>
025a2215	25	#include <asm/vga.h>
1da177e4 LT	26
	27	#include "proto.h"
	28	#include "err_impl.h"
	29	#include "irq_impl.h"
	30	#include "pci_impl.h"
	31	#include "machvec_impl.h"
	32
	33	#if NR_IRQS < MARVEL_NR_IRQS
	34	# error NR_IRQS < MARVEL_NR_IRQS !!!
	35	#endif
	36
	37	\f
	38	/*
	39	* Interrupt handling.
	40	*/
	41	static void
7ca56053	42	io7_device_interrupt(unsigned long vector)
1da177e4 LT	43	{
	44	unsigned int pid;
	45	unsigned int irq;
	46
	47	/*
	48	* Vector is 0x800 + (interrupt)
	49	*
	50	* where (interrupt) is:
	51	*
	52	* ...16\|15 14\|13 4\|3 0
	53	* -----+-----+--------+---
	54	* PE \| 0 \| irq \| 0
	55	*
	56	* where (irq) is
	57	*
	58	* 0x0800 - 0x0ff0 - 0x0800 + (LSI id << 4)
	59	* 0x1000 - 0x2ff0 - 0x1000 + (MSI_DAT<8:0> << 4)
	60	*/
	61	pid = vector >> 16;
	62	irq = ((vector & 0xffff) - 0x800) >> 4;
	63
	64	irq += 16; /* offset for legacy */
	65	irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* not too many bits */
	66	irq \|= pid << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
	67
3dbb8c62	68	handle_irq(irq);
1da177e4 LT	69	}
	70
	71	static volatile unsigned long *
	72	io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
	73	{
	74	volatile unsigned long *ctl;
	75	unsigned int pid;
	76	struct io7 *io7;
	77
	78	pid = irq >> MARVEL_IRQ_VEC_PE_SHIFT;
	79
	80	if (!(io7 = marvel_find_io7(pid))) {
	81	printk(KERN_ERR
	82	"%s for nonexistent io7 -- vec %x, pid %d\n",
	83	__FUNCTION__, irq, pid);
	84	return NULL;
	85	}
	86
	87	irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* isolate the vector */
	88	irq -= 16; /* subtract legacy bias */
	89
	90	if (irq >= 0x180) {
	91	printk(KERN_ERR
	92	"%s for invalid irq -- pid %d adjusted irq %x\n",
	93	__FUNCTION__, pid, irq);
	94	return NULL;
	95	}
	96
	97	ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */
	98	if (irq >= 0x80) /* MSI */
	99	ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;
	100
	101	if (pio7) *pio7 = io7;
	102	return ctl;
	103	}
	104
	105	static void
	106	io7_enable_irq(unsigned int irq)
	107	{
	108	volatile unsigned long *ctl;
	109	struct io7 *io7;
	110
	111	ctl = io7_get_irq_ctl(irq, &io7);
	112	if (!ctl \|\| !io7) {
	113	printk(KERN_ERR "%s: get_ctl failed for irq %x\n",
	114	__FUNCTION__, irq);
	115	return;
	116	}
	117
	118	spin_lock(&io7->irq_lock);
	119	*ctl \|= 1UL << 24;
	120	mb();
	121	*ctl;
	122	spin_unlock(&io7->irq_lock);
	123	}
	124
	125	static void
	126	io7_disable_irq(unsigned int irq)
	127	{
	128	volatile unsigned long *ctl;
	129	struct io7 *io7;
	130
	131	ctl = io7_get_irq_ctl(irq, &io7);
	132	if (!ctl \|\| !io7) {
133	printk(KERN_ERR "%s: get_ctl failed for irq %x\n",
134	__FUNCTION__, irq);
135	return;
136	}
137
138	spin_lock(&io7->irq_lock);
139	*ctl &= ~(1UL << 24);
140	mb();
141	*ctl;
142	spin_unlock(&io7->irq_lock);
143	}
144
145	static unsigned int
146	io7_startup_irq(unsigned int irq)
147	{
148	io7_enable_irq(irq);
149	return 0; /* never anything pending */
150	}
151
152	static void
153	io7_end_irq(unsigned int irq)
154	{
155	if (!(irq_desc[irq].status & (IRQ_DISABLED\|IRQ_INPROGRESS)))
156	io7_enable_irq(irq);
157	}
158
159	static void
160	marvel_irq_noop(unsigned int irq)
161	{
162	return;
163	}
164
165	static unsigned int
166	marvel_irq_noop_return(unsigned int irq)
167	{
168	return 0;
169	}
170
171	static struct hw_interrupt_type marvel_legacy_irq_type = {
172	.typename = "LEGACY",
173	.startup = marvel_irq_noop_return,
174	.shutdown = marvel_irq_noop,
175	.enable = marvel_irq_noop,
176	.disable = marvel_irq_noop,
177	.ack = marvel_irq_noop,
178	.end = marvel_irq_noop,
179	};
180
181	static struct hw_interrupt_type io7_lsi_irq_type = {
182	.typename = "LSI",
183	.startup = io7_startup_irq,
184	.shutdown = io7_disable_irq,
185	.enable = io7_enable_irq,
186	.disable = io7_disable_irq,
187	.ack = io7_disable_irq,
188	.end = io7_end_irq,
189	};
190
191	static struct hw_interrupt_type io7_msi_irq_type = {
192	.typename = "MSI",
193	.startup = io7_startup_irq,
194	.shutdown = io7_disable_irq,
195	.enable = io7_enable_irq,
196	.disable = io7_disable_irq,
197	.ack = marvel_irq_noop,
198	.end = io7_end_irq,
199	};
200
201	static void
202	io7_redirect_irq(struct io7 *io7,
203	volatile unsigned long *csr,
204	unsigned int where)
205	{
206	unsigned long val;
207
208	val = *csr;
209	val &= ~(0x1ffUL << 24); /* clear the target pid */
210	val \|= ((unsigned long)where << 24); /* set the new target pid */
211
212	*csr = val;
213	mb();
214	*csr;
215	}
216
217	static void
218	io7_redirect_one_lsi(struct io7 *io7, unsigned int which, unsigned int where)
219	{
220	unsigned long val;
221
222	/*
223	* LSI_CTL has target PID @ 14
224	*/
225	val = io7->csrs->PO7_LSI_CTL[which].csr;
226	val &= ~(0x1ffUL << 14); /* clear the target pid */
227	val \|= ((unsigned long)where << 14); /* set the new target pid */
228
229	io7->csrs->PO7_LSI_CTL[which].csr = val;
230	mb();
231	io7->csrs->PO7_LSI_CTL[which].csr;
232	}
233
234	static void
235	io7_redirect_one_msi(struct io7 *io7, unsigned int which, unsigned int where)
236	{
237	unsigned long val;
238
239	/*
240	* MSI_CTL has target PID @ 14
241	*/
242	val = io7->csrs->PO7_MSI_CTL[which].csr;
243	val &= ~(0x1ffUL << 14); /* clear the target pid */
244	val \|= ((unsigned long)where << 14); /* set the new target pid */
245
246	io7->csrs->PO7_MSI_CTL[which].csr = val;
247	mb();
248	io7->csrs->PO7_MSI_CTL[which].csr;
249	}
250
251	static void __init
252	init_one_io7_lsi(struct io7 *io7, unsigned int which, unsigned int where)
253	{
254	/*
255	* LSI_CTL has target PID @ 14
256	*/
257	io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);
258	mb();
259	io7->csrs->PO7_LSI_CTL[which].csr;
260	}
261
262	static void __init
263	init_one_io7_msi(struct io7 *io7, unsigned int which, unsigned int where)
264	{
265	/*
266	* MSI_CTL has target PID @ 14
267	*/
268	io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);
269	mb();
270	io7->csrs->PO7_MSI_CTL[which].csr;
271	}
272
273	static void __init
274	init_io7_irqs(struct io7 *io7,
275	struct hw_interrupt_type *lsi_ops,
276	struct hw_interrupt_type *msi_ops)
277	{
278	long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16;
279	long i;
280
281	printk("Initializing interrupts for IO7 at PE %u - base %lx\n",
282	io7->pe, base);
283
284	/*
285	* Where should interrupts from this IO7 go?
286	*
287	* They really should be sent to the local CPU to avoid having to
288	* traverse the mesh, but if it's not an SMP kernel, they have to
289	* go to the boot CPU. Send them all to the boot CPU for now,
290	* as each secondary starts, it can redirect it's local device
291	* interrupts.
292	*/
293	printk(" Interrupts reported to CPU at PE %u\n", boot_cpuid);
294
295	spin_lock(&io7->irq_lock);
296
297	/* set up the error irqs */
298	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);
299	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);
300	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);
301	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
302	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);
303
304	/* Set up the lsi irqs. */
305	for (i = 0; i < 128; ++i) {
306	irq_desc[base + i].status = IRQ_DISABLED \| IRQ_LEVEL;
d1bef4ed	307	irq_desc[base + i].chip = lsi_ops;
1da177e4 LT	308	}
	309
	310	/* Disable the implemented irqs in hardware. */
	311	for (i = 0; i < 0x60; ++i)
	312	init_one_io7_lsi(io7, i, boot_cpuid);
	313
	314	init_one_io7_lsi(io7, 0x74, boot_cpuid);
	315	init_one_io7_lsi(io7, 0x75, boot_cpuid);
	316
	317
	318	/* Set up the msi irqs. */
	319	for (i = 128; i < (128 + 512); ++i) {
	320	irq_desc[base + i].status = IRQ_DISABLED \| IRQ_LEVEL;
d1bef4ed	321	irq_desc[base + i].chip = msi_ops;
1da177e4 LT	322	}
	323
	324	for (i = 0; i < 16; ++i)
	325	init_one_io7_msi(io7, i, boot_cpuid);
	326
	327	spin_unlock(&io7->irq_lock);
	328	}
	329
	330	static void __init
	331	marvel_init_irq(void)
	332	{
	333	int i;
	334	struct io7 *io7 = NULL;
	335
	336	/* Reserve the legacy irqs. */
	337	for (i = 0; i < 16; ++i) {
	338	irq_desc[i].status = IRQ_DISABLED;
d1bef4ed	339	irq_desc[i].chip = &marvel_legacy_irq_type;
1da177e4 LT	340	}
	341
	342	/* Init the io7 irqs. */
	343	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
	344	init_io7_irqs(io7, &io7_lsi_irq_type, &io7_msi_irq_type);
	345	}
	346
	347	static int
	348	marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
	349	{
	350	struct pci_controller *hose = dev->sysdata;
	351	struct io7_port *io7_port = hose->sysdata;
	352	struct io7 *io7 = io7_port->io7;
	353	int msi_loc, msi_data_off;
	354	u16 msg_ctl;
	355	u16 msg_dat;
	356	u8 intline;
	357	int irq;
	358
	359	pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
	360	irq = intline;
	361
	362	msi_loc = pci_find_capability(dev, PCI_CAP_ID_MSI);
	363	msg_ctl = 0;
	364	if (msi_loc)
	365	pci_read_config_word(dev, msi_loc + PCI_MSI_FLAGS, &msg_ctl);
	366
	367	if (msg_ctl & PCI_MSI_FLAGS_ENABLE) {
	368	msi_data_off = PCI_MSI_DATA_32;
	369	if (msg_ctl & PCI_MSI_FLAGS_64BIT)
	370	msi_data_off = PCI_MSI_DATA_64;
	371	pci_read_config_word(dev, msi_loc + msi_data_off, &msg_dat);
	372
	373	irq = msg_dat & 0x1ff; /* we use msg_data<8:0> */
	374	irq += 0x80; /* offset for lsi */
	375
	376	#if 1
982245f0	377	printk("PCI:%d:%d:%d (hose %d) is using MSI\n",
1da177e4 LT	378	dev->bus->number,
	379	PCI_SLOT(dev->devfn),
	380	PCI_FUNC(dev->devfn),
982245f0	381	hose->index);
1da177e4 LT	382	printk(" %d message(s) from 0x%04x\n",
	383	1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4),
	384	msg_dat);
	385	printk(" reporting on %d IRQ(s) from %d (0x%x)\n",
	386	1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4),
	387	(irq + 16) \| (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT),
	388	(irq + 16) \| (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT));
	389	#endif
	390
	391	#if 0
	392	pci_write_config_word(dev, msi_loc + PCI_MSI_FLAGS,
	393	msg_ctl & ~PCI_MSI_FLAGS_ENABLE);
	394	pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
	395	irq = intline;
	396
	397	printk(" forcing LSI interrupt on irq %d [0x%x]\n", irq, irq);
	398	#endif
	399	}
	400
	401	irq += 16; /* offset for legacy */
	402	irq \|= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
	403
	404	return irq;
	405	}
	406
	407	static void __init
	408	marvel_init_pci(void)
	409	{
	410	struct io7 *io7;
	411
	412	marvel_register_error_handlers();
	413
	414	pci_probe_only = 1;
	415	common_init_pci();
1da177e4	416	locate_and_init_vga(NULL);
1da177e4 LT	417
	418	/* Clear any io7 errors. */
	419	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
	420	io7_clear_errors(io7);
	421	}
	422
ebaf4fc1	423	static void __init
1da177e4 LT	424	marvel_init_rtc(void)
	425	{
	426	init_rtc_irq();
	427	}
	428
	429	static void
	430	marvel_smp_callin(void)
	431	{
	432	int cpuid = hard_smp_processor_id();
	433	struct io7 *io7 = marvel_find_io7(cpuid);
	434	unsigned int i;
	435
	436	if (!io7)
	437	return;
	438
	439	/*
	440	* There is a local IO7 - redirect all of its interrupts here.
	441	*/
	442	printk("Redirecting IO7 interrupts to local CPU at PE %u\n", cpuid);
	443
	444	/* Redirect the error IRQS here. */
	445	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
	446	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
	447	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
	448	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
	449	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);
	450
	451	/* Redirect the implemented LSIs here. */
	452	for (i = 0; i < 0x60; ++i)
	453	io7_redirect_one_lsi(io7, i, cpuid);
	454
	455	io7_redirect_one_lsi(io7, 0x74, cpuid);
	456	io7_redirect_one_lsi(io7, 0x75, cpuid);
	457
	458	/* Redirect the MSIs here. */
	459	for (i = 0; i < 16; ++i)
	460	io7_redirect_one_msi(io7, i, cpuid);
	461	}
	462	\f
	463	/*
	464	* System Vectors
	465	*/
	466	struct alpha_machine_vector marvel_ev7_mv __initmv = {
	467	.vector_name = "MARVEL/EV7",
	468	DO_EV7_MMU,
	469	DO_DEFAULT_RTC,
	470	DO_MARVEL_IO,
	471	.machine_check = marvel_machine_check,
	472	.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
	473	.min_io_address = DEFAULT_IO_BASE,
	474	.min_mem_address = DEFAULT_MEM_BASE,
	475	.pci_dac_offset = IO7_DAC_OFFSET,
	476
	477	.nr_irqs = MARVEL_NR_IRQS,
	478	.device_interrupt = io7_device_interrupt,
	479
	480	.agp_info = marvel_agp_info,
	481
	482	.smp_callin = marvel_smp_callin,
	483	.init_arch = marvel_init_arch,
	484	.init_irq = marvel_init_irq,
	485	.init_rtc = marvel_init_rtc,
	486	.init_pci = marvel_init_pci,
	487	.kill_arch = marvel_kill_arch,
488	.pci_map_irq = marvel_map_irq,
489	.pci_swizzle = common_swizzle,
490
491	.pa_to_nid = marvel_pa_to_nid,
492	.cpuid_to_nid = marvel_cpuid_to_nid,
493	.node_mem_start = marvel_node_mem_start,
494	.node_mem_size = marvel_node_mem_size,
495	};
496	ALIAS_MV(marvel_ev7)