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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
4adeefe1 | 11 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
12 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
13 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
14 | select GENERIC_ATOMIC64 | |
15 | select GENERIC_CLOCKEVENTS | |
16 | select GENERIC_FIND_FIRST_BIT | |
17 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
18 | select GENERIC_IRQ_SHOW | |
19 | select GENERIC_PENDING_IRQ if SMP | |
20 | select GENERIC_SMP_IDLE_THREAD | |
f46121bd | 21 | select HAVE_ARCH_KGDB |
547f1125 | 22 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 23 | select HAVE_GENERIC_HARDIRQS |
4368902b | 24 | select HAVE_IOREMAP_PROT |
4d86dfbb VG |
25 | select HAVE_KPROBES |
26 | select HAVE_KRETPROBES | |
c121c506 | 27 | select HAVE_MEMBLOCK |
854a0d95 | 28 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 29 | select HAVE_OPROFILE |
9c57564e | 30 | select HAVE_PERF_EVENTS |
999159a5 | 31 | select IRQ_DOMAIN |
cfdbc2e1 | 32 | select MODULES_USE_ELF_RELA |
c121c506 | 33 | select NO_BOOTMEM |
999159a5 VG |
34 | select OF |
35 | select OF_EARLY_FLATTREE | |
9c57564e | 36 | select PERF_USE_VMALLOC |
d1a1dc0b | 37 | select HAVE_DEBUG_STACKOVERFLOW |
cfdbc2e1 VG |
38 | |
39 | config SCHED_OMIT_FRAME_POINTER | |
40 | def_bool y | |
41 | ||
42 | config GENERIC_CSUM | |
43 | def_bool y | |
44 | ||
45 | config RWSEM_GENERIC_SPINLOCK | |
46 | def_bool y | |
47 | ||
48 | config ARCH_FLATMEM_ENABLE | |
49 | def_bool y | |
50 | ||
51 | config MMU | |
52 | def_bool y | |
53 | ||
54 | config NO_IOPORT | |
55 | def_bool y | |
56 | ||
57 | config GENERIC_CALIBRATE_DELAY | |
58 | def_bool y | |
59 | ||
60 | config GENERIC_HWEIGHT | |
61 | def_bool y | |
62 | ||
44c8bb91 VG |
63 | config STACKTRACE_SUPPORT |
64 | def_bool y | |
65 | select STACKTRACE | |
66 | ||
cfdbc2e1 VG |
67 | config HAVE_LATENCYTOP_SUPPORT |
68 | def_bool y | |
69 | ||
70 | config NO_DMA | |
71 | def_bool n | |
72 | ||
73 | source "init/Kconfig" | |
74 | source "kernel/Kconfig.freezer" | |
75 | ||
76 | menu "ARC Architecture Configuration" | |
77 | ||
93ad700d | 78 | menu "ARC Platform/SoC/Board" |
cfdbc2e1 | 79 | |
93ad700d | 80 | source "arch/arc/plat-arcfpga/Kconfig" |
072eb693 | 81 | source "arch/arc/plat-tb10x/Kconfig" |
cfdbc2e1 | 82 | #New platform adds here |
93ad700d | 83 | |
53d98958 | 84 | endmenu |
cfdbc2e1 VG |
85 | |
86 | menu "ARC CPU Configuration" | |
87 | ||
88 | choice | |
89 | prompt "ARC Core" | |
90 | default ARC_CPU_770 | |
91 | ||
92 | config ARC_CPU_750D | |
93 | bool "ARC750D" | |
94 | help | |
95 | Support for ARC750 core | |
96 | ||
97 | config ARC_CPU_770 | |
98 | bool "ARC770" | |
99 | select ARC_CPU_REL_4_10 | |
100 | help | |
101 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
102 | This core has a bunch of cool new features: | |
103 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
104 | Shared Address Spaces (for sharing TLB entires in MMU) | |
105 | -Caches: New Prog Model, Region Flush | |
106 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
107 | ||
108 | endchoice | |
109 | ||
110 | config CPU_BIG_ENDIAN | |
111 | bool "Enable Big Endian Mode" | |
112 | default n | |
113 | help | |
114 | Build kernel for Big Endian Mode of ARC CPU | |
115 | ||
fc7943d2 VG |
116 | # If a platform can't work with 0x8000_0000 based dma_addr_t |
117 | config ARC_PLAT_NEEDS_CPU_TO_DMA | |
118 | bool | |
119 | ||
41195d23 VG |
120 | config SMP |
121 | bool "Symmetric Multi-Processing (Incomplete)" | |
122 | default n | |
123 | select USE_GENERIC_SMP_HELPERS | |
124 | help | |
125 | This enables support for systems with more than one CPU. If you have | |
126 | a system with only one CPU, like most personal computers, say N. If | |
127 | you have a system with more than one CPU, say Y. | |
128 | ||
129 | if SMP | |
130 | ||
131 | config ARC_HAS_COH_CACHES | |
132 | def_bool n | |
133 | ||
41195d23 VG |
134 | config ARC_HAS_COH_RTSC |
135 | def_bool n | |
136 | ||
137 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
138 | def_bool n | |
139 | ||
140 | endif | |
141 | ||
142 | config NR_CPUS | |
143 | int "Maximum number of CPUs (2-32)" | |
144 | range 2 32 | |
145 | depends on SMP | |
146 | default "2" | |
147 | ||
cfdbc2e1 VG |
148 | menuconfig ARC_CACHE |
149 | bool "Enable Cache Support" | |
150 | default y | |
41195d23 VG |
151 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
152 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
153 | |
154 | if ARC_CACHE | |
155 | ||
156 | config ARC_CACHE_LINE_SHIFT | |
157 | int "Cache Line Length (as power of 2)" | |
158 | range 5 7 | |
159 | default "6" | |
160 | help | |
161 | Starting with ARC700 4.9, Cache line length is configurable, | |
162 | This option specifies "N", with Line-len = 2 power N | |
163 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
164 | Linux only supports same line lengths for I and D caches. | |
165 | ||
166 | config ARC_HAS_ICACHE | |
167 | bool "Use Instruction Cache" | |
168 | default y | |
169 | ||
170 | config ARC_HAS_DCACHE | |
171 | bool "Use Data Cache" | |
172 | default y | |
173 | ||
174 | config ARC_CACHE_PAGES | |
175 | bool "Per Page Cache Control" | |
176 | default y | |
177 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
178 | help | |
179 | This can be used to over-ride the global I/D Cache Enable on a | |
180 | per-page basis (but only for pages accessed via MMU such as | |
181 | Kernel Virtual address or User Virtual Address) | |
182 | TLB entries have a per-page Cache Enable Bit. | |
183 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
184 | Global DISABLE + Per Page ENABLE won't work | |
185 | ||
4102b533 VG |
186 | config ARC_CACHE_VIPT_ALIASING |
187 | bool "Support VIPT Aliasing D$" | |
2f9e9961 | 188 | depends on ARC_HAS_DCACHE |
4102b533 VG |
189 | default n |
190 | ||
cfdbc2e1 VG |
191 | endif #ARC_CACHE |
192 | ||
8b5850f8 VG |
193 | config ARC_HAS_ICCM |
194 | bool "Use ICCM" | |
195 | help | |
196 | Single Cycle RAMS to store Fast Path Code | |
197 | default n | |
198 | ||
199 | config ARC_ICCM_SZ | |
200 | int "ICCM Size in KB" | |
201 | default "64" | |
202 | depends on ARC_HAS_ICCM | |
203 | ||
204 | config ARC_HAS_DCCM | |
205 | bool "Use DCCM" | |
206 | help | |
207 | Single Cycle RAMS to store Fast Path Data | |
208 | default n | |
209 | ||
210 | config ARC_DCCM_SZ | |
211 | int "DCCM Size in KB" | |
212 | default "64" | |
213 | depends on ARC_HAS_DCCM | |
214 | ||
215 | config ARC_DCCM_BASE | |
216 | hex "DCCM map address" | |
217 | default "0xA0000000" | |
218 | depends on ARC_HAS_DCCM | |
219 | ||
cfdbc2e1 VG |
220 | config ARC_HAS_HW_MPY |
221 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
222 | default y | |
223 | help | |
224 | Influences how gcc generates code for MPY operations. | |
225 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
226 | Multipler. Otherwise software multipy lib is used | |
227 | ||
228 | choice | |
229 | prompt "ARC700 MMU Version" | |
230 | default ARC_MMU_V3 if ARC_CPU_770 | |
231 | default ARC_MMU_V2 if ARC_CPU_750D | |
232 | ||
233 | config ARC_MMU_V1 | |
234 | bool "MMU v1" | |
235 | help | |
236 | Orig ARC700 MMU | |
237 | ||
238 | config ARC_MMU_V2 | |
239 | bool "MMU v2" | |
240 | help | |
241 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
242 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
243 | ||
244 | config ARC_MMU_V3 | |
245 | bool "MMU v3" | |
246 | depends on ARC_CPU_770 | |
247 | help | |
248 | Introduced with ARC700 4.10: New Features | |
249 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
250 | Shared Address Spaces (SASID) | |
251 | ||
252 | endchoice | |
253 | ||
254 | ||
255 | choice | |
256 | prompt "MMU Page Size" | |
257 | default ARC_PAGE_SIZE_8K | |
258 | ||
259 | config ARC_PAGE_SIZE_8K | |
260 | bool "8KB" | |
261 | help | |
262 | Choose between 8k vs 16k | |
263 | ||
264 | config ARC_PAGE_SIZE_16K | |
265 | bool "16KB" | |
266 | depends on ARC_MMU_V3 | |
267 | ||
268 | config ARC_PAGE_SIZE_4K | |
269 | bool "4KB" | |
270 | depends on ARC_MMU_V3 | |
271 | ||
272 | endchoice | |
273 | ||
4788a594 VG |
274 | config ARC_COMPACT_IRQ_LEVELS |
275 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
276 | default n | |
277 | # Timer HAS to be high priority, for any other high priority config | |
278 | select ARC_IRQ3_LV2 | |
41195d23 VG |
279 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
280 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
281 | |
282 | if ARC_COMPACT_IRQ_LEVELS | |
283 | ||
284 | config ARC_IRQ3_LV2 | |
285 | bool | |
286 | ||
287 | config ARC_IRQ5_LV2 | |
288 | bool | |
289 | ||
290 | config ARC_IRQ6_LV2 | |
291 | bool | |
292 | ||
293 | endif | |
294 | ||
cfdbc2e1 VG |
295 | config ARC_FPU_SAVE_RESTORE |
296 | bool "Enable FPU state persistence across context switch" | |
297 | default n | |
298 | help | |
299 | Double Precision Floating Point unit had dedictaed regs which | |
300 | need to be saved/restored across context-switch. | |
301 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
302 | hardware pieces to allow software to conditionally save/restore, | |
303 | based on actual usage of FPU by a task. Thus our implemn does | |
304 | this for all tasks in system. | |
305 | ||
fbf8e13d VG |
306 | config ARC_CANT_LLSC |
307 | def_bool n | |
308 | ||
cfdbc2e1 VG |
309 | menuconfig ARC_CPU_REL_4_10 |
310 | bool "Enable support for Rel 4.10 features" | |
311 | default n | |
312 | help | |
313 | -ARC770 (and dependent features) enabled | |
314 | -ARC750 also shares some of the new features with 770 | |
315 | ||
316 | config ARC_HAS_LLSC | |
317 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
318 | default y | |
fbf8e13d | 319 | depends on ARC_CPU_770 && !ARC_CANT_LLSC |
cfdbc2e1 VG |
320 | |
321 | config ARC_HAS_SWAPE | |
322 | bool "Insn: SWAPE (endian-swap)" | |
323 | default y | |
324 | depends on ARC_CPU_REL_4_10 | |
325 | ||
326 | config ARC_HAS_RTSC | |
327 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
328 | default y | |
329 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
330 | # if SMP, enable RTSC only if counter is coherent across cores |
331 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
332 | |
333 | endmenu # "ARC CPU Configuration" | |
334 | ||
cfdbc2e1 VG |
335 | config LINUX_LINK_BASE |
336 | hex "Linux Link Address" | |
337 | default "0x80000000" | |
338 | help | |
339 | ARC700 divides the 32 bit phy address space into two equal halves | |
340 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
341 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
342 | Typically Linux kernel is linked at the start of untransalted addr, | |
343 | hence the default value of 0x8zs. | |
344 | However some customers have peripherals mapped at this addr, so | |
345 | Linux needs to be scooted a bit. | |
346 | If you don't know what the above means, leave this setting alone. | |
347 | ||
080c3747 VG |
348 | config ARC_CURR_IN_REG |
349 | bool "Dedicate Register r25 for current_task pointer" | |
350 | default y | |
351 | help | |
352 | This reserved Register R25 to point to Current Task in | |
353 | kernel mode. This saves memory access for each such access | |
354 | ||
2e651ea1 VG |
355 | |
356 | config ARC_MISALIGN_ACCESS | |
357 | bool "Emulate unaligned memory access (userspace only)" | |
358 | default N | |
359 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
360 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
361 | help | |
362 | This enables misaligned 16 & 32 bit memory access from user space. | |
363 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
364 | potential bugs in code | |
365 | ||
cfdbc2e1 VG |
366 | config HZ |
367 | int "Timer Frequency" | |
368 | default 100 | |
369 | ||
cbe056f7 VG |
370 | config ARC_METAWARE_HLINK |
371 | bool "Support for Metaware debugger assisted Host access" | |
372 | default n | |
373 | help | |
374 | This options allows a Linux userland apps to directly access | |
375 | host file system (open/creat/read/write etc) with help from | |
376 | Metaware Debugger. This can come in handy for Linux-host communication | |
377 | when there is no real usable peripheral such as EMAC. | |
378 | ||
cfdbc2e1 VG |
379 | menuconfig ARC_DBG |
380 | bool "ARC debugging" | |
381 | default y | |
382 | ||
854a0d95 VG |
383 | config ARC_DW2_UNWIND |
384 | bool "Enable DWARF specific kernel stack unwind" | |
385 | depends on ARC_DBG | |
386 | default y | |
387 | select KALLSYMS | |
388 | help | |
389 | Compiles the kernel with DWARF unwind information and can be used | |
390 | to get stack backtraces. | |
391 | ||
392 | If you say Y here the resulting kernel image will be slightly larger | |
393 | but not slower, and it will give very useful debugging information. | |
394 | If you don't debug the kernel, you can say N, but we may not be able | |
395 | to solve problems without frame unwind information | |
396 | ||
cfdbc2e1 VG |
397 | config ARC_DBG_TLB_PARANOIA |
398 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 399 | depends on ARC_DBG |
cfdbc2e1 VG |
400 | default n |
401 | ||
402 | config ARC_DBG_TLB_MISS_COUNT | |
403 | bool "Profile TLB Misses" | |
404 | default n | |
405 | select DEBUG_FS | |
406 | depends on ARC_DBG | |
407 | help | |
408 | Counts number of I and D TLB Misses and exports them via Debugfs | |
409 | The counters can be cleared via Debugfs as well | |
410 | ||
cfdbc2e1 VG |
411 | config CMDLINE_UBOOT |
412 | bool "Support U-boot kernel command line passing" | |
413 | default n | |
414 | help | |
415 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
416 | command line from the U-boot environment to the Linux kernel then | |
417 | switch this option on. | |
418 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
6971881f VG |
419 | to it. kernel startup code will append this to DeviceTree |
420 | /bootargs provided cmdline args. | |
cfdbc2e1 | 421 | |
999159a5 VG |
422 | config ARC_BUILTIN_DTB_NAME |
423 | string "Built in DTB" | |
424 | help | |
425 | Set the name of the DTB to embed in the vmlinux binary | |
426 | Leaving it blank selects the minimal "skeleton" dtb | |
427 | ||
cfdbc2e1 VG |
428 | source "kernel/Kconfig.preempt" |
429 | ||
5628832f VG |
430 | menu "Executable file formats" |
431 | source "fs/Kconfig.binfmt" | |
432 | endmenu | |
433 | ||
cfdbc2e1 VG |
434 | endmenu # "ARC Architecture Configuration" |
435 | ||
436 | source "mm/Kconfig" | |
437 | source "net/Kconfig" | |
438 | source "drivers/Kconfig" | |
439 | source "fs/Kconfig" | |
440 | source "arch/arc/Kconfig.debug" | |
441 | source "security/Kconfig" | |
442 | source "crypto/Kconfig" | |
443 | source "lib/Kconfig" |