projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| abe11dde VG |
1 | /* |
| 2 | * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | */ | |
| 8 | /dts-v1/; | |
| 9 | ||
| 10 | /include/ "skeleton.dtsi" | |
| 11 | ||
| 12 | / { | |
| 13 | compatible = "snps,arc-angel4"; | |
| 14 | clock-frequency = <80000000>; /* 80 MHZ */ | |
| 15 | #address-cells = <1>; | |
| 16 | #size-cells = <1>; | |
| 17 | interrupt-parent = <&intc>; | |
| 18 | ||
| 19 | chosen { | |
| 20 | bootargs = "console=ttyARC0,115200n8"; | |
| 21 | }; | |
| 22 | ||
| 23 | aliases { | |
| 24 | serial0 = &arcuart0; | |
| 25 | }; | |
| 26 | ||
| 27 | memory { | |
| 28 | device_type = "memory"; | |
| 29 | reg = <0x00000000 0x10000000>; /* 256M */ | |
| 30 | }; | |
| 31 | ||
| 32 | fpga { | |
| 33 | compatible = "simple-bus"; | |
| 34 | #address-cells = <1>; | |
| 35 | #size-cells = <1>; | |
| 36 | ||
| 37 | /* child and parent address space 1:1 mapped */ | |
| 38 | ranges; | |
| 39 | ||
| 40 | intc: interrupt-controller { | |
| 41 | compatible = "snps,arc700-intc"; | |
| 42 | interrupt-controller; | |
| 43 | #interrupt-cells = <1>; | |
| 44 | }; | |
| 45 | ||
| 46 | arcuart0: serial@c0fc1000 { | |
| 47 | compatible = "snps,arc-uart"; | |
| 48 | reg = <0xc0fc1000 0x100>; | |
| 49 | interrupts = <5>; | |
| 50 | clock-frequency = <80000000>; | |
| fc32781b | 51 | current-speed = <115200>; |
| abe11dde VG |
52 | status = "okay"; |
| 53 | }; | |
| 54 | }; | |
| 55 | }; |