[deliverable/linux.git] / arch / arc / include / asm / futex.h

/*
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Vineetg: August 2010: From Android kernel work
 */

#ifndef _ASM_FUTEX_H
#define _ASM_FUTEX_H

#include <linux/futex.h>
#include <linux/preempt.h>
#include <linux/uaccess.h>
#include <asm/errno.h>

#ifdef CONFIG_ARC_HAS_LLSC

#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
							\
	__asm__ __volatile__(				\
	"1:	llock	%1, [%2]		\n"	\
		insn				"\n"	\
	"2:	scond	%0, [%2]		\n"	\
	"	bnz	1b			\n"	\
	"	mov %0, 0			\n"	\
	"3:					\n"	\
	"	.section .fixup,\"ax\"		\n"	\
	"	.align  4			\n"	\
	"4:	mov %0, %4			\n"	\
	"	b   3b				\n"	\
	"	.previous			\n"	\
	"	.section __ex_table,\"a\"	\n"	\
	"	.align  4			\n"	\
	"	.word   1b, 4b			\n"	\
	"	.word   2b, 4b			\n"	\
	"	.previous			\n"	\
							\
	: "=&r" (ret), "=&r" (oldval)			\
	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\
	: "cc", "memory")

#else	/* !CONFIG_ARC_HAS_LLSC */

#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
							\
	__asm__ __volatile__(				\
	"1:	ld	%1, [%2]		\n"	\
		insn				"\n"	\
	"2:	st	%0, [%2]		\n"	\
	"	mov %0, 0			\n"	\
	"3:					\n"	\
	"	.section .fixup,\"ax\"		\n"	\
	"	.align  4			\n"	\
	"4:	mov %0, %4			\n"	\
	"	b   3b				\n"	\
	"	.previous			\n"	\
	"	.section __ex_table,\"a\"	\n"	\
	"	.align  4			\n"	\
	"	.word   1b, 4b			\n"	\
	"	.word   2b, 4b			\n"	\
	"	.previous			\n"	\
							\
	: "=&r" (ret), "=&r" (oldval)			\
	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT)	\
	: "cc", "memory")

#endif

static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
{
	int op = (encoded_op >> 28) & 7;
	int cmp = (encoded_op >> 24) & 15;
	int oparg = (encoded_op << 8) >> 20;
	int cmparg = (encoded_op << 20) >> 20;
	int oldval = 0, ret;

	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
		oparg = 1 << oparg;

	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
		return -EFAULT;

	pagefault_disable();

	switch (op) {
	case FUTEX_OP_SET:
		__futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
		break;
	case FUTEX_OP_ADD:
		__futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
		break;
	case FUTEX_OP_OR:
		__futex_atomic_op("or  %0, %1, %3", ret, oldval, uaddr, oparg);
		break;
	case FUTEX_OP_ANDN:
		__futex_atomic_op("bic %0, %1, %3", ret, oldval, uaddr, oparg);
		break;
	case FUTEX_OP_XOR:
		__futex_atomic_op("xor %0, %1, %3", ret, oldval, uaddr, oparg);
		break;
	default:
		ret = -ENOSYS;
	}

	pagefault_enable();

	if (!ret) {
		switch (cmp) {
		case FUTEX_OP_CMP_EQ:
			ret = (oldval == cmparg);
			break;
		case FUTEX_OP_CMP_NE:
			ret = (oldval != cmparg);
			break;
		case FUTEX_OP_CMP_LT:
			ret = (oldval < cmparg);
			break;
		case FUTEX_OP_CMP_GE:
			ret = (oldval >= cmparg);
			break;
		case FUTEX_OP_CMP_LE:
			ret = (oldval <= cmparg);
			break;
		case FUTEX_OP_CMP_GT:
			ret = (oldval > cmparg);
			break;
		default:
			ret = -ENOSYS;
		}
	}
	return ret;
}

/* Compare-xchg with pagefaults disabled.
 *  Notes:
 *      -Best-Effort: Exchg happens only if compare succeeds.
 *          If compare fails, returns; leaving retry/looping to upper layers
 *      -successful cmp-xchg: return orig value in @addr (same as cmp val)
 *      -Compare fails: return orig value in @addr
 *      -user access r/w fails: return -EFAULT
 */
static inline int
futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval,
					u32 newval)
{
	u32 val;

	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
		return -EFAULT;

	pagefault_disable();

	__asm__ __volatile__(
#ifdef CONFIG_ARC_HAS_LLSC
	"1:	llock	%0, [%3]		\n"
	"	brne	%0, %1, 3f		\n"
	"2:	scond	%2, [%3]		\n"
	"	bnz	1b			\n"
#else
	"1:	ld	%0, [%3]		\n"
	"	brne	%0, %1, 3f		\n"
	"2:	st	%2, [%3]		\n"
#endif
	"3:	\n"
	"	.section .fixup,\"ax\"	\n"
	"4:	mov %0, %4	\n"
	"	b   3b	\n"
	"	.previous	\n"
	"	.section __ex_table,\"a\"	\n"
	"	.align  4	\n"
	"	.word   1b, 4b	\n"
	"	.word   2b, 4b	\n"
	"	.previous\n"
	: "=&r"(val)
	: "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT)
	: "cc", "memory");

	pagefault_enable();

	*uval = val;
	return val;
}

#endif
Commit	Line	Data
01b812bc VG	1	/*
	2	* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* Vineetg: August 2010: From Android kernel work
	9	*/
	10
	11	#ifndef _ASM_FUTEX_H
	12	#define _ASM_FUTEX_H
	13
	14	#include <linux/futex.h>
	15	#include <linux/preempt.h>
	16	#include <linux/uaccess.h>
	17	#include <asm/errno.h>
	18
9138d413 VG	19	#ifdef CONFIG_ARC_HAS_LLSC
	20
	21	#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
	22	\
	23	__asm__ __volatile__( \
	24	"1: llock %1, [%2] \n" \
	25	insn "\n" \
	26	"2: scond %0, [%2] \n" \
	27	" bnz 1b \n" \
	28	" mov %0, 0 \n" \
	29	"3: \n" \
	30	" .section .fixup,\"ax\" \n" \
	31	" .align 4 \n" \
	32	"4: mov %0, %4 \n" \
	33	" b 3b \n" \
	34	" .previous \n" \
	35	" .section __ex_table,\"a\" \n" \
	36	" .align 4 \n" \
	37	" .word 1b, 4b \n" \
	38	" .word 2b, 4b \n" \
	39	" .previous \n" \
	40	\
	41	: "=&r" (ret), "=&r" (oldval) \
	42	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT) \
	43	: "cc", "memory")
	44
	45	#else /* !CONFIG_ARC_HAS_LLSC */
	46
01b812bc VG	47	#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)\
	48	\
	49	__asm__ __volatile__( \
9138d413	50	"1: ld %1, [%2] \n" \
01b812bc	51	insn "\n" \
9138d413	52	"2: st %0, [%2] \n" \
01b812bc VG	53	" mov %0, 0 \n" \
	54	"3: \n" \
	55	" .section .fixup,\"ax\" \n" \
	56	" .align 4 \n" \
	57	"4: mov %0, %4 \n" \
	58	" b 3b \n" \
	59	" .previous \n" \
	60	" .section __ex_table,\"a\" \n" \
	61	" .align 4 \n" \
	62	" .word 1b, 4b \n" \
	63	" .word 2b, 4b \n" \
	64	" .previous \n" \
	65	\
	66	: "=&r" (ret), "=&r" (oldval) \
	67	: "r" (uaddr), "r" (oparg), "ir" (-EFAULT) \
	68	: "cc", "memory")
	69
9138d413 VG	70	#endif
9138d413 VG	71
01b812bc VG	72	static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
	73	{
	74	int op = (encoded_op >> 28) & 7;
	75	int cmp = (encoded_op >> 24) & 15;
	76	int oparg = (encoded_op << 8) >> 20;
	77	int cmparg = (encoded_op << 20) >> 20;
	78	int oldval = 0, ret;
	79
	80	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
	81	oparg = 1 << oparg;
	82
	83	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
	84	return -EFAULT;
	85
2f09b227	86	pagefault_disable();
01b812bc VG	87
	88	switch (op) {
	89	case FUTEX_OP_SET:
	90	__futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
	91	break;
	92	case FUTEX_OP_ADD:
	93	__futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
	94	break;
	95	case FUTEX_OP_OR:
	96	__futex_atomic_op("or %0, %1, %3", ret, oldval, uaddr, oparg);
	97	break;
	98	case FUTEX_OP_ANDN:
	99	__futex_atomic_op("bic %0, %1, %3", ret, oldval, uaddr, oparg);
	100	break;
	101	case FUTEX_OP_XOR:
	102	__futex_atomic_op("xor %0, %1, %3", ret, oldval, uaddr, oparg);
	103	break;
	104	default:
	105	ret = -ENOSYS;
	106	}
	107
2f09b227	108	pagefault_enable();
01b812bc VG	109
	110	if (!ret) {
	111	switch (cmp) {
	112	case FUTEX_OP_CMP_EQ:
	113	ret = (oldval == cmparg);
	114	break;
	115	case FUTEX_OP_CMP_NE:
	116	ret = (oldval != cmparg);
	117	break;
	118	case FUTEX_OP_CMP_LT:
	119	ret = (oldval < cmparg);
	120	break;
	121	case FUTEX_OP_CMP_GE:
	122	ret = (oldval >= cmparg);
	123	break;
	124	case FUTEX_OP_CMP_LE:
	125	ret = (oldval <= cmparg);
	126	break;
	127	case FUTEX_OP_CMP_GT:
	128	ret = (oldval > cmparg);
	129	break;
	130	default:
	131	ret = -ENOSYS;
	132	}
	133	}
	134	return ret;
	135	}
	136
2f09b227	137	/* Compare-xchg with pagefaults disabled.
01b812bc VG	138	* Notes:
	139	* -Best-Effort: Exchg happens only if compare succeeds.
	140	* If compare fails, returns; leaving retry/looping to upper layers
	141	* -successful cmp-xchg: return orig value in @addr (same as cmp val)
	142	* -Compare fails: return orig value in @addr
	143	* -user access r/w fails: return -EFAULT
	144	*/
	145	static inline int
	146	futex_atomic_cmpxchg_inatomic(u32 uval, u32 __user uaddr, u32 oldval,
	147	u32 newval)
	148	{
	149	u32 val;
	150
	151	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
	152	return -EFAULT;
	153
2f09b227	154	pagefault_disable();
01b812bc	155
01b812bc	156	__asm__ __volatile__(
9138d413 VG	157	#ifdef CONFIG_ARC_HAS_LLSC
	158	"1: llock %0, [%3] \n"
	159	" brne %0, %1, 3f \n"
	160	"2: scond %2, [%3] \n"
	161	" bnz 1b \n"
	162	#else
	163	"1: ld %0, [%3] \n"
	164	" brne %0, %1, 3f \n"
	165	"2: st %2, [%3] \n"
	166	#endif
01b812bc VG	167	"3: \n"
	168	" .section .fixup,\"ax\" \n"
	169	"4: mov %0, %4 \n"
	170	" b 3b \n"
	171	" .previous \n"
	172	" .section __ex_table,\"a\" \n"
	173	" .align 4 \n"
	174	" .word 1b, 4b \n"
	175	" .word 2b, 4b \n"
	176	" .previous\n"
	177	: "=&r"(val)
	178	: "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT)
	179	: "cc", "memory");
	180
2f09b227	181	pagefault_enable();
01b812bc VG	182
	183	*uval = val;
	184	return val;
	185	}
	186
	187	#endif