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Merge remote-tracking branches 'regulator/fix/as3722', 'regulator/fix/ltc3589' and...
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
8d766fa2
NM		 61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
efeedcf2 65 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 66 };
67 };
68
6797cdbe
AB		 69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
5fc0b42a 74 /*
5c5be9db 75 * The soc node represents the soc top level view. It is used for IPs
5fc0b42a
AC		 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
b552dfc4
AC		 86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
5fc0b42a
AC		 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
b7ab524b
GU		 97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
5fc0b42a
AC		 99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
ea291c98
TK		 109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
5fc0b42a
AC		 135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
141 };
142
505975d3
MP		 143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
cf7eb979 147 <0x44e10f90 0x40>;
505975d3
MP		 148 interrupts = <12 13 14>;
149 #dma-cells = <1>;
505975d3
MP		 150 };
151
b918e2c0 152 gpio0: gpio@44e07000 {
5fc0b42a
AC		 153 compatible = "ti,omap4-gpio";
154 ti,hwmods = "gpio1";
155 gpio-controller;
156 #gpio-cells = <2>;
157 interrupt-controller;
5eac0eb7 158 #interrupt-cells = <2>;
4462b31c 159 reg = <0x44e07000 0x1000>;
4462b31c 160 interrupts = <96>;
5fc0b42a
AC		 161 };
162
b918e2c0 163 gpio1: gpio@4804c000 {
5fc0b42a
AC		 164 compatible = "ti,omap4-gpio";
165 ti,hwmods = "gpio2";
166 gpio-controller;
167 #gpio-cells = <2>;
168 interrupt-controller;
5eac0eb7 169 #interrupt-cells = <2>;
4462b31c 170 reg = <0x4804c000 0x1000>;
4462b31c 171 interrupts = <98>;
5fc0b42a
AC		 172 };
173
b918e2c0 174 gpio2: gpio@481ac000 {
5fc0b42a
AC		 175 compatible = "ti,omap4-gpio";
176 ti,hwmods = "gpio3";
177 gpio-controller;
178 #gpio-cells = <2>;
179 interrupt-controller;
5eac0eb7 180 #interrupt-cells = <2>;
4462b31c 181 reg = <0x481ac000 0x1000>;
4462b31c 182 interrupts = <32>;
5fc0b42a
AC		 183 };
184
b918e2c0 185 gpio3: gpio@481ae000 {
5fc0b42a
AC		 186 compatible = "ti,omap4-gpio";
187 ti,hwmods = "gpio4";
188 gpio-controller;
189 #gpio-cells = <2>;
190 interrupt-controller;
5eac0eb7 191 #interrupt-cells = <2>;
4462b31c 192 reg = <0x481ae000 0x1000>;
4462b31c 193 interrupts = <62>;
5fc0b42a
AC		 194 };
195
dde3b0d6 196 uart0: serial@44e09000 {
5fc0b42a
AC		 197 compatible = "ti,omap3-uart";
198 ti,hwmods = "uart1";
199 clock-frequency = <48000000>;
4462b31c 200 reg = <0x44e09000 0x2000>;
4462b31c 201 interrupts = <72>;
53d91034 202 status = "disabled";
5fc0b42a
AC		 203 };
204
dde3b0d6 205 uart1: serial@48022000 {
5fc0b42a
AC		 206 compatible = "ti,omap3-uart";
207 ti,hwmods = "uart2";
208 clock-frequency = <48000000>;
4462b31c 209 reg = <0x48022000 0x2000>;
4462b31c 210 interrupts = <73>;
53d91034 211 status = "disabled";
5fc0b42a
AC		 212 };
213
dde3b0d6 214 uart2: serial@48024000 {
5fc0b42a
AC		 215 compatible = "ti,omap3-uart";
216 ti,hwmods = "uart3";
217 clock-frequency = <48000000>;
4462b31c 218 reg = <0x48024000 0x2000>;
4462b31c 219 interrupts = <74>;
53d91034 220 status = "disabled";
5fc0b42a
AC		 221 };
222
dde3b0d6 223 uart3: serial@481a6000 {
5fc0b42a
AC		 224 compatible = "ti,omap3-uart";
225 ti,hwmods = "uart4";
226 clock-frequency = <48000000>;
4462b31c 227 reg = <0x481a6000 0x2000>;
4462b31c 228 interrupts = <44>;
53d91034 229 status = "disabled";
5fc0b42a
AC		 230 };
231
dde3b0d6 232 uart4: serial@481a8000 {
5fc0b42a
AC		 233 compatible = "ti,omap3-uart";
234 ti,hwmods = "uart5";
235 clock-frequency = <48000000>;
4462b31c 236 reg = <0x481a8000 0x2000>;
4462b31c 237 interrupts = <45>;
53d91034 238 status = "disabled";
5fc0b42a
AC		 239 };
240
dde3b0d6 241 uart5: serial@481aa000 {
5fc0b42a
AC		 242 compatible = "ti,omap3-uart";
243 ti,hwmods = "uart6";
244 clock-frequency = <48000000>;
4462b31c 245 reg = <0x481aa000 0x2000>;
4462b31c 246 interrupts = <46>;
53d91034 247 status = "disabled";
5fc0b42a
AC		 248 };
249
b918e2c0 250 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 251 compatible = "ti,omap4-i2c";
252 #address-cells = <1>;
253 #size-cells = <0>;
254 ti,hwmods = "i2c1";
4462b31c 255 reg = <0x44e0b000 0x1000>;
4462b31c 256 interrupts = <70>;
53d91034 257 status = "disabled";
5fc0b42a
AC		 258 };
259
b918e2c0 260 i2c1: i2c@4802a000 {
5fc0b42a
AC		 261 compatible = "ti,omap4-i2c";
262 #address-cells = <1>;
263 #size-cells = <0>;
264 ti,hwmods = "i2c2";
4462b31c 265 reg = <0x4802a000 0x1000>;
4462b31c 266 interrupts = <71>;
53d91034 267 status = "disabled";
5fc0b42a
AC		 268 };
269
b918e2c0 270 i2c2: i2c@4819c000 {
5fc0b42a
AC		 271 compatible = "ti,omap4-i2c";
272 #address-cells = <1>;
273 #size-cells = <0>;
274 ti,hwmods = "i2c3";
4462b31c 275 reg = <0x4819c000 0x1000>;
4462b31c 276 interrupts = <30>;
53d91034 277 status = "disabled";
5fc0b42a 278 };
5f789ebc 279
55b4452b
MP		 280 mmc1: mmc@48060000 {
281 compatible = "ti,omap4-hsmmc";
282 ti,hwmods = "mmc1";
283 ti,dual-volt;
284 ti,needs-special-reset;
285 ti,needs-special-hs-handling;
286 dmas = <&edma 24
287 &edma 25>;
288 dma-names = "tx", "rx";
289 interrupts = <64>;
290 interrupt-parent = <&intc>;
291 reg = <0x48060000 0x1000>;
292 status = "disabled";
293 };
294
295 mmc2: mmc@481d8000 {
296 compatible = "ti,omap4-hsmmc";
297 ti,hwmods = "mmc2";
298 ti,needs-special-reset;
299 dmas = <&edma 2
300 &edma 3>;
301 dma-names = "tx", "rx";
302 interrupts = <28>;
303 interrupt-parent = <&intc>;
304 reg = <0x481d8000 0x1000>;
305 status = "disabled";
306 };
307
308 mmc3: mmc@47810000 {
309 compatible = "ti,omap4-hsmmc";
310 ti,hwmods = "mmc3";
311 ti,needs-special-reset;
312 interrupts = <29>;
313 interrupt-parent = <&intc>;
314 reg = <0x47810000 0x1000>;
315 status = "disabled";
316 };
317
d4cbe80d
SA		 318 hwspinlock: spinlock@480ca000 {
319 compatible = "ti,omap4-hwspinlock";
320 reg = <0x480ca000 0x1000>;
321 ti,hwmods = "spinlock";
34054213 322 #hwlock-cells = <1>;
d4cbe80d
SA		 323 };
324
5f789ebc
AM		 325 wdt2: wdt@44e35000 {
326 compatible = "ti,omap3-wdt";
327 ti,hwmods = "wd_timer2";
4462b31c 328 reg = <0x44e35000 0x1000>;
4462b31c 329 interrupts = <91>;
5f789ebc 330 };
059b185d
AC		 331
332 dcan0: d_can@481cc000 {
333 compatible = "bosch,d_can";
334 ti,hwmods = "d_can0";
f178c015
AC		 335 reg = <0x481cc000 0x2000
336 0x44e10644 0x4>;
059b185d 337 interrupts = <52>;
059b185d
AC		 338 status = "disabled";
339 };
340
341 dcan1: d_can@481d0000 {
342 compatible = "bosch,d_can";
343 ti,hwmods = "d_can1";
f178c015
AC		 344 reg = <0x481d0000 0x2000
345 0x44e10644 0x4>;
059b185d 346 interrupts = <55>;
059b185d
AC		 347 status = "disabled";
348 };
fab8ad0b
JH		 349
350 timer1: timer@44e31000 {
002e1ec5 351 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 352 reg = <0x44e31000 0x400>;
353 interrupts = <67>;
354 ti,hwmods = "timer1";
355 ti,timer-alwon;
356 };
357
358 timer2: timer@48040000 {
002e1ec5 359 compatible = "ti,am335x-timer";
fab8ad0b
JH		 360 reg = <0x48040000 0x400>;
361 interrupts = <68>;
362 ti,hwmods = "timer2";
363 };
364
365 timer3: timer@48042000 {
002e1ec5 366 compatible = "ti,am335x-timer";
fab8ad0b
JH		 367 reg = <0x48042000 0x400>;
368 interrupts = <69>;
369 ti,hwmods = "timer3";
370 };
371
372 timer4: timer@48044000 {
002e1ec5 373 compatible = "ti,am335x-timer";
fab8ad0b
JH		 374 reg = <0x48044000 0x400>;
375 interrupts = <92>;
376 ti,hwmods = "timer4";
377 ti,timer-pwm;
378 };
379
380 timer5: timer@48046000 {
002e1ec5 381 compatible = "ti,am335x-timer";
fab8ad0b
JH		 382 reg = <0x48046000 0x400>;
383 interrupts = <93>;
384 ti,hwmods = "timer5";
385 ti,timer-pwm;
386 };
387
388 timer6: timer@48048000 {
002e1ec5 389 compatible = "ti,am335x-timer";
fab8ad0b
JH		 390 reg = <0x48048000 0x400>;
391 interrupts = <94>;
392 ti,hwmods = "timer6";
393 ti,timer-pwm;
394 };
395
396 timer7: timer@4804a000 {
002e1ec5 397 compatible = "ti,am335x-timer";
fab8ad0b
JH		 398 reg = <0x4804a000 0x400>;
399 interrupts = <95>;
400 ti,hwmods = "timer7";
401 ti,timer-pwm;
402 };
0d935c16 403
ccd8b9e0 404 rtc: rtc@44e3e000 {
0d935c16
AM		 405 compatible = "ti,da830-rtc";
406 reg = <0x44e3e000 0x1000>;
407 interrupts = <75
408 76>;
409 ti,hwmods = "rtc";
410 };
9fd3c748
PA		 411
412 spi0: spi@48030000 {
413 compatible = "ti,omap4-mcspi";
414 #address-cells = <1>;
415 #size-cells = <0>;
416 reg = <0x48030000 0x400>;
7b3754c6 417 interrupts = <65>;
9fd3c748
PA		 418 ti,spi-num-cs = <2>;
419 ti,hwmods = "spi0";
f5e2f807
MP		 420 dmas = <&edma 16
421 &edma 17
422 &edma 18
423 &edma 19>;
424 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 425 status = "disabled";
426 };
427
428 spi1: spi@481a0000 {
429 compatible = "ti,omap4-mcspi";
430 #address-cells = <1>;
431 #size-cells = <0>;
432 reg = <0x481a0000 0x400>;
7b3754c6 433 interrupts = <125>;
9fd3c748
PA		 434 ti,spi-num-cs = <2>;
435 ti,hwmods = "spi1";
f5e2f807
MP		 436 dmas = <&edma 42
437 &edma 43
438 &edma 44
439 &edma 45>;
440 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 441 status = "disabled";
442 };
35b47fbb 443
97238b35
SAS		 444 usb: usb@47400000 {
445 compatible = "ti,am33xx-usb";
446 reg = <0x47400000 0x1000>;
447 ranges;
448 #address-cells = <1>;
449 #size-cells = <1>;
35b47fbb 450 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 451 status = "disabled";
452
8abcdd68 453 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 454 compatible = "ti,am335x-usb-ctrl-module";
455 reg = <0x44e10620 0x10
456 0x44e10648 0x4>;
457 reg-names = "phy_ctrl", "wakeup";
458 status = "disabled";
459 };
460
c031a7d4 461 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 462 compatible = "ti,am335x-usb-phy";
463 reg = <0x47401300 0x100>;
464 reg-names = "phy";
465 status = "disabled";
e7243b76 466 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 467 };
468
469 usb0: usb@47401000 {
470 compatible = "ti,musb-am33xx";
97238b35 471 status = "disabled";
c031a7d4
SAS		 472 reg = <0x47401400 0x400
473 0x47401000 0x200>;
474 reg-names = "mc", "control";
475
476 interrupts = <18>;
477 interrupt-names = "mc";
478 dr_mode = "otg";
479 mentor,multipoint = <1>;
480 mentor,num-eps = <16>;
481 mentor,ram-bits = <12>;
482 mentor,power = <500>;
483 phys = <&usb0_phy>;
9b3452d1
SAS		 484
485 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
486 &cppi41dma 2 0 &cppi41dma 3 0
487 &cppi41dma 4 0 &cppi41dma 5 0
488 &cppi41dma 6 0 &cppi41dma 7 0
489 &cppi41dma 8 0 &cppi41dma 9 0
490 &cppi41dma 10 0 &cppi41dma 11 0
491 &cppi41dma 12 0 &cppi41dma 13 0
492 &cppi41dma 14 0 &cppi41dma 0 1
493 &cppi41dma 1 1 &cppi41dma 2 1
494 &cppi41dma 3 1 &cppi41dma 4 1
495 &cppi41dma 5 1 &cppi41dma 6 1
496 &cppi41dma 7 1 &cppi41dma 8 1
497 &cppi41dma 9 1 &cppi41dma 10 1
498 &cppi41dma 11 1 &cppi41dma 12 1
499 &cppi41dma 13 1 &cppi41dma 14 1>;
500 dma-names =
501 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
502 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
503 "rx14", "rx15",
504 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
505 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
506 "tx14", "tx15";
97238b35
SAS		 507 };
508
c031a7d4 509 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 510 compatible = "ti,am335x-usb-phy";
511 reg = <0x47401b00 0x100>;
512 reg-names = "phy";
513 status = "disabled";
e7243b76 514 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 515 };
516
517 usb1: usb@47401800 {
518 compatible = "ti,musb-am33xx";
97238b35 519 status = "disabled";
c031a7d4
SAS		 520 reg = <0x47401c00 0x400
521 0x47401800 0x200>;
522 reg-names = "mc", "control";
523 interrupts = <19>;
524 interrupt-names = "mc";
525 dr_mode = "otg";
526 mentor,multipoint = <1>;
527 mentor,num-eps = <16>;
528 mentor,ram-bits = <12>;
529 mentor,power = <500>;
530 phys = <&usb1_phy>;
9b3452d1
SAS		 531
532 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
533 &cppi41dma 17 0 &cppi41dma 18 0
534 &cppi41dma 19 0 &cppi41dma 20 0
535 &cppi41dma 21 0 &cppi41dma 22 0
536 &cppi41dma 23 0 &cppi41dma 24 0
537 &cppi41dma 25 0 &cppi41dma 26 0
538 &cppi41dma 27 0 &cppi41dma 28 0
539 &cppi41dma 29 0 &cppi41dma 15 1
540 &cppi41dma 16 1 &cppi41dma 17 1
541 &cppi41dma 18 1 &cppi41dma 19 1
542 &cppi41dma 20 1 &cppi41dma 21 1
543 &cppi41dma 22 1 &cppi41dma 23 1
544 &cppi41dma 24 1 &cppi41dma 25 1
545 &cppi41dma 26 1 &cppi41dma 27 1
546 &cppi41dma 28 1 &cppi41dma 29 1>;
547 dma-names =
548 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
549 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
550 "rx14", "rx15",
551 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
552 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
553 "tx14", "tx15";
97238b35 554 };
9b3452d1 555
8abcdd68 556 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 557 compatible = "ti,am3359-cppi41";
558 reg = <0x47400000 0x1000
559 0x47402000 0x1000
560 0x47403000 0x1000
561 0x47404000 0x4000>;
3b6394b4 562 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 563 interrupts = <17>;
564 interrupt-names = "glue";
565 #dma-cells = <2>;
566 #dma-channels = <30>;
567 #dma-requests = <256>;
568 status = "disabled";
569 };
35b47fbb 570 };
6be35c70 571
0a7486c9
PA		 572 epwmss0: epwmss@48300000 {
573 compatible = "ti,am33xx-pwmss";
574 reg = <0x48300000 0x10>;
575 ti,hwmods = "epwmss0";
576 #address-cells = <1>;
577 #size-cells = <1>;
578 status = "disabled";
579 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
580 0x48300180 0x48300180 0x80 /* EQEP */
581 0x48300200 0x48300200 0x80>; /* EHRPWM */
582
583 ecap0: ecap@48300100 {
584 compatible = "ti,am33xx-ecap";
585 #pwm-cells = <3>;
586 reg = <0x48300100 0x80>;
e8c85a3e
MP		 587 interrupts = <31>;
588 interrupt-names = "ecap0";
0a7486c9
PA		 589 ti,hwmods = "ecap0";
590 status = "disabled";
591 };
592
593 ehrpwm0: ehrpwm@48300200 {
594 compatible = "ti,am33xx-ehrpwm";
595 #pwm-cells = <3>;
596 reg = <0x48300200 0x80>;
597 ti,hwmods = "ehrpwm0";
598 status = "disabled";
599 };
600 };
601
602 epwmss1: epwmss@48302000 {
603 compatible = "ti,am33xx-pwmss";
604 reg = <0x48302000 0x10>;
605 ti,hwmods = "epwmss1";
606 #address-cells = <1>;
607 #size-cells = <1>;
608 status = "disabled";
609 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
610 0x48302180 0x48302180 0x80 /* EQEP */
611 0x48302200 0x48302200 0x80>; /* EHRPWM */
612
613 ecap1: ecap@48302100 {
614 compatible = "ti,am33xx-ecap";
615 #pwm-cells = <3>;
616 reg = <0x48302100 0x80>;
e8c85a3e
MP		 617 interrupts = <47>;
618 interrupt-names = "ecap1";
0a7486c9
PA		 619 ti,hwmods = "ecap1";
620 status = "disabled";
621 };
622
623 ehrpwm1: ehrpwm@48302200 {
624 compatible = "ti,am33xx-ehrpwm";
625 #pwm-cells = <3>;
626 reg = <0x48302200 0x80>;
627 ti,hwmods = "ehrpwm1";
628 status = "disabled";
629 };
630 };
631
632 epwmss2: epwmss@48304000 {
633 compatible = "ti,am33xx-pwmss";
634 reg = <0x48304000 0x10>;
635 ti,hwmods = "epwmss2";
636 #address-cells = <1>;
637 #size-cells = <1>;
638 status = "disabled";
639 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
640 0x48304180 0x48304180 0x80 /* EQEP */
641 0x48304200 0x48304200 0x80>; /* EHRPWM */
642
643 ecap2: ecap@48304100 {
644 compatible = "ti,am33xx-ecap";
645 #pwm-cells = <3>;
646 reg = <0x48304100 0x80>;
e8c85a3e
MP		 647 interrupts = <61>;
648 interrupt-names = "ecap2";
0a7486c9
PA		 649 ti,hwmods = "ecap2";
650 status = "disabled";
651 };
652
653 ehrpwm2: ehrpwm@48304200 {
654 compatible = "ti,am33xx-ehrpwm";
655 #pwm-cells = <3>;
656 reg = <0x48304200 0x80>;
657 ti,hwmods = "ehrpwm2";
658 status = "disabled";
659 };
660 };
661
1a39a65c
M		 662 mac: ethernet@4a100000 {
663 compatible = "ti,cpsw";
664 ti,hwmods = "cpgmac0";
0987a6ef
GC		 665 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
666 clock-names = "fck", "cpts";
1a39a65c
M		 667 cpdma_channels = <8>;
668 ale_entries = <1024>;
669 bd_ram_size = <0x2000>;
670 no_bd_ram = <0>;
671 rx_descs = <64>;
672 mac_control = <0x20>;
673 slaves = <2>;
e86ac13b 674 active_slave = <0>;
1a39a65c
M		 675 cpts_clock_mult = <0x80000000>;
676 cpts_clock_shift = <29>;
677 reg = <0x4a100000 0x800
678 0x4a101200 0x100>;
679 #address-cells = <1>;
680 #size-cells = <1>;
681 interrupt-parent = <&intc>;
682 /*
683 * c0_rx_thresh_pend
684 * c0_rx_pend
685 * c0_tx_pend
686 * c0_misc_pend
687 */
688 interrupts = <40 41 42 43>;
689 ranges;
16c75a13 690 status = "disabled";
1a39a65c
M		 691
692 davinci_mdio: mdio@4a101000 {
693 compatible = "ti,davinci_mdio";
694 #address-cells = <1>;
695 #size-cells = <0>;
696 ti,hwmods = "davinci_mdio";
697 bus_freq = <1000000>;
698 reg = <0x4a101000 0x100>;
16c75a13 699 status = "disabled";
1a39a65c
M		 700 };
701
702 cpsw_emac0: slave@4a100200 {
703 /* Filled in by U-Boot */
704 mac-address = [ 00 00 00 00 00 00 ];
705 };
706
707 cpsw_emac1: slave@4a100300 {
708 /* Filled in by U-Boot */
709 mac-address = [ 00 00 00 00 00 00 ];
710 };
39ffbd91
M		 711
712 phy_sel: cpsw-phy-sel@44e10650 {
713 compatible = "ti,am3352-cpsw-phy-sel";
714 reg= <0x44e10650 0x4>;
715 reg-names = "gmii-sel";
716 };
1a39a65c 717 };
f6575c90
VB		 718
719 ocmcram: ocmcram@40300000 {
720 compatible = "ti,am3352-ocmcram";
721 reg = <0x40300000 0x10000>;
722 ti,hwmods = "ocmcram";
f6575c90
VB		 723 };
724
725 wkup_m3: wkup_m3@44d00000 {
726 compatible = "ti,am3353-wkup-m3";
727 reg = <0x44d00000 0x4000 /* M3 UMEM */
728 0x44d80000 0x2000>; /* M3 DMEM */
729 ti,hwmods = "wkup_m3";
f12ecbe2 730 ti,no-reset-on-init;
f6575c90 731 };
e45879ec 732
15e8246b
PA		 733 elm: elm@48080000 {
734 compatible = "ti,am3352-elm";
735 reg = <0x48080000 0x2000>;
736 interrupts = <4>;
737 ti,hwmods = "elm";
d6cfc1e2
BP		 738 status = "disabled";
739 };
740
741 lcdc: lcdc@4830e000 {
742 compatible = "ti,am33xx-tilcdc";
743 reg = <0x4830e000 0x1000>;
744 interrupt-parent = <&intc>;
745 interrupts = <36>;
746 ti,hwmods = "lcdc";
15e8246b
PA		 747 status = "disabled";
748 };
749
a82279dd
PR		 750 tscadc: tscadc@44e0d000 {
751 compatible = "ti,am3359-tscadc";
752 reg = <0x44e0d000 0x1000>;
753 interrupt-parent = <&intc>;
754 interrupts = <16>;
755 ti,hwmods = "adc_tsc";
756 status = "disabled";
757
758 tsc {
759 compatible = "ti,am3359-tsc";
760 };
761 am335x_adc: adc {
762 #io-channel-cells = <1>;
763 compatible = "ti,am3359-adc";
764 };
a82279dd
PR		 765 };
766
e45879ec
PA		 767 gpmc: gpmc@50000000 {
768 compatible = "ti,am3352-gpmc";
769 ti,hwmods = "gpmc";
f12ecbe2 770 ti,no-idle-on-init;
e45879ec
PA		 771 reg = <0x50000000 0x2000>;
772 interrupts = <100>;
00dddcaa
LP		 773 gpmc,num-cs = <7>;
774 gpmc,num-waitpins = <2>;
e45879ec
PA		 775 #address-cells = <2>;
776 #size-cells = <1>;
777 status = "disabled";
778 };
f8302e1e
MG		 779
780 sham: sham@53100000 {
781 compatible = "ti,omap4-sham";
782 ti,hwmods = "sham";
783 reg = <0x53100000 0x200>;
784 interrupts = <109>;
785 dmas = <&edma 36>;
786 dma-names = "rx";
787 };
99919e5e
MG		 788
789 aes: aes@53500000 {
790 compatible = "ti,omap4-aes";
791 ti,hwmods = "aes";
792 reg = <0x53500000 0xa0>;
7af8884a 793 interrupts = <103>;
99919e5e
MG		 794 dmas = <&edma 6>,
795 <&edma 5>;
796 dma-names = "tx", "rx";
797 };
3f72f875
PA		 798
799 mcasp0: mcasp@48038000 {
800 compatible = "ti,am33xx-mcasp-audio";
801 ti,hwmods = "mcasp0";
0bee55ab
JS		 802 reg = <0x48038000 0x2000>,
803 <0x46000000 0x400000>;
804 reg-names = "mpu", "dat";
3f72f875 805 interrupts = <80>, <81>;
ae107d06 806 interrupt-names = "tx", "rx";
3f72f875
PA		 807 status = "disabled";
808 dmas = <&edma 8>,
809 <&edma 9>;
810 dma-names = "tx", "rx";
811 };
812
813 mcasp1: mcasp@4803C000 {
814 compatible = "ti,am33xx-mcasp-audio";
815 ti,hwmods = "mcasp1";
0bee55ab
JS		 816 reg = <0x4803C000 0x2000>,
817 <0x46400000 0x400000>;
818 reg-names = "mpu", "dat";
3f72f875 819 interrupts = <82>, <83>;
ae107d06 820 interrupt-names = "tx", "rx";
3f72f875
PA		 821 status = "disabled";
822 dmas = <&edma 10>,
823 <&edma 11>;
824 dma-names = "tx", "rx";
825 };
ed845d6b
LV		 826
827 rng: rng@48310000 {
828 compatible = "ti,omap4-rng";
829 ti,hwmods = "rng";
830 reg = <0x48310000 0x2000>;
831 interrupts = <111>;
832 };
5fc0b42a
AC		 833 };
834};
ea291c98
TK		 835
836/include/ "am33xx-clocks.dtsi"
Linux kernel - Deliverables
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