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4a45787d FB |
1 | /* |
2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* AM437x SK EVM */ | |
10 | ||
11 | /dts-v1/; | |
12 | ||
13 | #include "am4372.dtsi" | |
14 | #include <dt-bindings/pinctrl/am43xx.h> | |
15 | #include <dt-bindings/pwm/pwm.h> | |
16 | #include <dt-bindings/gpio/gpio.h> | |
17 | #include <dt-bindings/input/input.h> | |
18 | ||
19 | / { | |
20 | model = "TI AM437x SK EVM"; | |
21 | compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; | |
22 | ||
23 | aliases { | |
24 | display0 = &lcd0; | |
25 | }; | |
26 | ||
27 | backlight { | |
28 | compatible = "pwm-backlight"; | |
29 | pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; | |
30 | brightness-levels = <0 51 53 56 62 75 101 152 255>; | |
31 | default-brightness-level = <8>; | |
32 | }; | |
33 | ||
34 | sound { | |
35 | compatible = "ti,da830-evm-audio"; | |
36 | ti,model = "AM437x-SK-EVM"; | |
37 | ti,audio-codec = <&tlv320aic3106>; | |
38 | ti,mcasp-controller = <&mcasp1>; | |
39 | ti,codec-clock-rate = <24000000>; | |
40 | ti,audio-routing = | |
41 | "Headphone Jack", "HPLOUT", | |
42 | "Headphone Jack", "HPROUT"; | |
43 | }; | |
44 | ||
45 | matrix_keypad: matrix_keypad@0 { | |
46 | compatible = "gpio-matrix-keypad"; | |
47 | ||
48 | pinctrl-names = "default"; | |
49 | pinctrl-0 = <&matrix_keypad_pins>; | |
50 | ||
51 | debounce-delay-ms = <5>; | |
52 | col-scan-delay-us = <1500>; | |
53 | ||
54 | row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ | |
55 | &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ | |
56 | ||
57 | col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ | |
58 | &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ | |
59 | ||
60 | linux,keymap = < | |
61 | MATRIX_KEY(0, 0, KEY_DOWN) | |
62 | MATRIX_KEY(0, 1, KEY_RIGHT) | |
63 | MATRIX_KEY(1, 0, KEY_LEFT) | |
64 | MATRIX_KEY(1, 1, KEY_UP) | |
65 | >; | |
66 | }; | |
67 | ||
68 | leds { | |
69 | compatible = "gpio-leds"; | |
70 | ||
71 | pinctrl-names = "default"; | |
72 | pinctrl-0 = <&leds_pins>; | |
73 | ||
74 | led@0 { | |
75 | label = "am437x-sk:red:heartbeat"; | |
76 | gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ | |
77 | linux,default-trigger = "heartbeat"; | |
78 | default-state = "off"; | |
79 | }; | |
80 | ||
81 | led@1 { | |
82 | label = "am437x-sk:green:mmc1"; | |
83 | gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ | |
84 | linux,default-trigger = "mmc0"; | |
85 | default-state = "off"; | |
86 | }; | |
87 | ||
88 | led@2 { | |
89 | label = "am437x-sk:blue:cpu0"; | |
90 | gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ | |
91 | linux,default-trigger = "cpu0"; | |
92 | default-state = "off"; | |
93 | }; | |
94 | ||
95 | led@3 { | |
96 | label = "am437x-sk:blue:usr3"; | |
97 | gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ | |
98 | default-state = "off"; | |
99 | }; | |
100 | }; | |
101 | ||
102 | lcd0: display { | |
103 | compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; | |
104 | label = "lcd"; | |
105 | ||
106 | pinctrl-names = "default"; | |
107 | pinctrl-0 = <&lcd_pins>; | |
108 | ||
109 | enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; | |
110 | ||
111 | panel-timing { | |
112 | clock-frequency = <9000000>; | |
113 | hactive = <480>; | |
114 | vactive = <272>; | |
115 | hfront-porch = <8>; | |
116 | hback-porch = <43>; | |
117 | hsync-len = <4>; | |
118 | vback-porch = <12>; | |
119 | vfront-porch = <4>; | |
120 | vsync-len = <10>; | |
121 | hsync-active = <0>; | |
122 | vsync-active = <0>; | |
123 | de-active = <1>; | |
124 | pixelclk-active = <1>; | |
125 | }; | |
126 | ||
127 | port { | |
128 | lcd_in: endpoint { | |
129 | remote-endpoint = <&dpi_out>; | |
130 | }; | |
131 | }; | |
132 | }; | |
133 | }; | |
134 | ||
135 | &am43xx_pinmux { | |
136 | matrix_keypad_pins: matrix_keypad_pins { | |
137 | pinctrl-single,pins = < | |
138 | 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ | |
139 | 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ | |
140 | 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ | |
141 | 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ | |
142 | >; | |
143 | }; | |
144 | ||
145 | leds_pins: leds_pins { | |
146 | pinctrl-single,pins = < | |
147 | 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ | |
148 | 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ | |
149 | 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ | |
150 | 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ | |
151 | >; | |
152 | }; | |
153 | ||
154 | i2c0_pins: i2c0_pins { | |
155 | pinctrl-single,pins = < | |
156 | 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
157 | 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
158 | >; | |
159 | }; | |
160 | ||
161 | i2c1_pins: i2c1_pins { | |
162 | pinctrl-single,pins = < | |
163 | 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ | |
164 | 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ | |
165 | >; | |
166 | }; | |
167 | ||
168 | mmc1_pins: pinmux_mmc1_pins { | |
169 | pinctrl-single,pins = < | |
170 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
171 | >; | |
172 | }; | |
173 | ||
174 | ecap0_pins: backlight_pins { | |
175 | pinctrl-single,pins = < | |
176 | 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ | |
177 | >; | |
178 | }; | |
179 | ||
180 | edt_ft5306_ts_pins: edt_ft5306_ts_pins { | |
181 | pinctrl-single,pins = < | |
182 | 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ | |
183 | 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ | |
184 | >; | |
185 | }; | |
186 | ||
187 | cpsw_default: cpsw_default { | |
188 | pinctrl-single,pins = < | |
189 | /* Slave 1 */ | |
190 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ | |
191 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
192 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
193 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
194 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ | |
195 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ | |
196 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ | |
197 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
198 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
199 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
200 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ | |
201 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ | |
202 | ||
203 | /* Slave 2 */ | |
204 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
205 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
206 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
207 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
208 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
209 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
210 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
211 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ | |
212 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
213 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
214 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
215 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
216 | >; | |
217 | }; | |
218 | ||
219 | cpsw_sleep: cpsw_sleep { | |
220 | pinctrl-single,pins = < | |
221 | /* Slave 1 reset value */ | |
222 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
223 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
224 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
225 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
226 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
227 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
228 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
229 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
230 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
231 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
232 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
233 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
234 | ||
235 | /* Slave 2 reset value */ | |
236 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
237 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
238 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
239 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
240 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
241 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
242 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
243 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
244 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
245 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
246 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
247 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
248 | >; | |
249 | }; | |
250 | ||
251 | davinci_mdio_default: davinci_mdio_default { | |
252 | pinctrl-single,pins = < | |
253 | /* MDIO */ | |
254 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
255 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
256 | >; | |
257 | }; | |
258 | ||
259 | davinci_mdio_sleep: davinci_mdio_sleep { | |
260 | pinctrl-single,pins = < | |
261 | /* MDIO reset value */ | |
262 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
263 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
264 | >; | |
265 | }; | |
266 | ||
267 | dss_pins: dss_pins { | |
268 | pinctrl-single,pins = < | |
269 | 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ | |
270 | 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
271 | 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
272 | 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
273 | 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
274 | 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
275 | 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1) | |
276 | 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ | |
277 | 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ | |
278 | 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
279 | 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
280 | 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
281 | 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
282 | 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
283 | 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
284 | 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
285 | 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
286 | 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
287 | 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
288 | 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
289 | 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
290 | 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
291 | 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0) | |
292 | 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ | |
293 | 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ | |
294 | 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ | |
295 | 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ | |
296 | 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ | |
297 | ||
298 | >; | |
299 | }; | |
300 | ||
301 | qspi_pins: qspi_pins { | |
302 | pinctrl-single,pins = < | |
303 | 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ | |
304 | 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ | |
305 | 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ | |
306 | 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ | |
307 | 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ | |
308 | 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ | |
309 | >; | |
310 | }; | |
311 | ||
312 | mcasp1_pins: mcasp1_pins { | |
313 | pinctrl-single,pins = < | |
314 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ | |
315 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ | |
316 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ | |
317 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ | |
318 | >; | |
319 | }; | |
320 | ||
321 | lcd_pins: lcd_pins { | |
322 | pinctrl-single,pins = < | |
323 | /* GPIO 5_8 to select LCD / HDMI */ | |
324 | 0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7) | |
325 | >; | |
326 | }; | |
327 | }; | |
328 | ||
329 | &i2c0 { | |
330 | status = "okay"; | |
331 | pinctrl-names = "default"; | |
332 | pinctrl-0 = <&i2c0_pins>; | |
333 | clock-frequency = <400000>; | |
334 | ||
335 | tps@24 { | |
336 | compatible = "ti,tps65218"; | |
337 | reg = <0x24>; | |
338 | interrupt-parent = <&gic>; | |
339 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
340 | interrupt-controller; | |
341 | #interrupt-cells = <2>; | |
342 | ||
343 | dcdc1: regulator-dcdc1 { | |
344 | compatible = "ti,tps65218-dcdc1"; | |
345 | /* VDD_CORE limits min of OPP50 and max of OPP100 */ | |
346 | regulator-name = "vdd_core"; | |
347 | regulator-min-microvolt = <912000>; | |
348 | regulator-max-microvolt = <1144000>; | |
349 | regulator-boot-on; | |
350 | regulator-always-on; | |
351 | }; | |
352 | ||
353 | dcdc2: regulator-dcdc2 { | |
354 | compatible = "ti,tps65218-dcdc2"; | |
355 | /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ | |
356 | regulator-name = "vdd_mpu"; | |
357 | regulator-min-microvolt = <912000>; | |
358 | regulator-max-microvolt = <1378000>; | |
359 | regulator-boot-on; | |
360 | regulator-always-on; | |
361 | }; | |
362 | ||
363 | dcdc3: regulator-dcdc3 { | |
364 | compatible = "ti,tps65218-dcdc3"; | |
365 | regulator-name = "vdds_ddr"; | |
5cd98a7a K |
366 | regulator-min-microvolt = <1500000>; |
367 | regulator-max-microvolt = <1500000>; | |
4a45787d FB |
368 | regulator-boot-on; |
369 | regulator-always-on; | |
370 | }; | |
371 | ||
372 | dcdc4: regulator-dcdc4 { | |
373 | compatible = "ti,tps65218-dcdc4"; | |
374 | regulator-name = "v3_3d"; | |
375 | regulator-min-microvolt = <3300000>; | |
376 | regulator-max-microvolt = <3300000>; | |
377 | regulator-boot-on; | |
378 | regulator-always-on; | |
379 | }; | |
380 | ||
381 | ldo1: regulator-ldo1 { | |
382 | compatible = "ti,tps65218-ldo1"; | |
383 | regulator-name = "v1_8d"; | |
384 | regulator-min-microvolt = <1800000>; | |
385 | regulator-max-microvolt = <1800000>; | |
386 | regulator-boot-on; | |
387 | regulator-always-on; | |
388 | }; | |
389 | ||
390 | }; | |
391 | ||
392 | at24@50 { | |
393 | compatible = "at24,24c256"; | |
394 | pagesize = <64>; | |
395 | reg = <0x50>; | |
396 | }; | |
397 | }; | |
398 | ||
399 | &i2c1 { | |
400 | status = "okay"; | |
401 | pinctrl-names = "default"; | |
402 | pinctrl-0 = <&i2c1_pins>; | |
403 | clock-frequency = <400000>; | |
404 | ||
405 | edt-ft5306@38 { | |
406 | status = "okay"; | |
407 | compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; | |
408 | pinctrl-names = "default"; | |
409 | pinctrl-0 = <&edt_ft5306_ts_pins>; | |
410 | ||
411 | reg = <0x38>; | |
412 | interrupt-parent = <&gpio0>; | |
413 | interrupts = <31 0>; | |
414 | ||
415 | wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; | |
416 | ||
417 | touchscreen-size-x = <480>; | |
418 | touchscreen-size-y = <272>; | |
419 | }; | |
420 | ||
421 | tlv320aic3106: tlv320aic3106@1b { | |
422 | compatible = "ti,tlv320aic3106"; | |
423 | reg = <0x1b>; | |
424 | status = "okay"; | |
425 | ||
426 | /* Regulators */ | |
427 | AVDD-supply = <&dcdc4>; | |
428 | IOVDD-supply = <&dcdc4>; | |
429 | DRVDD-supply = <&dcdc4>; | |
430 | DVDD-supply = <&ldo1>; | |
431 | }; | |
432 | ||
433 | lis331dlh@18 { | |
434 | compatible = "st,lis331dlh"; | |
435 | reg = <0x18>; | |
436 | status = "okay"; | |
437 | ||
438 | Vdd-supply = <&dcdc4>; | |
439 | Vdd_IO-supply = <&dcdc4>; | |
440 | interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; | |
441 | }; | |
442 | }; | |
443 | ||
444 | &epwmss0 { | |
445 | status = "okay"; | |
446 | }; | |
447 | ||
448 | &ecap0 { | |
449 | status = "okay"; | |
450 | pinctrl-names = "default"; | |
451 | pinctrl-0 = <&ecap0_pins>; | |
452 | }; | |
453 | ||
454 | &gpio0 { | |
455 | status = "okay"; | |
456 | }; | |
457 | ||
458 | &gpio1 { | |
459 | status = "okay"; | |
460 | }; | |
461 | ||
462 | &gpio5 { | |
463 | status = "okay"; | |
464 | }; | |
465 | ||
466 | &mmc1 { | |
467 | status = "okay"; | |
468 | pinctrl-names = "default"; | |
469 | pinctrl-0 = <&mmc1_pins>; | |
470 | ||
471 | vmmc-supply = <&dcdc4>; | |
472 | bus-width = <4>; | |
473 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
474 | }; | |
475 | ||
476 | &usb2_phy1 { | |
477 | status = "okay"; | |
478 | }; | |
479 | ||
480 | &usb1 { | |
481 | dr_mode = "peripheral"; | |
482 | status = "okay"; | |
483 | }; | |
484 | ||
485 | &usb2_phy2 { | |
486 | status = "okay"; | |
487 | }; | |
488 | ||
489 | &usb2 { | |
490 | dr_mode = "host"; | |
491 | status = "okay"; | |
492 | }; | |
493 | ||
494 | &qspi { | |
495 | status = "okay"; | |
496 | pinctrl-names = "default"; | |
497 | pinctrl-0 = <&qspi_pins>; | |
498 | ||
499 | spi-max-frequency = <48000000>; | |
500 | m25p80@0 { | |
501 | compatible = "mx66l51235l"; | |
502 | spi-max-frequency = <48000000>; | |
503 | reg = <0>; | |
504 | spi-cpol; | |
505 | spi-cpha; | |
506 | spi-tx-bus-width = <1>; | |
507 | spi-rx-bus-width = <4>; | |
508 | #address-cells = <1>; | |
509 | #size-cells = <1>; | |
510 | ||
511 | /* MTD partition table. | |
512 | * The ROM checks the first 512KiB | |
513 | * for a valid file to boot(XIP). | |
514 | */ | |
515 | partition@0 { | |
516 | label = "QSPI.U_BOOT"; | |
517 | reg = <0x00000000 0x000080000>; | |
518 | }; | |
519 | partition@1 { | |
520 | label = "QSPI.U_BOOT.backup"; | |
521 | reg = <0x00080000 0x00080000>; | |
522 | }; | |
523 | partition@2 { | |
524 | label = "QSPI.U-BOOT-SPL_OS"; | |
525 | reg = <0x00100000 0x00010000>; | |
526 | }; | |
527 | partition@3 { | |
528 | label = "QSPI.U_BOOT_ENV"; | |
529 | reg = <0x00110000 0x00010000>; | |
530 | }; | |
531 | partition@4 { | |
532 | label = "QSPI.U-BOOT-ENV.backup"; | |
533 | reg = <0x00120000 0x00010000>; | |
534 | }; | |
535 | partition@5 { | |
536 | label = "QSPI.KERNEL"; | |
537 | reg = <0x00130000 0x0800000>; | |
538 | }; | |
539 | partition@6 { | |
540 | label = "QSPI.FILESYSTEM"; | |
541 | reg = <0x00930000 0x36D0000>; | |
542 | }; | |
543 | }; | |
544 | }; | |
545 | ||
546 | &mac { | |
547 | pinctrl-names = "default", "sleep"; | |
548 | pinctrl-0 = <&cpsw_default>; | |
549 | pinctrl-1 = <&cpsw_sleep>; | |
550 | dual_emac = <1>; | |
551 | status = "okay"; | |
552 | }; | |
553 | ||
554 | &davinci_mdio { | |
555 | pinctrl-names = "default", "sleep"; | |
556 | pinctrl-0 = <&davinci_mdio_default>; | |
557 | pinctrl-1 = <&davinci_mdio_sleep>; | |
558 | status = "okay"; | |
559 | }; | |
560 | ||
561 | &cpsw_emac0 { | |
562 | phy_id = <&davinci_mdio>, <4>; | |
563 | phy-mode = "rgmii"; | |
564 | dual_emac_res_vlan = <1>; | |
565 | }; | |
566 | ||
567 | &cpsw_emac1 { | |
568 | phy_id = <&davinci_mdio>, <5>; | |
569 | phy-mode = "rgmii"; | |
570 | dual_emac_res_vlan = <2>; | |
571 | }; | |
572 | ||
573 | &elm { | |
574 | status = "okay"; | |
575 | }; | |
576 | ||
577 | &mcasp1 { | |
578 | pinctrl-names = "default"; | |
579 | pinctrl-0 = <&mcasp1_pins>; | |
580 | ||
581 | status = "okay"; | |
582 | ||
583 | op-mode = <0>; | |
584 | tdm-slots = <2>; | |
585 | serial-dir = < | |
586 | 0 0 1 2 | |
587 | >; | |
588 | ||
589 | tx-num-evt = <1>; | |
590 | rx-num-evt = <1>; | |
591 | }; | |
592 | ||
593 | &dss { | |
594 | status = "okay"; | |
595 | ||
596 | pinctrl-names = "default"; | |
597 | pinctrl-0 = <&dss_pins>; | |
598 | ||
599 | port { | |
600 | dpi_out: endpoint@0 { | |
601 | remote-endpoint = <&lcd_in>; | |
602 | data-lines = <24>; | |
603 | }; | |
604 | }; | |
605 | }; | |
606 | ||
607 | &rtc { | |
608 | status = "okay"; | |
609 | }; | |
610 | ||
611 | &wdt { | |
612 | status = "okay"; | |
613 | }; |