Commit | Line | Data |
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49122145 FF |
1 | /* |
2 | * Device Tree file for Marvell Armada 370 Reference Design board | |
3 | * (RD-88F6710-A1) | |
4 | * | |
5 | * Copied from arch/arm/boot/dts/armada-370-db.dts | |
6 | * | |
7 | * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org> | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
5c0169d1 | 15 | #include <dt-bindings/input/input.h> |
29e74f8b | 16 | #include <dt-bindings/gpio/gpio.h> |
38149887 | 17 | #include "armada-370.dtsi" |
49122145 FF |
18 | |
19 | / { | |
20 | model = "Marvell Armada 370 Reference Design"; | |
21 | compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp"; | |
22 | ||
23 | chosen { | |
24 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
25 | }; | |
26 | ||
27 | memory { | |
28 | device_type = "memory"; | |
29 | reg = <0x00000000 0x20000000>; /* 512 MB */ | |
30 | }; | |
31 | ||
32 | soc { | |
0cd3754a EG |
33 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 |
34 | MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; | |
5e12a613 | 35 | |
0af83305 EG |
36 | pcie-controller { |
37 | status = "okay"; | |
38 | ||
39 | /* Internal mini-PCIe connector */ | |
40 | pcie@1,0 { | |
41 | /* Port 0, Lane 0 */ | |
42 | status = "okay"; | |
43 | }; | |
44 | ||
45 | /* Internal mini-PCIe connector */ | |
46 | pcie@2,0 { | |
47 | /* Port 1, Lane 0 */ | |
48 | status = "okay"; | |
49 | }; | |
50 | }; | |
51 | ||
467f54b2 GC |
52 | internal-regs { |
53 | serial@12000 { | |
467f54b2 | 54 | status = "okay"; |
49122145 | 55 | }; |
467f54b2 GC |
56 | sata@a0000 { |
57 | nr-ports = <2>; | |
58 | status = "okay"; | |
59 | }; | |
60 | ||
61 | mdio { | |
9dfb5c41 EG |
62 | pinctrl-0 = <&mdio_pins>; |
63 | pinctrl-names = "default"; | |
467f54b2 GC |
64 | phy0: ethernet-phy@0 { |
65 | reg = <0>; | |
66 | }; | |
49122145 | 67 | |
467f54b2 GC |
68 | phy1: ethernet-phy@1 { |
69 | reg = <1>; | |
70 | }; | |
49122145 | 71 | }; |
49122145 | 72 | |
467f54b2 GC |
73 | ethernet@70000 { |
74 | status = "okay"; | |
75 | phy = <&phy0>; | |
76 | phy-mode = "sgmii"; | |
77 | }; | |
78 | ethernet@74000 { | |
9dfb5c41 EG |
79 | pinctrl-0 = <&ge1_rgmii_pins>; |
80 | pinctrl-names = "default"; | |
467f54b2 GC |
81 | status = "okay"; |
82 | phy = <&phy1>; | |
83 | phy-mode = "rgmii-id"; | |
84 | }; | |
56499120 | 85 | |
467f54b2 GC |
86 | mvsdio@d4000 { |
87 | pinctrl-0 = <&sdio_pins1>; | |
88 | pinctrl-names = "default"; | |
89 | status = "okay"; | |
90 | /* No CD or WP GPIOs */ | |
d87b5fbb | 91 | broken-cd; |
467f54b2 | 92 | }; |
e822f75d | 93 | |
467f54b2 GC |
94 | usb@50000 { |
95 | status = "okay"; | |
96 | }; | |
e822f75d | 97 | |
467f54b2 GC |
98 | usb@51000 { |
99 | status = "okay"; | |
100 | }; | |
8c75e7b3 | 101 | |
467f54b2 GC |
102 | gpio-keys { |
103 | compatible = "gpio-keys"; | |
104 | #address-cells = <1>; | |
105 | #size-cells = <0>; | |
106 | button@1 { | |
107 | label = "Software Button"; | |
5c0169d1 | 108 | linux,code = <KEY_POWER>; |
29e74f8b | 109 | gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
467f54b2 GC |
110 | }; |
111 | }; | |
69e18e26 EG |
112 | |
113 | nand@d0000 { | |
114 | status = "okay"; | |
115 | num-cs = <1>; | |
116 | marvell,nand-keep-config; | |
117 | marvell,nand-enable-arbiter; | |
118 | nand-on-flash-bbt; | |
119 | ||
120 | partition@0 { | |
121 | label = "U-Boot"; | |
122 | reg = <0 0x800000>; | |
123 | }; | |
124 | partition@800000 { | |
125 | label = "Linux"; | |
126 | reg = <0x800000 0x800000>; | |
127 | }; | |
128 | partition@1000000 { | |
129 | label = "Filesystem"; | |
130 | reg = <0x1000000 0x3f000000>; | |
131 | }; | |
132 | }; | |
8c75e7b3 EG |
133 | }; |
134 | }; | |
467f54b2 | 135 | }; |