[deliverable/linux.git] / arch / arm / boot / dts / armada-388-db.dts

/*
 * Device Tree file for Marvell Armada 388 evaluation board
 * (DB-88F6820)
 *
 *  Copyright (C) 2014 Marvell
 *
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "armada-388.dtsi"

/ {
	model = "Marvell Armada 385 Development Board";
	compatible = "marvell,a385-db", "marvell,armada388",
		"marvell,armada385", "marvell,armada380";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>; /* 256 MB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;

		internal-regs {
			spi@10600 {
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "w25q32", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <108000000>;
				};
			};

			i2c@11000 {
				status = "okay";
				clock-frequency = <100000>;
			};

			i2c@11100 {
				status = "okay";
				clock-frequency = <100000>;
			};

			serial@12000 {
				status = "okay";
			};

			ethernet@30000 {
				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			usb@58000 {
				status = "ok";
			};

			ethernet@70000 {
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};

			mdio@72004 {
				phy0: ethernet-phy@0 {
					reg = <0>;
				};

				phy1: ethernet-phy@1 {
					reg = <1>;
				};
			};

			sata@a8000 {
				status = "okay";
			};

			sata@e0000 {
				status = "okay";
			};

			flash@d0000 {
				status = "okay";
				num-cs = <1>;
				marvell,nand-keep-config;
				marvell,nand-enable-arbiter;
				nand-on-flash-bbt;
				nand-ecc-strength = <4>;
				nand-ecc-step-size = <512>;

				partition@0 {
					label = "U-Boot";
					reg = <0 0x800000>;
				};
				partition@800000 {
					label = "Linux";
					reg = <0x800000 0x800000>;
				};
				partition@1000000 {
					label = "Filesystem";
					reg = <0x1000000 0x3f000000>;
				};
			};

			sdhci@d8000 {
				broken-cd;
				wp-inverted;
				bus-width = <8>;
				status = "okay";
				no-1-8-v;
			};

			usb3@f0000 {
				status = "okay";
			};

			usb3@f8000 {
				status = "okay";
			};
		};

		pcie-controller {
			status = "okay";
			/*
			 * The two PCIe units are accessible through
			 * standard PCIe slots on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};
	};
};
Commit	Line	Data
a47172ea	1	/*
881a50e4	2	* Device Tree file for Marvell Armada 388 evaluation board
a47172ea TP	3	* (DB-88F6820)
	4	*
	5	* Copyright (C) 2014 Marvell
	6	*
	7	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	8	*
626a1020 GC	9	* This file is dual-licensed: you can use it either under the terms
	10	* of the GPL or the X11 license, at your option. Note that this dual
	11	* licensing only applies to this file, and not this project as a
	12	* whole.
	13	*
	14	* a) This file is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License as
	16	* published by the Free Software Foundation; either version 2 of the
	17	* License, or (at your option) any later version.
	18	*
	19	* This file is distributed in the hope that it will be useful
	20	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	22	* GNU General Public License for more details.
	23	*
	24	* Or, alternatively
	25	*
	26	* b) Permission is hereby granted, free of charge, to any person
	27	* obtaining a copy of this software and associated documentation
	28	* files (the "Software"), to deal in the Software without
	29	* restriction, including without limitation the rights to use
	30	* copy, modify, merge, publish, distribute, sublicense, and/or
	31	* sell copies of the Software, and to permit persons to whom the
	32	* Software is furnished to do so, subject to the following
	33	* conditions:
	34	*
	35	* The above copyright notice and this permission notice shall be
	36	* included in all copies or substantial portions of the Software.
	37	*
	38	* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
	39	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	40	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	41	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	42	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
	43	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	44	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	45	* OTHER DEALINGS IN THE SOFTWARE.
a47172ea TP	46	*/
	47
	48	/dts-v1/;
881a50e4	49	#include "armada-388.dtsi"
a47172ea TP	50
	51	/ {
	52	model = "Marvell Armada 385 Development Board";
881a50e4 GC	53	compatible = "marvell,a385-db", "marvell,armada388",
881a50e4 GC	54	"marvell,armada385", "marvell,armada380";
a47172ea TP	55
a47172ea TP	56	chosen {
9552203c	57	stdout-path = "serial0:115200n8";
a47172ea TP	58	};
	59
	60	memory {
	61	device_type = "memory";
	62	reg = <0x00000000 0x10000000>; /* 256 MB */
	63	};
	64
	65	soc {
	66	ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
d716f2e8 BB	67	MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
	68	MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
	69	MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
a47172ea TP	70
	71	internal-regs {
	72	spi@10600 {
	73	status = "okay";
	74
	75	spi-flash@0 {
	76	#address-cells = <1>;
	77	#size-cells = <1>;
e9f3ed4a	78	compatible = "w25q32", "jedec,spi-nor";
a47172ea TP	79	reg = <0>; /* Chip select 0 */
	80	spi-max-frequency = <108000000>;
	81	};
	82	};
	83
	84	i2c@11000 {
	85	status = "okay";
	86	clock-frequency = <100000>;
	87	};
	88
	89	i2c@11100 {
	90	status = "okay";
	91	clock-frequency = <100000>;
	92	};
	93
	94	serial@12000 {
a47172ea TP	95	status = "okay";
	96	};
	97
	98	ethernet@30000 {
	99	status = "okay";
	100	phy = <&phy1>;
0d2e6378	101	phy-mode = "rgmii-id";
a47172ea TP	102	};
a47172ea TP	103
a165c3b6	104	usb@58000 {
9e81775a GC	105	status = "ok";
	106	};
	107
a47172ea TP	108	ethernet@70000 {
	109	status = "okay";
	110	phy = <&phy0>;
0d2e6378	111	phy-mode = "rgmii-id";
a47172ea TP	112	};
a47172ea TP	113
4a25432b	114	mdio@72004 {
a47172ea TP	115	phy0: ethernet-phy@0 {
	116	reg = <0>;
	117	};
	118
	119	phy1: ethernet-phy@1 {
	120	reg = <1>;
	121	};
	122	};
4de29e63	123
d175b6e4 TP	124	sata@a8000 {
	125	status = "okay";
	126	};
	127
	128	sata@e0000 {
	129	status = "okay";
	130	};
	131
4de29e63 EG	132	flash@d0000 {
	133	status = "okay";
	134	num-cs = <1>;
	135	marvell,nand-keep-config;
	136	marvell,nand-enable-arbiter;
	137	nand-on-flash-bbt;
1ad58443 EG	138	nand-ecc-strength = <4>;
1ad58443 EG	139	nand-ecc-step-size = <512>;
4de29e63 EG	140
	141	partition@0 {
	142	label = "U-Boot";
	143	reg = <0 0x800000>;
	144	};
	145	partition@800000 {
	146	label = "Linux";
	147	reg = <0x800000 0x800000>;
	148	};
	149	partition@1000000 {
	150	label = "Filesystem";
	151	reg = <0x1000000 0x3f000000>;
	152	};
	153	};
6eccc52b TP	154
6eccc52b TP	155	sdhci@d8000 {
6eccc52b TP	156	broken-cd;
	157	wp-inverted;
	158	bus-width = <8>;
	159	status = "okay";
5e949f0c	160	no-1-8-v;
6eccc52b	161	};
87e2fc37 GC	162
	163	usb3@f0000 {
	164	status = "okay";
	165	};
	166
	167	usb3@f8000 {
	168	status = "okay";
	169	};
a47172ea TP	170	};
	171
	172	pcie-controller {
	173	status = "okay";
	174	/*
	175	* The two PCIe units are accessible through
	176	* standard PCIe slots on the board.
	177	*/
	178	pcie@1,0 {
	179	/* Port 0, Lane 0 */
	180	status = "okay";
	181	};
	182	pcie@2,0 {
	183	/* Port 1, Lane 0 */
	184	status = "okay";
	185	};
	186	};
	187	};
	188	};