projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 19b85c08 TP |
1 | /* |
| 2 | * Device Tree file for OpenBlocks AX3-4 board | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Marvell | |
| 5 | * | |
| 6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public | |
| 9 | * License version 2. This program is licensed "as is" without any | |
| 10 | * warranty of any kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 13 | /dts-v1/; | |
| 38149887 | 14 | #include "armada-xp-mv78260.dtsi" |
| 19b85c08 TP |
15 | |
| 16 | / { | |
| 17 | model = "PlatHome OpenBlocks AX3-4 board"; | |
| 18 | compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; | |
| 19 | ||
| 20 | chosen { | |
| 21 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
| 22 | }; | |
| 23 | ||
| 24 | memory { | |
| 25 | device_type = "memory"; | |
| 74898364 | 26 | reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ |
| 19b85c08 TP |
27 | }; |
| 28 | ||
| 29 | soc { | |
| 0cd3754a | 30 | ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 |
| de1af8d4 EG |
31 | MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 |
| 32 | MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>; | |
| 33 | ||
| 34 | devbus-bootcs { | |
| 35 | status = "okay"; | |
| 36 | ||
| 37 | /* Device Bus parameters are required */ | |
| 38 | ||
| 39 | /* Read parameters */ | |
| 40 | devbus,bus-width = <8>; | |
| 41 | devbus,turn-off-ps = <60000>; | |
| 42 | devbus,badr-skew-ps = <0>; | |
| 43 | devbus,acc-first-ps = <124000>; | |
| 44 | devbus,acc-next-ps = <248000>; | |
| 45 | devbus,rd-setup-ps = <0>; | |
| 46 | devbus,rd-hold-ps = <0>; | |
| 47 | ||
| 48 | /* Write parameters */ | |
| 49 | devbus,sync-enable = <0>; | |
| 50 | devbus,wr-high-ps = <60000>; | |
| 51 | devbus,wr-low-ps = <60000>; | |
| 52 | devbus,ale-wr-ps = <60000>; | |
| 53 | ||
| 54 | /* NOR 128 MiB */ | |
| 55 | nor@0 { | |
| 56 | compatible = "cfi-flash"; | |
| 57 | reg = <0 0x8000000>; | |
| 58 | bank-width = <2>; | |
| 59 | }; | |
| 60 | }; | |
| 00ed4a0b | 61 | |
| 467f54b2 GC |
62 | internal-regs { |
| 63 | serial@12000 { | |
| 64 | clock-frequency = <250000000>; | |
| 65 | status = "okay"; | |
| 19b85c08 | 66 | }; |
| 467f54b2 GC |
67 | serial@12100 { |
| 68 | clock-frequency = <250000000>; | |
| 69 | status = "okay"; | |
| 19b85c08 | 70 | }; |
| 467f54b2 GC |
71 | pinctrl { |
| 72 | led_pins: led-pins-0 { | |
| 73 | marvell,pins = "mpp49", "mpp51", "mpp53"; | |
| 74 | marvell,function = "gpio"; | |
| 75 | }; | |
| 19b85c08 | 76 | }; |
| 467f54b2 GC |
77 | leds { |
| 78 | compatible = "gpio-leds"; | |
| 79 | pinctrl-names = "default"; | |
| 80 | pinctrl-0 = <&led_pins>; | |
| 81 | ||
| 82 | red_led { | |
| 83 | label = "red_led"; | |
| 84 | gpios = <&gpio1 17 1>; | |
| 85 | default-state = "off"; | |
| 86 | }; | |
| 87 | ||
| 88 | yellow_led { | |
| 89 | label = "yellow_led"; | |
| 90 | gpios = <&gpio1 19 1>; | |
| 91 | default-state = "off"; | |
| 92 | }; | |
| 93 | ||
| 94 | green_led { | |
| 95 | label = "green_led"; | |
| 96 | gpios = <&gpio1 21 1>; | |
| 97 | default-state = "off"; | |
| 98 | linux,default-trigger = "heartbeat"; | |
| 99 | }; | |
| 19b85c08 | 100 | }; |
| f69c92f4 | 101 | |
| 467f54b2 GC |
102 | gpio_keys { |
| 103 | compatible = "gpio-keys"; | |
| 104 | #address-cells = <1>; | |
| 105 | #size-cells = <0>; | |
| 4ca73962 | 106 | |
| 467f54b2 GC |
107 | button@1 { |
| 108 | label = "Init Button"; | |
| 109 | linux,code = <116>; | |
| 110 | gpios = <&gpio1 28 0>; | |
| 111 | }; | |
| 4ca73962 | 112 | }; |
| 4ca73962 | 113 | |
| 467f54b2 GC |
114 | mdio { |
| 115 | phy0: ethernet-phy@0 { | |
| 116 | reg = <0>; | |
| 117 | }; | |
| f69c92f4 | 118 | |
| 467f54b2 GC |
119 | phy1: ethernet-phy@1 { |
| 120 | reg = <1>; | |
| 121 | }; | |
| f69c92f4 | 122 | |
| 467f54b2 GC |
123 | phy2: ethernet-phy@2 { |
| 124 | reg = <2>; | |
| 125 | }; | |
| f69c92f4 | 126 | |
| 467f54b2 GC |
127 | phy3: ethernet-phy@3 { |
| 128 | reg = <3>; | |
| 129 | }; | |
| f69c92f4 | 130 | }; |
| f69c92f4 | 131 | |
| 467f54b2 GC |
132 | ethernet@70000 { |
| 133 | status = "okay"; | |
| 134 | phy = <&phy0>; | |
| 135 | phy-mode = "sgmii"; | |
| 136 | }; | |
| 137 | ethernet@74000 { | |
| 138 | status = "okay"; | |
| 139 | phy = <&phy1>; | |
| 140 | phy-mode = "sgmii"; | |
| 141 | }; | |
| 142 | ethernet@30000 { | |
| 143 | status = "okay"; | |
| 144 | phy = <&phy2>; | |
| 145 | phy-mode = "sgmii"; | |
| 146 | }; | |
| 147 | ethernet@34000 { | |
| 148 | status = "okay"; | |
| 149 | phy = <&phy3>; | |
| 150 | phy-mode = "sgmii"; | |
| 151 | }; | |
| 152 | i2c@11000 { | |
| 153 | status = "okay"; | |
| 154 | clock-frequency = <400000>; | |
| 155 | }; | |
| 156 | i2c@11100 { | |
| 157 | status = "okay"; | |
| 158 | clock-frequency = <400000>; | |
| 14bedd4a | 159 | |
| 467f54b2 GC |
160 | s35390a: s35390a@30 { |
| 161 | compatible = "s35390a"; | |
| 162 | reg = <0x30>; | |
| 163 | }; | |
| 164 | }; | |
| 165 | sata@a0000 { | |
| 166 | nr-ports = <2>; | |
| 167 | status = "okay"; | |
| 168 | }; | |
| 8034891b TP |
169 | |
| 170 | /* Front side USB 0 */ | |
| 467f54b2 GC |
171 | usb@50000 { |
| 172 | status = "okay"; | |
| 173 | }; | |
| 8034891b TP |
174 | |
| 175 | /* Front side USB 1 */ | |
| 467f54b2 GC |
176 | usb@51000 { |
| 177 | status = "okay"; | |
| 14bedd4a | 178 | }; |
| a7d4f818 | 179 | |
| 467f54b2 | 180 | pcie-controller { |
| 95999cf0 | 181 | status = "okay"; |
| 467f54b2 GC |
182 | /* Internal mini-PCIe connector */ |
| 183 | pcie@1,0 { | |
| 184 | /* Port 0, Lane 0 */ | |
| 185 | status = "okay"; | |
| 186 | }; | |
| 95999cf0 TP |
187 | }; |
| 188 | }; | |
| 19b85c08 TP |
189 | }; |
| 190 | }; |