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ARM: at91: remove old setup
[deliverable/linux.git] / arch / arm / boot / dts / at91rm9200.dtsi
CommitLineData
fe975cf6
JE		 1/*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
12
6db64d29 13#include "skeleton.dtsi"
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
68580013 17#include <dt-bindings/clock/at91.h>
fe975cf6
JE		 18
19/ {
20 model = "Atmel AT91RM9200 family SoC";
21 compatible = "atmel,at91rm9200";
22 interrupt-parent = <&aic>;
23
24 aliases {
25 serial0 = &dbgu;
26 serial1 = &usart0;
27 serial2 = &usart1;
28 serial3 = &usart2;
29 serial4 = &usart3;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 gpio3 = &pioD;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
2d25210d 36 i2c0 = &i2c0;
883a07f6
JE		 37 ssc0 = &ssc0;
38 ssc1 = &ssc1;
39 ssc2 = &ssc2;
fe975cf6
JE		 40 };
41 cpus {
e757a6ee
LP		 42 #address-cells = <0>;
43 #size-cells = <0>;
44
45 cpu {
fe975cf6 46 compatible = "arm,arm920t";
e757a6ee 47 device_type = "cpu";
fe975cf6
JE		 48 };
49 };
50
51 memory {
52 reg = <0x20000000 0x04000000>;
53 };
54
68580013
AB		 55 clocks {
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
67 };
68
f04660e4
AB		 69 sram: sram@00200000 {
70 compatible = "mmio-sram";
71 reg = <0x00200000 0x4000>;
72 };
73
fe975cf6
JE		 74 ahb {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 ranges;
79
80 apb {
81 compatible = "simple-bus";
82 #address-cells = <1>;
83 #size-cells = <1>;
84 ranges;
85
86 aic: interrupt-controller@fffff000 {
87 #interrupt-cells = <3>;
88 compatible = "atmel,at91rm9200-aic";
89 interrupt-controller;
90 reg = <0xfffff000 0x200>;
91 atmel,external-irqs = <25 26 27 28 29 30 31>;
92 };
93
94 ramc0: ramc@ffffff00 {
95 compatible = "atmel,at91rm9200-sdramc";
96 reg = <0xffffff00 0x100>;
97 };
98
99 pmc: pmc@fffffc00 {
100 compatible = "atmel,at91rm9200-pmc";
101 reg = <0xfffffc00 0x100>;
68580013
AB		 102 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
103 interrupt-controller;
104 #address-cells = <1>;
105 #size-cells = <0>;
106 #interrupt-cells = <1>;
107
108 main_osc: main_osc {
109 compatible = "atmel,at91rm9200-clk-main-osc";
110 #clock-cells = <0>;
111 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
112 clocks = <&main_xtal>;
113 };
114
115 main: mainck {
116 compatible = "atmel,at91rm9200-clk-main";
117 #clock-cells = <0>;
118 clocks = <&main_osc>;
119 };
120
121 plla: pllack {
122 compatible = "atmel,at91rm9200-clk-pll";
123 #clock-cells = <0>;
124 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
125 clocks = <&main>;
126 reg = <0>;
127 atmel,clk-input-range = <1000000 32000000>;
128 #atmel,pll-clk-output-range-cells = <3>;
129 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
130 <150000000 180000000 2>;
131 };
132
133 pllb: pllbck {
134 compatible = "atmel,at91rm9200-clk-pll";
135 #clock-cells = <0>;
136 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
137 clocks = <&main>;
138 reg = <1>;
139 atmel,clk-input-range = <1000000 32000000>;
140 #atmel,pll-clk-output-range-cells = <3>;
141 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
142 <150000000 180000000 2>;
143 };
144
145 mck: masterck {
146 compatible = "atmel,at91rm9200-clk-master";
147 #clock-cells = <0>;
148 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
149 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
150 atmel,clk-output-range = <0 80000000>;
151 atmel,clk-divisors = <1 2 3 4>;
152 };
153
154 usb: usbck {
155 compatible = "atmel,at91rm9200-clk-usb";
156 #clock-cells = <0>;
ea4fc621 157 atmel,clk-divisors = <1 2 0 0>;
68580013
AB		 158 clocks = <&pllb>;
159 };
160
161 prog: progck {
162 compatible = "atmel,at91rm9200-clk-programmable";
163 #address-cells = <1>;
164 #size-cells = <0>;
165 interrupt-parent = <&pmc>;
166 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
167
168 prog0: prog0 {
169 #clock-cells = <0>;
170 reg = <0>;
171 interrupts = <AT91_PMC_PCKRDY(0)>;
172 };
173
174 prog1: prog1 {
175 #clock-cells = <0>;
176 reg = <1>;
177 interrupts = <AT91_PMC_PCKRDY(1)>;
178 };
179
180 prog2: prog2 {
181 #clock-cells = <0>;
182 reg = <2>;
183 interrupts = <AT91_PMC_PCKRDY(2)>;
184 };
185
186 prog3: prog3 {
187 #clock-cells = <0>;
188 reg = <3>;
189 interrupts = <AT91_PMC_PCKRDY(3)>;
190 };
191 };
192
193 systemck {
194 compatible = "atmel,at91rm9200-clk-system";
195 #address-cells = <1>;
196 #size-cells = <0>;
197
198 udpck: udpck {
199 #clock-cells = <0>;
200 reg = <2>;
201 clocks = <&usb>;
202 };
203
204 uhpck: uhpck {
205 #clock-cells = <0>;
206 reg = <4>;
207 clocks = <&usb>;
208 };
209
210 pck0: pck0 {
211 #clock-cells = <0>;
212 reg = <8>;
213 clocks = <&prog0>;
214 };
215
216 pck1: pck1 {
217 #clock-cells = <0>;
218 reg = <9>;
219 clocks = <&prog1>;
220 };
221
222 pck2: pck2 {
223 #clock-cells = <0>;
224 reg = <10>;
225 clocks = <&prog2>;
226 };
227
228 pck3: pck3 {
229 #clock-cells = <0>;
230 reg = <11>;
231 clocks = <&prog3>;
232 };
233 };
234
235 periphck {
236 compatible = "atmel,at91rm9200-clk-peripheral";
237 #address-cells = <1>;
238 #size-cells = <0>;
239 clocks = <&mck>;
240
241 pioA_clk: pioA_clk {
242 #clock-cells = <0>;
243 reg = <2>;
244 };
245
246 pioB_clk: pioB_clk {
247 #clock-cells = <0>;
248 reg = <3>;
249 };
250
251 pioC_clk: pioC_clk {
252 #clock-cells = <0>;
253 reg = <4>;
254 };
255
256 pioD_clk: pioD_clk {
257 #clock-cells = <0>;
258 reg = <5>;
259 };
260
261 usart0_clk: usart0_clk {
262 #clock-cells = <0>;
263 reg = <6>;
264 };
265
266 usart1_clk: usart1_clk {
267 #clock-cells = <0>;
268 reg = <7>;
269 };
270
271 usart2_clk: usart2_clk {
272 #clock-cells = <0>;
273 reg = <8>;
274 };
275
276 usart3_clk: usart3_clk {
277 #clock-cells = <0>;
278 reg = <9>;
279 };
280
281 mci0_clk: mci0_clk {
282 #clock-cells = <0>;
283 reg = <10>;
284 };
285
286 udc_clk: udc_clk {
287 #clock-cells = <0>;
288 reg = <11>;
289 };
290
291 twi0_clk: twi0_clk {
292 reg = <12>;
293 #clock-cells = <0>;
294 };
295
296 spi0_clk: spi0_clk {
297 #clock-cells = <0>;
298 reg = <13>;
299 };
300
301 ssc0_clk: ssc0_clk {
302 #clock-cells = <0>;
303 reg = <14>;
304 };
305
306 ssc1_clk: ssc1_clk {
307 #clock-cells = <0>;
308 reg = <15>;
309 };
310
311 ssc2_clk: ssc2_clk {
312 #clock-cells = <0>;
313 reg = <16>;
314 };
315
316 tc0_clk: tc0_clk {
317 #clock-cells = <0>;
318 reg = <17>;
319 };
320
321 tc1_clk: tc1_clk {
322 #clock-cells = <0>;
323 reg = <18>;
324 };
325
326 tc2_clk: tc2_clk {
327 #clock-cells = <0>;
328 reg = <19>;
329 };
330
331 tc3_clk: tc3_clk {
332 #clock-cells = <0>;
333 reg = <20>;
334 };
335
336 tc4_clk: tc4_clk {
337 #clock-cells = <0>;
338 reg = <21>;
339 };
340
341 tc5_clk: tc5_clk {
342 #clock-cells = <0>;
343 reg = <22>;
344 };
345
346 ohci_clk: ohci_clk {
347 #clock-cells = <0>;
348 reg = <23>;
349 };
350
351 macb0_clk: macb0_clk {
352 #clock-cells = <0>;
353 reg = <24>;
354 };
355 };
fe975cf6
JE		 356 };
357
358 st: timer@fffffd00 {
359 compatible = "atmel,at91rm9200-st";
360 reg = <0xfffffd00 0x100>;
5e8b3bc3 361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
fe975cf6
JE		 362 };
363
e39f00e5
AB		 364 rtc: rtc@fffffe00 {
365 compatible = "atmel,at91rm9200-rtc";
366 reg = <0xfffffe00 0x40>;
367 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
368 status = "disabled";
369 };
370
fe975cf6
JE		 371 tcb0: timer@fffa0000 {
372 compatible = "atmel,at91rm9200-tcb";
373 reg = <0xfffa0000 0x100>;
5e8b3bc3
JCPV		 374 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
375 18 IRQ_TYPE_LEVEL_HIGH 0
376 19 IRQ_TYPE_LEVEL_HIGH 0>;
68580013
AB		 377 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
378 clock-names = "t0_clk", "t1_clk", "t2_clk";
fe975cf6
JE		 379 };
380
381 tcb1: timer@fffa4000 {
382 compatible = "atmel,at91rm9200-tcb";
383 reg = <0xfffa4000 0x100>;
5e8b3bc3
JCPV		 384 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
385 21 IRQ_TYPE_LEVEL_HIGH 0
386 22 IRQ_TYPE_LEVEL_HIGH 0>;
68580013
AB		 387 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
388 clock-names = "t0_clk", "t1_clk", "t2_clk";
fe975cf6
JE		 389 };
390
2d25210d
JE		 391 i2c0: i2c@fffb8000 {
392 compatible = "atmel,at91rm9200-i2c";
393 reg = <0xfffb8000 0x4000>;
5e8b3bc3 394 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
2d25210d
JE		 395 pinctrl-names = "default";
396 pinctrl-0 = <&pinctrl_twi>;
68580013 397 clocks = <&twi0_clk>;
2d25210d
JE		 398 #address-cells = <1>;
399 #size-cells = <0>;
400 status = "disabled";
401 };
402
4e4c963e
JE		 403 mmc0: mmc@fffb4000 {
404 compatible = "atmel,hsmci";
405 reg = <0xfffb4000 0x4000>;
5e8b3bc3 406 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
68580013
AB		 407 clocks = <&mci0_clk>;
408 clock-names = "mci_clk";
4e4c963e
JE		 409 #address-cells = <1>;
410 #size-cells = <0>;
90a69f13 411 pinctrl-names = "default";
4e4c963e
JE		 412 status = "disabled";
413 };
414
883a07f6
JE		 415 ssc0: ssc@fffd0000 {
416 compatible = "atmel,at91rm9200-ssc";
417 reg = <0xfffd0000 0x4000>;
5e8b3bc3 418 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 419 pinctrl-names = "default";
420 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
68580013
AB		 421 clocks = <&ssc0_clk>;
422 clock-names = "pclk";
883a07f6
JE		 423 status = "disable";
424 };
425
426 ssc1: ssc@fffd4000 {
427 compatible = "atmel,at91rm9200-ssc";
428 reg = <0xfffd4000 0x4000>;
5e8b3bc3 429 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
68580013
AB		 432 clocks = <&ssc1_clk>;
433 clock-names = "pclk";
883a07f6
JE		 434 status = "disable";
435 };
436
437 ssc2: ssc@fffd8000 {
438 compatible = "atmel,at91rm9200-ssc";
439 reg = <0xfffd8000 0x4000>;
5e8b3bc3 440 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
883a07f6
JE		 441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
68580013
AB		 443 clocks = <&ssc2_clk>;
444 clock-names = "pclk";
883a07f6
JE		 445 status = "disable";
446 };
447
ce3b2630
JE		 448 macb0: ethernet@fffbc000 {
449 compatible = "cdns,at91rm9200-emac", "cdns,emac";
450 reg = <0xfffbc000 0x4000>;
5e8b3bc3 451 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
ce3b2630
JE		 452 phy-mode = "rmii";
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_macb_rmii>;
68580013
AB		 455 clocks = <&macb0_clk>;
456 clock-names = "ether_clk";
ce3b2630
JE		 457 status = "disabled";
458 };
459
fe975cf6
JE		 460 pinctrl@fffff400 {
461 #address-cells = <1>;
462 #size-cells = <1>;
463 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
464 ranges = <0xfffff400 0xfffff400 0x800>;
465
466 atmel,mux-mask = <
467 /* A B */
468 0xffffffff 0xffffffff /* pioA */
469 0xffffffff 0x083fffff /* pioB */
470 0xffff3fff 0x00000000 /* pioC */
471 0x03ff87ff 0x0fffff80 /* pioD */
472 >;
473
474 /* shared pinctrl settings */
475 dbgu {
476 pinctrl_dbgu: dbgu-0 {
477 atmel,pins =
c9d0f317
JCPV		 478 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
479 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
fe975cf6
JE		 480 };
481 };
482
483 uart0 {
484 pinctrl_uart0: uart0-0 {
485 atmel,pins =
c9d0f317
JCPV		 486 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
487 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
fe975cf6
JE		 488 };
489
5cffba20 490 pinctrl_uart0_cts: uart0_cts-0 {
fe975cf6 491 atmel,pins =
c9d0f317 492 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
fe975cf6
JE		 493 };
494
5cffba20 495 pinctrl_uart0_rts: uart0_rts-0 {
fe975cf6 496 atmel,pins =
c9d0f317 497 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
fe975cf6
JE		 498 };
499 };
500
501 uart1 {
502 pinctrl_uart1: uart1-0 {
503 atmel,pins =
c9d0f317
JCPV		 504 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
505 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
fe975cf6
JE		 506 };
507
508 pinctrl_uart1_rts: uart1_rts-0 {
509 atmel,pins =
c9d0f317 510 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
fe975cf6
JE		 511 };
512
513 pinctrl_uart1_cts: uart1_cts-0 {
514 atmel,pins =
c9d0f317 515 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
fe975cf6
JE		 516 };
517
518 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
519 atmel,pins =
c9d0f317
JCPV		 520 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
521 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
fe975cf6
JE		 522 };
523
524 pinctrl_uart1_dcd: uart1_dcd-0 {
525 atmel,pins =
c9d0f317 526 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
fe975cf6
JE		 527 };
528
529 pinctrl_uart1_ri: uart1_ri-0 {
530 atmel,pins =
c9d0f317 531 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
fe975cf6
JE		 532 };
533 };
534
535 uart2 {
536 pinctrl_uart2: uart2-0 {
537 atmel,pins =
c9d0f317
JCPV		 538 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
539 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
fe975cf6
JE		 540 };
541
542 pinctrl_uart2_rts: uart2_rts-0 {
543 atmel,pins =
c9d0f317 544 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
fe975cf6
JE		 545 };
546
547 pinctrl_uart2_cts: uart2_cts-0 {
548 atmel,pins =
c9d0f317 549 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
fe975cf6
JE		 550 };
551 };
552
553 uart3 {
554 pinctrl_uart3: uart3-0 {
555 atmel,pins =
c9d0f317
JCPV		 556 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
557 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
fe975cf6
JE		 558 };
559
560 pinctrl_uart3_rts: uart3_rts-0 {
561 atmel,pins =
c9d0f317 562 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
fe975cf6
JE		 563 };
564
565 pinctrl_uart3_cts: uart3_cts-0 {
566 atmel,pins =
c9d0f317 567 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
fe975cf6
JE		 568 };
569 };
570
571 nand {
572 pinctrl_nand: nand-0 {
573 atmel,pins =
c9d0f317
JCPV		 574 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
575 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
fe975cf6
JE		 576 };
577 };
578
ce3b2630
JE		 579 macb {
580 pinctrl_macb_rmii: macb_rmii-0 {
581 atmel,pins =
c9d0f317
JCPV		 582 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
583 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
584 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
585 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
586 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
587 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
588 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
589 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
590 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
591 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
ce3b2630
JE		 592 };
593
594 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
595 atmel,pins =
c9d0f317
JCPV		 596 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
597 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
598 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
599 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
600 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
601 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
602 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
603 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
ce3b2630
JE		 604 };
605 };
606
4e4c963e
JE		 607 mmc0 {
608 pinctrl_mmc0_clk: mmc0_clk-0 {
609 atmel,pins =
c9d0f317 610 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
4e4c963e
JE		 611 };
612
613 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
614 atmel,pins =
c9d0f317
JCPV		 615 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
616 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
4e4c963e
JE		 617 };
618
619 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
620 atmel,pins =
c9d0f317
JCPV		 621 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
622 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
623 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
4e4c963e
JE		 624 };
625
626 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
627 atmel,pins =
c9d0f317
JCPV		 628 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
629 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
4e4c963e
JE		 630 };
631
632 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
633 atmel,pins =
c9d0f317
JCPV		 634 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
635 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
636 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
4e4c963e
JE		 637 };
638 };
639
883a07f6
JE		 640 ssc0 {
641 pinctrl_ssc0_tx: ssc0_tx-0 {
642 atmel,pins =
c9d0f317
JCPV		 643 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
644 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
645 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
883a07f6
JE		 646 };
647
648 pinctrl_ssc0_rx: ssc0_rx-0 {
649 atmel,pins =
c9d0f317
JCPV		 650 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
651 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
652 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
883a07f6
JE		 653 };
654 };
655
656 ssc1 {
657 pinctrl_ssc1_tx: ssc1_tx-0 {
658 atmel,pins =
c9d0f317
JCPV		 659 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
660 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
661 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
883a07f6
JE		 662 };
663
664 pinctrl_ssc1_rx: ssc1_rx-0 {
665 atmel,pins =
c9d0f317
JCPV		 666 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
667 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
668 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
883a07f6
JE		 669 };
670 };
671
672 ssc2 {
673 pinctrl_ssc2_tx: ssc2_tx-0 {
674 atmel,pins =
c9d0f317
JCPV		 675 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
676 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
677 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
883a07f6
JE		 678 };
679
680 pinctrl_ssc2_rx: ssc2_rx-0 {
681 atmel,pins =
c9d0f317
JCPV		 682 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
683 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
684 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
883a07f6
JE		 685 };
686 };
687
2d25210d
JE		 688 twi {
689 pinctrl_twi: twi-0 {
690 atmel,pins =
c9d0f317
JCPV		 691 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
692 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
2d25210d 693 };
83960c82
JE		 694
695 pinctrl_twi_gpio: twi_gpio-0 {
696 atmel,pins =
c9d0f317
JCPV		 697 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
698 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
83960c82 699 };
2d25210d
JE		 700 };
701
028633c2
BB		 702 tcb0 {
703 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
704 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
705 };
706
707 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
708 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
709 };
710
711 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
712 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
713 };
714
715 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
716 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
717 };
718
719 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
720 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
721 };
722
723 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
724 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
725 };
726
727 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
728 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
729 };
730
731 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
732 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
733 };
734
735 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
736 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
737 };
738 };
739
740 tcb1 {
741 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
742 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
743 };
744
745 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
746 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
747 };
748
749 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
750 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
751 };
752
753 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
754 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
755 };
756
757 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
758 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
759 };
760
761 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
762 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
763 };
764
765 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
766 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
767 };
768
769 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
770 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
771 };
772
773 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
774 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
775 };
776 };
777
32a86877
JCPV		 778 spi0 {
779 pinctrl_spi0: spi0-0 {
780 atmel,pins =
781 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
782 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
783 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
784 };
785 };
786
fe975cf6
JE		 787 pioA: gpio@fffff400 {
788 compatible = "atmel,at91rm9200-gpio";
789 reg = <0xfffff400 0x200>;
5e8b3bc3 790 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 791 #gpio-cells = <2>;
792 gpio-controller;
793 interrupt-controller;
794 #interrupt-cells = <2>;
68580013 795 clocks = <&pioA_clk>;
fe975cf6
JE		 796 };
797
798 pioB: gpio@fffff600 {
799 compatible = "atmel,at91rm9200-gpio";
800 reg = <0xfffff600 0x200>;
5e8b3bc3 801 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 802 #gpio-cells = <2>;
803 gpio-controller;
804 interrupt-controller;
805 #interrupt-cells = <2>;
68580013 806 clocks = <&pioB_clk>;
fe975cf6
JE		 807 };
808
809 pioC: gpio@fffff800 {
810 compatible = "atmel,at91rm9200-gpio";
811 reg = <0xfffff800 0x200>;
5e8b3bc3 812 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 813 #gpio-cells = <2>;
814 gpio-controller;
815 interrupt-controller;
816 #interrupt-cells = <2>;
68580013 817 clocks = <&pioC_clk>;
fe975cf6
JE		 818 };
819
820 pioD: gpio@fffffa00 {
821 compatible = "atmel,at91rm9200-gpio";
822 reg = <0xfffffa00 0x200>;
5e8b3bc3 823 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
fe975cf6
JE		 824 #gpio-cells = <2>;
825 gpio-controller;
826 interrupt-controller;
827 #interrupt-cells = <2>;
68580013 828 clocks = <&pioD_clk>;
fe975cf6
JE		 829 };
830 };
831
832 dbgu: serial@fffff200 {
8c07f664 833 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
fe975cf6 834 reg = <0xfffff200 0x200>;
5e8b3bc3 835 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
fe975cf6
JE		 836 pinctrl-names = "default";
837 pinctrl-0 = <&pinctrl_dbgu>;
68580013
AB		 838 clocks = <&mck>;
839 clock-names = "usart";
fe975cf6
JE		 840 status = "disabled";
841 };
842
843 usart0: serial@fffc0000 {
844 compatible = "atmel,at91rm9200-usart";
845 reg = <0xfffc0000 0x200>;
5e8b3bc3 846 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 847 atmel,use-dma-rx;
848 atmel,use-dma-tx;
849 pinctrl-names = "default";
850 pinctrl-0 = <&pinctrl_uart0>;
68580013
AB		 851 clocks = <&usart0_clk>;
852 clock-names = "usart";
fe975cf6
JE		 853 status = "disabled";
854 };
855
856 usart1: serial@fffc4000 {
857 compatible = "atmel,at91rm9200-usart";
858 reg = <0xfffc4000 0x200>;
5e8b3bc3 859 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 860 atmel,use-dma-rx;
861 atmel,use-dma-tx;
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_uart1>;
68580013
AB		 864 clocks = <&usart1_clk>;
865 clock-names = "usart";
fe975cf6
JE		 866 status = "disabled";
867 };
868
869 usart2: serial@fffc8000 {
870 compatible = "atmel,at91rm9200-usart";
871 reg = <0xfffc8000 0x200>;
5e8b3bc3 872 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 873 atmel,use-dma-rx;
874 atmel,use-dma-tx;
875 pinctrl-names = "default";
876 pinctrl-0 = <&pinctrl_uart2>;
68580013
AB		 877 clocks = <&usart2_clk>;
878 clock-names = "usart";
fe975cf6
JE		 879 status = "disabled";
880 };
881
882 usart3: serial@fffcc000 {
883 compatible = "atmel,at91rm9200-usart";
884 reg = <0xfffcc000 0x200>;
5e8b3bc3 885 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
fe975cf6
JE		 886 atmel,use-dma-rx;
887 atmel,use-dma-tx;
888 pinctrl-names = "default";
889 pinctrl-0 = <&pinctrl_uart3>;
68580013
AB		 890 clocks = <&usart3_clk>;
891 clock-names = "usart";
fe975cf6
JE		 892 status = "disabled";
893 };
894
895 usb1: gadget@fffb0000 {
896 compatible = "atmel,at91rm9200-udc";
897 reg = <0xfffb0000 0x4000>;
5e8b3bc3 898 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
68580013
AB		 899 clocks = <&udc_clk>, <&udpck>;
900 clock-names = "pclk", "hclk";
fe975cf6
JE		 901 status = "disabled";
902 };
32a86877
JCPV		 903
904 spi0: spi@fffe0000 {
905 #address-cells = <1>;
906 #size-cells = <0>;
907 compatible = "atmel,at91rm9200-spi";
908 reg = <0xfffe0000 0x200>;
909 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
910 pinctrl-names = "default";
911 pinctrl-0 = <&pinctrl_spi0>;
68580013
AB		 912 clocks = <&spi0_clk>;
913 clock-names = "spi_clk";
32a86877
JCPV		 914 status = "disabled";
915 };
fe975cf6
JE		 916 };
917
918 nand0: nand@40000000 {
919 compatible = "atmel,at91rm9200-nand";
920 #address-cells = <1>;
921 #size-cells = <1>;
922 reg = <0x40000000 0x10000000>;
923 atmel,nand-addr-offset = <21>;
924 atmel,nand-cmd-offset = <22>;
925 pinctrl-names = "default";
926 pinctrl-0 = <&pinctrl_nand>;
927 nand-ecc-mode = "soft";
92f8629b 928 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
fe975cf6 929 0
92f8629b 930 &pioB 1 GPIO_ACTIVE_HIGH
fe975cf6
JE		 931 >;
932 status = "disabled";
933 };
934
935 usb0: ohci@00300000 {
936 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
937 reg = <0x00300000 0x100000>;
5e8b3bc3 938 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
68580013
AB		 939 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
940 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
fe975cf6
JE		 941 status = "disabled";
942 };
943 };
944
945 i2c@0 {
946 compatible = "i2c-gpio";
92f8629b
JCPV		 947 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
948 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
fe975cf6
JE		 949 >;
950 i2c-gpio,sda-open-drain;
951 i2c-gpio,scl-open-drain;
952 i2c-gpio,delay-us = <2>; /* ~100 kHz */
83960c82
JE		 953 pinctrl-names = "default";
954 pinctrl-0 = <&pinctrl_twi_gpio>;
fe975cf6
JE		 955 #address-cells = <1>;
956 #size-cells = <0>;
957 status = "disabled";
958 };
959};
Linux kernel - Deliverables
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