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360ccb30 JJH |
1 | /* |
2 | * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC | |
3 | * | |
4 | * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> | |
5 | * | |
6 | * Licensed under GPLv2 only. | |
7 | */ | |
8 | ||
9 | #include "skeleton.dtsi" | |
10 | #include <dt-bindings/pinctrl/at91.h> | |
11 | #include <dt-bindings/interrupt-controller/irq.h> | |
12 | #include <dt-bindings/gpio/gpio.h> | |
35d35aae | 13 | #include <dt-bindings/clock/at91.h> |
360ccb30 JJH |
14 | |
15 | / { | |
16 | model = "Atmel AT91SAM9261 family SoC"; | |
17 | compatible = "atmel,at91sam9261"; | |
18 | interrupt-parent = <&aic>; | |
19 | ||
20 | aliases { | |
21 | serial0 = &dbgu; | |
22 | serial1 = &usart0; | |
23 | serial2 = &usart1; | |
24 | serial3 = &usart2; | |
25 | gpio0 = &pioA; | |
26 | gpio1 = &pioB; | |
27 | gpio2 = &pioC; | |
28 | tcb0 = &tcb0; | |
29 | i2c0 = &i2c0; | |
30 | ssc0 = &ssc0; | |
31 | ssc1 = &ssc1; | |
32da8c85 | 32 | ssc2 = &ssc2; |
360ccb30 JJH |
33 | }; |
34 | ||
35 | cpus { | |
36 | #address-cells = <0>; | |
37 | #size-cells = <0>; | |
38 | ||
39 | cpu { | |
40 | compatible = "arm,arm926ej-s"; | |
41 | device_type = "cpu"; | |
42 | }; | |
43 | }; | |
44 | ||
45 | memory { | |
46 | reg = <0x20000000 0x08000000>; | |
47 | }; | |
48 | ||
73b173e5 AB |
49 | clocks { |
50 | main_xtal: main_xtal { | |
51 | compatible = "fixed-clock"; | |
52 | #clock-cells = <0>; | |
53 | clock-frequency = <0>; | |
54 | }; | |
884fb7d0 | 55 | |
73b173e5 AB |
56 | slow_xtal: slow_xtal { |
57 | compatible = "fixed-clock"; | |
58 | #clock-cells = <0>; | |
59 | clock-frequency = <0>; | |
60 | }; | |
884fb7d0 BB |
61 | }; |
62 | ||
360ccb30 JJH |
63 | ahb { |
64 | compatible = "simple-bus"; | |
65 | #address-cells = <1>; | |
66 | #size-cells = <1>; | |
67 | ranges; | |
68 | ||
69 | usb0: ohci@00500000 { | |
70 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
71 | reg = <0x00500000 0x100000>; | |
72 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; | |
73 | clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>; | |
74 | clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; | |
75 | status = "disabled"; | |
76 | }; | |
77 | ||
78 | fb0: fb@0x00600000 { | |
79 | compatible = "atmel,at91sam9261-lcdc"; | |
80 | reg = <0x00600000 0x1000>; | |
81 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; | |
82 | pinctrl-names = "default"; | |
83 | pinctrl-0 = <&pinctrl_fb>; | |
84 | clocks = <&lcd_clk>, <&hclk1>; | |
85 | clock-names = "lcdc_clk", "hclk"; | |
86 | status = "disabled"; | |
87 | }; | |
88 | ||
89 | nand0: nand@40000000 { | |
90 | compatible = "atmel,at91rm9200-nand"; | |
91 | #address-cells = <1>; | |
92 | #size-cells = <1>; | |
93 | reg = <0x40000000 0x10000000>; | |
94 | atmel,nand-addr-offset = <22>; | |
95 | atmel,nand-cmd-offset = <21>; | |
96 | pinctrl-names = "default"; | |
97 | pinctrl-0 = <&pinctrl_nand>; | |
98 | ||
99 | gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, | |
100 | <&pioC 14 GPIO_ACTIVE_HIGH>, | |
101 | <0>; | |
102 | status = "disabled"; | |
103 | }; | |
104 | ||
105 | apb { | |
106 | compatible = "simple-bus"; | |
107 | #address-cells = <1>; | |
108 | #size-cells = <1>; | |
109 | ranges; | |
110 | ||
111 | tcb0: timer@fffa0000 { | |
112 | compatible = "atmel,at91rm9200-tcb"; | |
113 | reg = <0xfffa0000 0x100>; | |
114 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, | |
115 | <18 IRQ_TYPE_LEVEL_HIGH 0>, | |
116 | <19 IRQ_TYPE_LEVEL_HIGH 0>; | |
117 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; | |
118 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
119 | }; | |
120 | ||
121 | usb1: gadget@fffa4000 { | |
122 | compatible = "atmel,at91rm9200-udc"; | |
123 | reg = <0xfffa4000 0x4000>; | |
124 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; | |
125 | clocks = <&usb>, <&udc_clk>, <&udpck>; | |
126 | clock-names = "usb_clk", "udc_clk", "udpck"; | |
127 | status = "disabled"; | |
128 | }; | |
129 | ||
130 | mmc0: mmc@fffa8000 { | |
131 | compatible = "atmel,hsmci"; | |
132 | reg = <0xfffa8000 0x600>; | |
133 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; | |
134 | pinctrl-names = "default"; | |
135 | pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; | |
136 | #address-cells = <1>; | |
137 | #size-cells = <0>; | |
138 | clocks = <&mci0_clk>; | |
139 | clock-names = "mci_clk"; | |
140 | status = "disabled"; | |
141 | }; | |
142 | ||
143 | i2c0: i2c@fffac000 { | |
144 | compatible = "atmel,at91sam9261-i2c"; | |
145 | pinctrl-names = "default"; | |
146 | pinctrl-0 = <&pinctrl_i2c_twi>; | |
147 | reg = <0xfffac000 0x100>; | |
148 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | |
149 | #address-cells = <1>; | |
150 | #size-cells = <0>; | |
151 | clocks = <&twi0_clk>; | |
152 | status = "disabled"; | |
153 | }; | |
154 | ||
155 | usart0: serial@fffb0000 { | |
156 | compatible = "atmel,at91sam9260-usart"; | |
157 | reg = <0xfffb0000 0x200>; | |
158 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | |
159 | atmel,use-dma-rx; | |
160 | atmel,use-dma-tx; | |
161 | pinctrl-names = "default"; | |
162 | pinctrl-0 = <&pinctrl_usart0>; | |
163 | clocks = <&usart0_clk>; | |
164 | clock-names = "usart"; | |
165 | status = "disabled"; | |
166 | }; | |
167 | ||
168 | usart1: serial@fffb4000 { | |
169 | compatible = "atmel,at91sam9260-usart"; | |
170 | reg = <0xfffb4000 0x200>; | |
171 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | |
172 | atmel,use-dma-rx; | |
173 | atmel,use-dma-tx; | |
174 | pinctrl-names = "default"; | |
175 | pinctrl-0 = <&pinctrl_usart1>; | |
176 | clocks = <&usart1_clk>; | |
177 | clock-names = "usart"; | |
178 | status = "disabled"; | |
179 | }; | |
180 | ||
181 | usart2: serial@fffb8000{ | |
182 | compatible = "atmel,at91sam9260-usart"; | |
183 | reg = <0xfffb8000 0x200>; | |
184 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | |
185 | atmel,use-dma-rx; | |
186 | atmel,use-dma-tx; | |
187 | pinctrl-names = "default"; | |
188 | pinctrl-0 = <&pinctrl_usart2>; | |
189 | clocks = <&usart2_clk>; | |
190 | clock-names = "usart"; | |
191 | status = "disabled"; | |
192 | }; | |
193 | ||
194 | ssc0: ssc@fffbc000 { | |
195 | compatible = "atmel,at91rm9200-ssc"; | |
196 | reg = <0xfffbc000 0x4000>; | |
197 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
198 | pinctrl-names = "default"; | |
199 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
32da8c85 AB |
200 | clocks = <&ssc0_clk>; |
201 | clock-names = "pclk"; | |
360ccb30 JJH |
202 | status = "disabled"; |
203 | }; | |
204 | ||
205 | ssc1: ssc@fffc0000 { | |
206 | compatible = "atmel,at91rm9200-ssc"; | |
207 | reg = <0xfffc0000 0x4000>; | |
208 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
209 | pinctrl-names = "default"; | |
210 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
32da8c85 AB |
211 | clocks = <&ssc1_clk>; |
212 | clock-names = "pclk"; | |
213 | status = "disabled"; | |
214 | }; | |
215 | ||
216 | ssc2: ssc@fffc4000 { | |
217 | compatible = "atmel,at91rm9200-ssc"; | |
218 | reg = <0xfffc4000 0x4000>; | |
219 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | |
220 | pinctrl-names = "default"; | |
221 | pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; | |
222 | clocks = <&ssc2_clk>; | |
223 | clock-names = "pclk"; | |
360ccb30 JJH |
224 | status = "disabled"; |
225 | }; | |
226 | ||
227 | spi0: spi@fffc8000 { | |
228 | #address-cells = <1>; | |
229 | #size-cells = <0>; | |
230 | compatible = "atmel,at91rm9200-spi"; | |
231 | reg = <0xfffc8000 0x200>; | |
232 | cs-gpios = <0>, <0>, <0>, <0>; | |
233 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; | |
234 | pinctrl-names = "default"; | |
235 | pinctrl-0 = <&pinctrl_spi0>; | |
236 | clocks = <&spi0_clk>; | |
237 | clock-names = "spi_clk"; | |
238 | status = "disabled"; | |
239 | }; | |
240 | ||
241 | spi1: spi@fffcc000 { | |
242 | #address-cells = <1>; | |
243 | #size-cells = <0>; | |
244 | compatible = "atmel,at91rm9200-spi"; | |
245 | reg = <0xfffcc000 0x200>; | |
246 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | |
247 | pinctrl-names = "default"; | |
248 | pinctrl-0 = <&pinctrl_spi1>; | |
249 | clocks = <&spi1_clk>; | |
250 | clock-names = "spi_clk"; | |
251 | status = "disabled"; | |
252 | }; | |
253 | ||
254 | ramc: ramc@ffffea00 { | |
255 | compatible = "atmel,at91sam9260-sdramc"; | |
256 | reg = <0xffffea00 0x200>; | |
257 | }; | |
258 | ||
259 | matrix: matrix@ffffee00 { | |
260 | compatible = "atmel,at91sam9260-bus-matrix"; | |
261 | reg = <0xffffee00 0x200>; | |
262 | }; | |
263 | ||
264 | aic: interrupt-controller@fffff000 { | |
265 | #interrupt-cells = <3>; | |
266 | compatible = "atmel,at91rm9200-aic"; | |
267 | interrupt-controller; | |
268 | reg = <0xfffff000 0x200>; | |
269 | atmel,external-irqs = <29 30 31>; | |
270 | }; | |
271 | ||
272 | dbgu: serial@fffff200 { | |
273 | compatible = "atmel,at91sam9260-usart"; | |
274 | reg = <0xfffff200 0x200>; | |
275 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
276 | pinctrl-names = "default"; | |
277 | pinctrl-0 = <&pinctrl_dbgu>; | |
278 | clocks = <&mck>; | |
279 | clock-names = "usart"; | |
280 | status = "disabled"; | |
281 | }; | |
282 | ||
283 | pinctrl@fffff400 { | |
284 | #address-cells = <1>; | |
285 | #size-cells = <1>; | |
286 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
287 | ranges = <0xfffff400 0xfffff400 0x600>; | |
288 | ||
289 | atmel,mux-mask = | |
290 | /* A B */ | |
291 | <0xffffffff 0xfffffff7>, /* pioA */ | |
292 | <0xffffffff 0xfffffff4>, /* pioB */ | |
293 | <0xffffffff 0xffffff07>; /* pioC */ | |
294 | ||
295 | /* shared pinctrl settings */ | |
296 | dbgu { | |
297 | pinctrl_dbgu: dbgu-0 { | |
298 | atmel,pins = | |
299 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
300 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
301 | }; | |
302 | }; | |
303 | ||
304 | usart0 { | |
305 | pinctrl_usart0: usart0-0 { | |
306 | atmel,pins = | |
307 | <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
308 | <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
309 | }; | |
310 | ||
311 | pinctrl_usart0_rts: usart0_rts-0 { | |
312 | atmel,pins = | |
313 | <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
314 | }; | |
315 | ||
316 | pinctrl_usart0_cts: usart0_cts-0 { | |
317 | atmel,pins = | |
318 | <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
319 | }; | |
320 | }; | |
321 | ||
322 | usart1 { | |
323 | pinctrl_usart1: usart1-0 { | |
324 | atmel,pins = | |
325 | <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
326 | <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
327 | }; | |
328 | ||
329 | pinctrl_usart1_rts: usart1_rts-0 { | |
330 | atmel,pins = | |
331 | <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
332 | }; | |
333 | ||
334 | pinctrl_usart1_cts: usart1_cts-0 { | |
335 | atmel,pins = | |
336 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
337 | }; | |
338 | }; | |
339 | ||
340 | usart2 { | |
341 | pinctrl_usart2: usart2-0 { | |
342 | atmel,pins = | |
343 | <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
344 | <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
345 | }; | |
346 | ||
347 | pinctrl_usart2_rts: usart2_rts-0 { | |
348 | atmel,pins = | |
349 | <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
350 | }; | |
351 | ||
352 | pinctrl_usart2_cts: usart2_cts-0 { | |
353 | atmel,pins = | |
354 | <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
355 | }; | |
356 | }; | |
357 | ||
358 | nand { | |
359 | pinctrl_nand: nand-0 { | |
360 | atmel,pins = | |
361 | <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, | |
362 | <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | |
363 | }; | |
364 | }; | |
365 | ||
366 | mmc0 { | |
367 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
368 | atmel,pins = | |
369 | <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
370 | }; | |
371 | ||
372 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
373 | atmel,pins = | |
374 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
375 | <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; | |
376 | }; | |
377 | ||
378 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
379 | atmel,pins = | |
380 | <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
381 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
382 | <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; | |
383 | }; | |
384 | }; | |
385 | ||
386 | ssc0 { | |
387 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
388 | atmel,pins = | |
389 | <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
390 | <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
391 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
392 | }; | |
393 | ||
394 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
395 | atmel,pins = | |
396 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
397 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
398 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
399 | }; | |
400 | }; | |
401 | ||
402 | ssc1 { | |
403 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
404 | atmel,pins = | |
405 | <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
406 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
407 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
408 | }; | |
409 | ||
410 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
411 | atmel,pins = | |
412 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
413 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
414 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
415 | }; | |
416 | }; | |
417 | ||
32da8c85 AB |
418 | ssc2 { |
419 | pinctrl_ssc2_tx: ssc2_tx-0 { | |
420 | atmel,pins = | |
421 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
422 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
423 | <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
424 | }; | |
425 | ||
426 | pinctrl_ssc2_rx: ssc2_rx-0 { | |
427 | atmel,pins = | |
428 | <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
429 | <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
430 | <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
431 | }; | |
432 | }; | |
433 | ||
360ccb30 JJH |
434 | spi0 { |
435 | pinctrl_spi0: spi0-0 { | |
436 | atmel,pins = | |
437 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
438 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
439 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
440 | }; | |
441 | }; | |
442 | ||
443 | spi1 { | |
444 | pinctrl_spi1: spi1-0 { | |
445 | atmel,pins = | |
446 | <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
447 | <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
448 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
449 | }; | |
450 | }; | |
451 | ||
452 | tcb0 { | |
453 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
454 | atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
455 | }; | |
456 | ||
457 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
458 | atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
459 | }; | |
460 | ||
461 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
462 | atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
463 | }; | |
464 | ||
465 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
466 | atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
467 | }; | |
468 | ||
469 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
470 | atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
471 | }; | |
472 | ||
473 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
474 | atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
475 | }; | |
476 | ||
477 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
478 | atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
479 | }; | |
480 | ||
481 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
482 | atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
483 | }; | |
484 | ||
485 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
486 | atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
487 | }; | |
488 | }; | |
489 | ||
490 | i2c0 { | |
491 | pinctrl_i2c_bitbang: i2c-0-bitbang { | |
492 | atmel,pins = | |
493 | <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, | |
494 | <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
495 | }; | |
496 | pinctrl_i2c_twi: i2c-0-twi { | |
497 | atmel,pins = | |
498 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
499 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
500 | }; | |
501 | }; | |
502 | ||
503 | fb { | |
504 | pinctrl_fb: fb-0 { | |
505 | atmel,pins = | |
506 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
507 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
508 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
509 | <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
510 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
511 | <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
512 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
513 | <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
514 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
515 | <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
516 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
517 | <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
518 | <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
519 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
520 | <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
521 | <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
522 | <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
523 | <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
524 | <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
525 | <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
526 | <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
527 | }; | |
528 | }; | |
529 | ||
530 | pioA: gpio@fffff400 { | |
531 | compatible = "atmel,at91rm9200-gpio"; | |
532 | reg = <0xfffff400 0x200>; | |
533 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | |
534 | #gpio-cells = <2>; | |
535 | gpio-controller; | |
536 | interrupt-controller; | |
537 | #interrupt-cells = <2>; | |
538 | clocks = <&pioA_clk>; | |
539 | }; | |
540 | ||
541 | pioB: gpio@fffff600 { | |
542 | compatible = "atmel,at91rm9200-gpio"; | |
543 | reg = <0xfffff600 0x200>; | |
544 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | |
545 | #gpio-cells = <2>; | |
546 | gpio-controller; | |
547 | interrupt-controller; | |
548 | #interrupt-cells = <2>; | |
549 | clocks = <&pioB_clk>; | |
550 | }; | |
551 | ||
552 | pioC: gpio@fffff800 { | |
553 | compatible = "atmel,at91rm9200-gpio"; | |
554 | reg = <0xfffff800 0x200>; | |
555 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | |
556 | #gpio-cells = <2>; | |
557 | gpio-controller; | |
558 | interrupt-controller; | |
559 | #interrupt-cells = <2>; | |
560 | clocks = <&pioC_clk>; | |
561 | }; | |
562 | }; | |
563 | ||
564 | pmc: pmc@fffffc00 { | |
565 | compatible = "atmel,at91rm9200-pmc"; | |
566 | reg = <0xfffffc00 0x100>; | |
567 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
568 | interrupt-controller; | |
569 | #address-cells = <1>; | |
570 | #size-cells = <0>; | |
571 | #interrupt-cells = <1>; | |
572 | ||
5de47284 AB |
573 | main_osc: main_osc { |
574 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
360ccb30 JJH |
575 | #clock-cells = <0>; |
576 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
884fb7d0 | 577 | clocks = <&main_xtal>; |
360ccb30 JJH |
578 | }; |
579 | ||
5de47284 AB |
580 | main: mainck { |
581 | compatible = "atmel,at91rm9200-clk-main"; | |
582 | #clock-cells = <0>; | |
583 | clocks = <&main_osc>; | |
584 | }; | |
585 | ||
360ccb30 JJH |
586 | plla: pllack { |
587 | compatible = "atmel,at91rm9200-clk-pll"; | |
588 | #clock-cells = <0>; | |
589 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
590 | clocks = <&main>; | |
591 | reg = <0>; | |
592 | atmel,clk-input-range = <1000000 32000000>; | |
593 | #atmel,pll-clk-output-range-cells = <4>; | |
b1059186 AB |
594 | atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, |
595 | <190000000 240000000 2 1>; | |
360ccb30 JJH |
596 | }; |
597 | ||
598 | pllb: pllbck { | |
599 | compatible = "atmel,at91rm9200-clk-pll"; | |
600 | #clock-cells = <0>; | |
601 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; | |
602 | clocks = <&main>; | |
603 | reg = <1>; | |
b1059186 | 604 | atmel,clk-input-range = <1000000 5000000>; |
360ccb30 | 605 | #atmel,pll-clk-output-range-cells = <4>; |
b1059186 | 606 | atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; |
360ccb30 JJH |
607 | }; |
608 | ||
609 | mck: masterck { | |
610 | compatible = "atmel,at91rm9200-clk-master"; | |
611 | #clock-cells = <0>; | |
612 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
971dc9ce | 613 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; |
360ccb30 | 614 | atmel,clk-output-range = <0 94000000>; |
b1059186 | 615 | atmel,clk-divisors = <1 2 4 0>; |
360ccb30 JJH |
616 | }; |
617 | ||
618 | usb: usbck { | |
619 | compatible = "atmel,at91rm9200-clk-usb"; | |
620 | #clock-cells = <0>; | |
b1059186 | 621 | atmel,clk-divisors = <1 2 4 0>; |
360ccb30 JJH |
622 | clocks = <&pllb>; |
623 | }; | |
624 | ||
32da8c85 AB |
625 | prog: progck { |
626 | compatible = "atmel,at91rm9200-clk-programmable"; | |
627 | #address-cells = <1>; | |
628 | #size-cells = <0>; | |
629 | interrupt-parent = <&pmc>; | |
971dc9ce | 630 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; |
32da8c85 AB |
631 | |
632 | prog0: prog0 { | |
633 | #clock-cells = <0>; | |
634 | reg = <0>; | |
635 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
636 | }; | |
637 | ||
638 | prog1: prog1 { | |
639 | #clock-cells = <0>; | |
640 | reg = <1>; | |
641 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
642 | }; | |
643 | ||
644 | prog2: prog2 { | |
645 | #clock-cells = <0>; | |
646 | reg = <2>; | |
647 | interrupts = <AT91_PMC_PCKRDY(2)>; | |
648 | }; | |
649 | ||
650 | prog3: prog3 { | |
651 | #clock-cells = <0>; | |
652 | reg = <3>; | |
653 | interrupts = <AT91_PMC_PCKRDY(3)>; | |
654 | }; | |
655 | }; | |
656 | ||
360ccb30 JJH |
657 | systemck { |
658 | compatible = "atmel,at91rm9200-clk-system"; | |
659 | #address-cells = <1>; | |
660 | #size-cells = <0>; | |
661 | ||
662 | uhpck: uhpck { | |
663 | #clock-cells = <0>; | |
664 | reg = <6>; | |
665 | clocks = <&usb>; | |
666 | }; | |
667 | ||
668 | udpck: udpck { | |
669 | #clock-cells = <0>; | |
670 | reg = <7>; | |
671 | clocks = <&usb>; | |
672 | }; | |
673 | ||
32da8c85 AB |
674 | pck0: pck0 { |
675 | #clock-cells = <0>; | |
676 | reg = <8>; | |
677 | clocks = <&prog0>; | |
678 | }; | |
679 | ||
680 | pck1: pck1 { | |
681 | #clock-cells = <0>; | |
682 | reg = <9>; | |
683 | clocks = <&prog1>; | |
684 | }; | |
685 | ||
686 | pck2: pck2 { | |
687 | #clock-cells = <0>; | |
688 | reg = <10>; | |
689 | clocks = <&prog2>; | |
690 | }; | |
691 | ||
692 | pck3: pck3 { | |
693 | #clock-cells = <0>; | |
694 | reg = <11>; | |
695 | clocks = <&prog3>; | |
696 | }; | |
697 | ||
360ccb30 JJH |
698 | hclk0: hclk0 { |
699 | #clock-cells = <0>; | |
700 | reg = <16>; | |
701 | clocks = <&mck>; | |
702 | }; | |
703 | ||
704 | hclk1: hclk1 { | |
705 | #clock-cells = <0>; | |
706 | reg = <17>; | |
707 | clocks = <&mck>; | |
708 | }; | |
709 | }; | |
710 | ||
711 | periphck { | |
712 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
713 | #address-cells = <1>; | |
714 | #size-cells = <0>; | |
715 | clocks = <&mck>; | |
716 | ||
717 | pioA_clk: pioA_clk { | |
718 | #clock-cells = <0>; | |
719 | reg = <2>; | |
720 | }; | |
721 | ||
722 | pioB_clk: pioB_clk { | |
723 | #clock-cells = <0>; | |
724 | reg = <3>; | |
725 | }; | |
726 | ||
727 | pioC_clk: pioC_clk { | |
728 | #clock-cells = <0>; | |
729 | reg = <4>; | |
730 | }; | |
731 | ||
732 | usart0_clk: usart0_clk { | |
733 | #clock-cells = <0>; | |
734 | reg = <6>; | |
735 | }; | |
736 | ||
737 | usart1_clk: usart1_clk { | |
738 | #clock-cells = <0>; | |
739 | reg = <7>; | |
740 | }; | |
741 | ||
742 | usart2_clk: usart2_clk { | |
743 | #clock-cells = <0>; | |
744 | reg = <8>; | |
745 | }; | |
746 | ||
747 | mci0_clk: mci0_clk { | |
748 | #clock-cells = <0>; | |
749 | reg = <9>; | |
750 | }; | |
751 | ||
752 | udc_clk: udc_clk { | |
753 | #clock-cells = <0>; | |
754 | reg = <10>; | |
755 | }; | |
756 | ||
757 | twi0_clk: twi0_clk { | |
758 | reg = <11>; | |
759 | #clock-cells = <0>; | |
760 | }; | |
761 | ||
762 | spi0_clk: spi0_clk { | |
763 | #clock-cells = <0>; | |
764 | reg = <12>; | |
765 | }; | |
766 | ||
767 | spi1_clk: spi1_clk { | |
768 | #clock-cells = <0>; | |
769 | reg = <13>; | |
770 | }; | |
771 | ||
32da8c85 AB |
772 | ssc0_clk: ssc0_clk { |
773 | #clock-cells = <0>; | |
774 | reg = <14>; | |
775 | }; | |
776 | ||
777 | ssc1_clk: ssc1_clk { | |
778 | #clock-cells = <0>; | |
779 | reg = <15>; | |
780 | }; | |
781 | ||
782 | ssc2_clk: ssc2_clk { | |
783 | #clock-cells = <0>; | |
784 | reg = <16>; | |
785 | }; | |
786 | ||
360ccb30 JJH |
787 | tc0_clk: tc0_clk { |
788 | #clock-cells = <0>; | |
789 | reg = <17>; | |
790 | }; | |
791 | ||
792 | tc1_clk: tc1_clk { | |
793 | #clock-cells = <0>; | |
794 | reg = <18>; | |
795 | }; | |
796 | ||
797 | tc2_clk: tc2_clk { | |
798 | #clock-cells = <0>; | |
799 | reg = <19>; | |
800 | }; | |
801 | ||
802 | ohci_clk: ohci_clk { | |
803 | #clock-cells = <0>; | |
804 | reg = <20>; | |
805 | }; | |
806 | ||
807 | lcd_clk: lcd_clk { | |
808 | #clock-cells = <0>; | |
809 | reg = <21>; | |
810 | }; | |
811 | }; | |
812 | }; | |
813 | ||
814 | rstc@fffffd00 { | |
815 | compatible = "atmel,at91sam9260-rstc"; | |
816 | reg = <0xfffffd00 0x10>; | |
817 | }; | |
818 | ||
819 | shdwc@fffffd10 { | |
820 | compatible = "atmel,at91sam9260-shdwc"; | |
821 | reg = <0xfffffd10 0x10>; | |
822 | }; | |
823 | ||
824 | pit: timer@fffffd30 { | |
825 | compatible = "atmel,at91sam9260-pit"; | |
826 | reg = <0xfffffd30 0xf>; | |
827 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
828 | clocks = <&mck>; | |
829 | }; | |
830 | ||
831 | watchdog@fffffd40 { | |
832 | compatible = "atmel,at91sam9260-wdt"; | |
833 | reg = <0xfffffd40 0x10>; | |
834 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
835 | status = "disabled"; | |
836 | }; | |
837 | }; | |
838 | }; | |
839 | ||
840 | i2c@0 { | |
841 | compatible = "i2c-gpio"; | |
842 | pinctrl-names = "default"; | |
843 | pinctrl-0 = <&pinctrl_i2c_bitbang>; | |
844 | gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ | |
845 | <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ | |
846 | i2c-gpio,sda-open-drain; | |
847 | i2c-gpio,scl-open-drain; | |
848 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
849 | #address-cells = <1>; | |
850 | #size-cells = <0>; | |
851 | status = "disabled"; | |
852 | }; | |
853 | }; |