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360ccb30 JJH |
1 | /* |
2 | * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC | |
3 | * | |
4 | * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> | |
5 | * | |
6 | * Licensed under GPLv2 only. | |
7 | */ | |
8 | ||
9 | #include "skeleton.dtsi" | |
10 | #include <dt-bindings/pinctrl/at91.h> | |
11 | #include <dt-bindings/interrupt-controller/irq.h> | |
12 | #include <dt-bindings/gpio/gpio.h> | |
35d35aae | 13 | #include <dt-bindings/clock/at91.h> |
360ccb30 JJH |
14 | |
15 | / { | |
16 | model = "Atmel AT91SAM9261 family SoC"; | |
17 | compatible = "atmel,at91sam9261"; | |
18 | interrupt-parent = <&aic>; | |
19 | ||
20 | aliases { | |
21 | serial0 = &dbgu; | |
22 | serial1 = &usart0; | |
23 | serial2 = &usart1; | |
24 | serial3 = &usart2; | |
25 | gpio0 = &pioA; | |
26 | gpio1 = &pioB; | |
27 | gpio2 = &pioC; | |
28 | tcb0 = &tcb0; | |
29 | i2c0 = &i2c0; | |
30 | ssc0 = &ssc0; | |
31 | ssc1 = &ssc1; | |
32da8c85 | 32 | ssc2 = &ssc2; |
360ccb30 JJH |
33 | }; |
34 | ||
35 | cpus { | |
36 | #address-cells = <0>; | |
37 | #size-cells = <0>; | |
38 | ||
39 | cpu { | |
40 | compatible = "arm,arm926ej-s"; | |
41 | device_type = "cpu"; | |
42 | }; | |
43 | }; | |
44 | ||
45 | memory { | |
46 | reg = <0x20000000 0x08000000>; | |
47 | }; | |
48 | ||
884fb7d0 BB |
49 | main_xtal: main_xtal { |
50 | compatible = "fixed-clock"; | |
51 | #clock-cells = <0>; | |
52 | clock-frequency = <0>; | |
53 | }; | |
54 | ||
55 | slow_xtal: slow_xtal { | |
56 | compatible = "fixed-clock"; | |
57 | #clock-cells = <0>; | |
58 | clock-frequency = <0>; | |
59 | }; | |
60 | ||
360ccb30 JJH |
61 | ahb { |
62 | compatible = "simple-bus"; | |
63 | #address-cells = <1>; | |
64 | #size-cells = <1>; | |
65 | ranges; | |
66 | ||
67 | usb0: ohci@00500000 { | |
68 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
69 | reg = <0x00500000 0x100000>; | |
70 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; | |
71 | clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>; | |
72 | clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; | |
73 | status = "disabled"; | |
74 | }; | |
75 | ||
76 | fb0: fb@0x00600000 { | |
77 | compatible = "atmel,at91sam9261-lcdc"; | |
78 | reg = <0x00600000 0x1000>; | |
79 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; | |
80 | pinctrl-names = "default"; | |
81 | pinctrl-0 = <&pinctrl_fb>; | |
82 | clocks = <&lcd_clk>, <&hclk1>; | |
83 | clock-names = "lcdc_clk", "hclk"; | |
84 | status = "disabled"; | |
85 | }; | |
86 | ||
87 | nand0: nand@40000000 { | |
88 | compatible = "atmel,at91rm9200-nand"; | |
89 | #address-cells = <1>; | |
90 | #size-cells = <1>; | |
91 | reg = <0x40000000 0x10000000>; | |
92 | atmel,nand-addr-offset = <22>; | |
93 | atmel,nand-cmd-offset = <21>; | |
94 | pinctrl-names = "default"; | |
95 | pinctrl-0 = <&pinctrl_nand>; | |
96 | ||
97 | gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, | |
98 | <&pioC 14 GPIO_ACTIVE_HIGH>, | |
99 | <0>; | |
100 | status = "disabled"; | |
101 | }; | |
102 | ||
103 | apb { | |
104 | compatible = "simple-bus"; | |
105 | #address-cells = <1>; | |
106 | #size-cells = <1>; | |
107 | ranges; | |
108 | ||
109 | tcb0: timer@fffa0000 { | |
110 | compatible = "atmel,at91rm9200-tcb"; | |
111 | reg = <0xfffa0000 0x100>; | |
112 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, | |
113 | <18 IRQ_TYPE_LEVEL_HIGH 0>, | |
114 | <19 IRQ_TYPE_LEVEL_HIGH 0>; | |
115 | clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>; | |
116 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
117 | }; | |
118 | ||
119 | usb1: gadget@fffa4000 { | |
120 | compatible = "atmel,at91rm9200-udc"; | |
121 | reg = <0xfffa4000 0x4000>; | |
122 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; | |
123 | clocks = <&usb>, <&udc_clk>, <&udpck>; | |
124 | clock-names = "usb_clk", "udc_clk", "udpck"; | |
125 | status = "disabled"; | |
126 | }; | |
127 | ||
128 | mmc0: mmc@fffa8000 { | |
129 | compatible = "atmel,hsmci"; | |
130 | reg = <0xfffa8000 0x600>; | |
131 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; | |
132 | pinctrl-names = "default"; | |
133 | pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; | |
134 | #address-cells = <1>; | |
135 | #size-cells = <0>; | |
136 | clocks = <&mci0_clk>; | |
137 | clock-names = "mci_clk"; | |
138 | status = "disabled"; | |
139 | }; | |
140 | ||
141 | i2c0: i2c@fffac000 { | |
142 | compatible = "atmel,at91sam9261-i2c"; | |
143 | pinctrl-names = "default"; | |
144 | pinctrl-0 = <&pinctrl_i2c_twi>; | |
145 | reg = <0xfffac000 0x100>; | |
146 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; | |
147 | #address-cells = <1>; | |
148 | #size-cells = <0>; | |
149 | clocks = <&twi0_clk>; | |
150 | status = "disabled"; | |
151 | }; | |
152 | ||
153 | usart0: serial@fffb0000 { | |
154 | compatible = "atmel,at91sam9260-usart"; | |
155 | reg = <0xfffb0000 0x200>; | |
156 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; | |
157 | atmel,use-dma-rx; | |
158 | atmel,use-dma-tx; | |
159 | pinctrl-names = "default"; | |
160 | pinctrl-0 = <&pinctrl_usart0>; | |
161 | clocks = <&usart0_clk>; | |
162 | clock-names = "usart"; | |
163 | status = "disabled"; | |
164 | }; | |
165 | ||
166 | usart1: serial@fffb4000 { | |
167 | compatible = "atmel,at91sam9260-usart"; | |
168 | reg = <0xfffb4000 0x200>; | |
169 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; | |
170 | atmel,use-dma-rx; | |
171 | atmel,use-dma-tx; | |
172 | pinctrl-names = "default"; | |
173 | pinctrl-0 = <&pinctrl_usart1>; | |
174 | clocks = <&usart1_clk>; | |
175 | clock-names = "usart"; | |
176 | status = "disabled"; | |
177 | }; | |
178 | ||
179 | usart2: serial@fffb8000{ | |
180 | compatible = "atmel,at91sam9260-usart"; | |
181 | reg = <0xfffb8000 0x200>; | |
182 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; | |
183 | atmel,use-dma-rx; | |
184 | atmel,use-dma-tx; | |
185 | pinctrl-names = "default"; | |
186 | pinctrl-0 = <&pinctrl_usart2>; | |
187 | clocks = <&usart2_clk>; | |
188 | clock-names = "usart"; | |
189 | status = "disabled"; | |
190 | }; | |
191 | ||
192 | ssc0: ssc@fffbc000 { | |
193 | compatible = "atmel,at91rm9200-ssc"; | |
194 | reg = <0xfffbc000 0x4000>; | |
195 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | |
196 | pinctrl-names = "default"; | |
197 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
32da8c85 AB |
198 | clocks = <&ssc0_clk>; |
199 | clock-names = "pclk"; | |
360ccb30 JJH |
200 | status = "disabled"; |
201 | }; | |
202 | ||
203 | ssc1: ssc@fffc0000 { | |
204 | compatible = "atmel,at91rm9200-ssc"; | |
205 | reg = <0xfffc0000 0x4000>; | |
206 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
207 | pinctrl-names = "default"; | |
208 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
32da8c85 AB |
209 | clocks = <&ssc1_clk>; |
210 | clock-names = "pclk"; | |
211 | status = "disabled"; | |
212 | }; | |
213 | ||
214 | ssc2: ssc@fffc4000 { | |
215 | compatible = "atmel,at91rm9200-ssc"; | |
216 | reg = <0xfffc4000 0x4000>; | |
217 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | |
218 | pinctrl-names = "default"; | |
219 | pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; | |
220 | clocks = <&ssc2_clk>; | |
221 | clock-names = "pclk"; | |
360ccb30 JJH |
222 | status = "disabled"; |
223 | }; | |
224 | ||
225 | spi0: spi@fffc8000 { | |
226 | #address-cells = <1>; | |
227 | #size-cells = <0>; | |
228 | compatible = "atmel,at91rm9200-spi"; | |
229 | reg = <0xfffc8000 0x200>; | |
230 | cs-gpios = <0>, <0>, <0>, <0>; | |
231 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; | |
232 | pinctrl-names = "default"; | |
233 | pinctrl-0 = <&pinctrl_spi0>; | |
234 | clocks = <&spi0_clk>; | |
235 | clock-names = "spi_clk"; | |
236 | status = "disabled"; | |
237 | }; | |
238 | ||
239 | spi1: spi@fffcc000 { | |
240 | #address-cells = <1>; | |
241 | #size-cells = <0>; | |
242 | compatible = "atmel,at91rm9200-spi"; | |
243 | reg = <0xfffcc000 0x200>; | |
244 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; | |
245 | pinctrl-names = "default"; | |
246 | pinctrl-0 = <&pinctrl_spi1>; | |
247 | clocks = <&spi1_clk>; | |
248 | clock-names = "spi_clk"; | |
249 | status = "disabled"; | |
250 | }; | |
251 | ||
252 | ramc: ramc@ffffea00 { | |
253 | compatible = "atmel,at91sam9260-sdramc"; | |
254 | reg = <0xffffea00 0x200>; | |
255 | }; | |
256 | ||
257 | matrix: matrix@ffffee00 { | |
258 | compatible = "atmel,at91sam9260-bus-matrix"; | |
259 | reg = <0xffffee00 0x200>; | |
260 | }; | |
261 | ||
262 | aic: interrupt-controller@fffff000 { | |
263 | #interrupt-cells = <3>; | |
264 | compatible = "atmel,at91rm9200-aic"; | |
265 | interrupt-controller; | |
266 | reg = <0xfffff000 0x200>; | |
267 | atmel,external-irqs = <29 30 31>; | |
268 | }; | |
269 | ||
270 | dbgu: serial@fffff200 { | |
271 | compatible = "atmel,at91sam9260-usart"; | |
272 | reg = <0xfffff200 0x200>; | |
273 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
274 | pinctrl-names = "default"; | |
275 | pinctrl-0 = <&pinctrl_dbgu>; | |
276 | clocks = <&mck>; | |
277 | clock-names = "usart"; | |
278 | status = "disabled"; | |
279 | }; | |
280 | ||
281 | pinctrl@fffff400 { | |
282 | #address-cells = <1>; | |
283 | #size-cells = <1>; | |
284 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
285 | ranges = <0xfffff400 0xfffff400 0x600>; | |
286 | ||
287 | atmel,mux-mask = | |
288 | /* A B */ | |
289 | <0xffffffff 0xfffffff7>, /* pioA */ | |
290 | <0xffffffff 0xfffffff4>, /* pioB */ | |
291 | <0xffffffff 0xffffff07>; /* pioC */ | |
292 | ||
293 | /* shared pinctrl settings */ | |
294 | dbgu { | |
295 | pinctrl_dbgu: dbgu-0 { | |
296 | atmel,pins = | |
297 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
298 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; | |
299 | }; | |
300 | }; | |
301 | ||
302 | usart0 { | |
303 | pinctrl_usart0: usart0-0 { | |
304 | atmel,pins = | |
305 | <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
306 | <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
307 | }; | |
308 | ||
309 | pinctrl_usart0_rts: usart0_rts-0 { | |
310 | atmel,pins = | |
311 | <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
312 | }; | |
313 | ||
314 | pinctrl_usart0_cts: usart0_cts-0 { | |
315 | atmel,pins = | |
316 | <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
317 | }; | |
318 | }; | |
319 | ||
320 | usart1 { | |
321 | pinctrl_usart1: usart1-0 { | |
322 | atmel,pins = | |
323 | <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
324 | <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
325 | }; | |
326 | ||
327 | pinctrl_usart1_rts: usart1_rts-0 { | |
328 | atmel,pins = | |
329 | <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
330 | }; | |
331 | ||
332 | pinctrl_usart1_cts: usart1_cts-0 { | |
333 | atmel,pins = | |
334 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
335 | }; | |
336 | }; | |
337 | ||
338 | usart2 { | |
339 | pinctrl_usart2: usart2-0 { | |
340 | atmel,pins = | |
341 | <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, | |
342 | <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
343 | }; | |
344 | ||
345 | pinctrl_usart2_rts: usart2_rts-0 { | |
346 | atmel,pins = | |
347 | <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
348 | }; | |
349 | ||
350 | pinctrl_usart2_cts: usart2_cts-0 { | |
351 | atmel,pins = | |
352 | <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
353 | }; | |
354 | }; | |
355 | ||
356 | nand { | |
357 | pinctrl_nand: nand-0 { | |
358 | atmel,pins = | |
359 | <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, | |
360 | <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; | |
361 | }; | |
362 | }; | |
363 | ||
364 | mmc0 { | |
365 | pinctrl_mmc0_clk: mmc0_clk-0 { | |
366 | atmel,pins = | |
367 | <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
368 | }; | |
369 | ||
370 | pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { | |
371 | atmel,pins = | |
372 | <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
373 | <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; | |
374 | }; | |
375 | ||
376 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
377 | atmel,pins = | |
378 | <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
379 | <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, | |
380 | <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; | |
381 | }; | |
382 | }; | |
383 | ||
384 | ssc0 { | |
385 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
386 | atmel,pins = | |
387 | <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
388 | <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
389 | <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
390 | }; | |
391 | ||
392 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
393 | atmel,pins = | |
394 | <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
395 | <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
396 | <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
397 | }; | |
398 | }; | |
399 | ||
400 | ssc1 { | |
401 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
402 | atmel,pins = | |
403 | <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
404 | <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
405 | <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
406 | }; | |
407 | ||
408 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
409 | atmel,pins = | |
410 | <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
411 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
412 | <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
413 | }; | |
414 | }; | |
415 | ||
32da8c85 AB |
416 | ssc2 { |
417 | pinctrl_ssc2_tx: ssc2_tx-0 { | |
418 | atmel,pins = | |
419 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
420 | <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
421 | <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
422 | }; | |
423 | ||
424 | pinctrl_ssc2_rx: ssc2_rx-0 { | |
425 | atmel,pins = | |
426 | <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
427 | <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
428 | <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
429 | }; | |
430 | }; | |
431 | ||
360ccb30 JJH |
432 | spi0 { |
433 | pinctrl_spi0: spi0-0 { | |
434 | atmel,pins = | |
435 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
436 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
437 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
438 | }; | |
439 | }; | |
440 | ||
441 | spi1 { | |
442 | pinctrl_spi1: spi1-0 { | |
443 | atmel,pins = | |
444 | <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
445 | <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
446 | <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
447 | }; | |
448 | }; | |
449 | ||
450 | tcb0 { | |
451 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
452 | atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
453 | }; | |
454 | ||
455 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
456 | atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
457 | }; | |
458 | ||
459 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
460 | atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
461 | }; | |
462 | ||
463 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
464 | atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
465 | }; | |
466 | ||
467 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
468 | atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
469 | }; | |
470 | ||
471 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
472 | atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
473 | }; | |
474 | ||
475 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
476 | atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
477 | }; | |
478 | ||
479 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
480 | atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
481 | }; | |
482 | ||
483 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
484 | atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
485 | }; | |
486 | }; | |
487 | ||
488 | i2c0 { | |
489 | pinctrl_i2c_bitbang: i2c-0-bitbang { | |
490 | atmel,pins = | |
491 | <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, | |
492 | <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
493 | }; | |
494 | pinctrl_i2c_twi: i2c-0-twi { | |
495 | atmel,pins = | |
496 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
497 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
498 | }; | |
499 | }; | |
500 | ||
501 | fb { | |
502 | pinctrl_fb: fb-0 { | |
503 | atmel,pins = | |
504 | <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
505 | <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
506 | <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
507 | <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
508 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
509 | <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
510 | <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
511 | <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
512 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
513 | <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
514 | <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
515 | <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
516 | <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
517 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
518 | <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, | |
519 | <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
520 | <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
521 | <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
522 | <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
523 | <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, | |
524 | <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
525 | }; | |
526 | }; | |
527 | ||
528 | pioA: gpio@fffff400 { | |
529 | compatible = "atmel,at91rm9200-gpio"; | |
530 | reg = <0xfffff400 0x200>; | |
531 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; | |
532 | #gpio-cells = <2>; | |
533 | gpio-controller; | |
534 | interrupt-controller; | |
535 | #interrupt-cells = <2>; | |
536 | clocks = <&pioA_clk>; | |
537 | }; | |
538 | ||
539 | pioB: gpio@fffff600 { | |
540 | compatible = "atmel,at91rm9200-gpio"; | |
541 | reg = <0xfffff600 0x200>; | |
542 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; | |
543 | #gpio-cells = <2>; | |
544 | gpio-controller; | |
545 | interrupt-controller; | |
546 | #interrupt-cells = <2>; | |
547 | clocks = <&pioB_clk>; | |
548 | }; | |
549 | ||
550 | pioC: gpio@fffff800 { | |
551 | compatible = "atmel,at91rm9200-gpio"; | |
552 | reg = <0xfffff800 0x200>; | |
553 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; | |
554 | #gpio-cells = <2>; | |
555 | gpio-controller; | |
556 | interrupt-controller; | |
557 | #interrupt-cells = <2>; | |
558 | clocks = <&pioC_clk>; | |
559 | }; | |
560 | }; | |
561 | ||
562 | pmc: pmc@fffffc00 { | |
563 | compatible = "atmel,at91rm9200-pmc"; | |
564 | reg = <0xfffffc00 0x100>; | |
565 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
566 | interrupt-controller; | |
567 | #address-cells = <1>; | |
568 | #size-cells = <0>; | |
569 | #interrupt-cells = <1>; | |
570 | ||
5de47284 AB |
571 | main_osc: main_osc { |
572 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
360ccb30 JJH |
573 | #clock-cells = <0>; |
574 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
884fb7d0 | 575 | clocks = <&main_xtal>; |
360ccb30 JJH |
576 | }; |
577 | ||
5de47284 AB |
578 | main: mainck { |
579 | compatible = "atmel,at91rm9200-clk-main"; | |
580 | #clock-cells = <0>; | |
581 | clocks = <&main_osc>; | |
582 | }; | |
583 | ||
360ccb30 JJH |
584 | plla: pllack { |
585 | compatible = "atmel,at91rm9200-clk-pll"; | |
586 | #clock-cells = <0>; | |
587 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
588 | clocks = <&main>; | |
589 | reg = <0>; | |
590 | atmel,clk-input-range = <1000000 32000000>; | |
591 | #atmel,pll-clk-output-range-cells = <4>; | |
b1059186 AB |
592 | atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, |
593 | <190000000 240000000 2 1>; | |
360ccb30 JJH |
594 | }; |
595 | ||
596 | pllb: pllbck { | |
597 | compatible = "atmel,at91rm9200-clk-pll"; | |
598 | #clock-cells = <0>; | |
599 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; | |
600 | clocks = <&main>; | |
601 | reg = <1>; | |
b1059186 | 602 | atmel,clk-input-range = <1000000 5000000>; |
360ccb30 | 603 | #atmel,pll-clk-output-range-cells = <4>; |
b1059186 | 604 | atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; |
360ccb30 JJH |
605 | }; |
606 | ||
607 | mck: masterck { | |
608 | compatible = "atmel,at91rm9200-clk-master"; | |
609 | #clock-cells = <0>; | |
610 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
971dc9ce | 611 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; |
360ccb30 | 612 | atmel,clk-output-range = <0 94000000>; |
b1059186 | 613 | atmel,clk-divisors = <1 2 4 0>; |
360ccb30 JJH |
614 | }; |
615 | ||
616 | usb: usbck { | |
617 | compatible = "atmel,at91rm9200-clk-usb"; | |
618 | #clock-cells = <0>; | |
b1059186 | 619 | atmel,clk-divisors = <1 2 4 0>; |
360ccb30 JJH |
620 | clocks = <&pllb>; |
621 | }; | |
622 | ||
32da8c85 AB |
623 | prog: progck { |
624 | compatible = "atmel,at91rm9200-clk-programmable"; | |
625 | #address-cells = <1>; | |
626 | #size-cells = <0>; | |
627 | interrupt-parent = <&pmc>; | |
971dc9ce | 628 | clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; |
32da8c85 AB |
629 | |
630 | prog0: prog0 { | |
631 | #clock-cells = <0>; | |
632 | reg = <0>; | |
633 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
634 | }; | |
635 | ||
636 | prog1: prog1 { | |
637 | #clock-cells = <0>; | |
638 | reg = <1>; | |
639 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
640 | }; | |
641 | ||
642 | prog2: prog2 { | |
643 | #clock-cells = <0>; | |
644 | reg = <2>; | |
645 | interrupts = <AT91_PMC_PCKRDY(2)>; | |
646 | }; | |
647 | ||
648 | prog3: prog3 { | |
649 | #clock-cells = <0>; | |
650 | reg = <3>; | |
651 | interrupts = <AT91_PMC_PCKRDY(3)>; | |
652 | }; | |
653 | }; | |
654 | ||
360ccb30 JJH |
655 | systemck { |
656 | compatible = "atmel,at91rm9200-clk-system"; | |
657 | #address-cells = <1>; | |
658 | #size-cells = <0>; | |
659 | ||
660 | uhpck: uhpck { | |
661 | #clock-cells = <0>; | |
662 | reg = <6>; | |
663 | clocks = <&usb>; | |
664 | }; | |
665 | ||
666 | udpck: udpck { | |
667 | #clock-cells = <0>; | |
668 | reg = <7>; | |
669 | clocks = <&usb>; | |
670 | }; | |
671 | ||
32da8c85 AB |
672 | pck0: pck0 { |
673 | #clock-cells = <0>; | |
674 | reg = <8>; | |
675 | clocks = <&prog0>; | |
676 | }; | |
677 | ||
678 | pck1: pck1 { | |
679 | #clock-cells = <0>; | |
680 | reg = <9>; | |
681 | clocks = <&prog1>; | |
682 | }; | |
683 | ||
684 | pck2: pck2 { | |
685 | #clock-cells = <0>; | |
686 | reg = <10>; | |
687 | clocks = <&prog2>; | |
688 | }; | |
689 | ||
690 | pck3: pck3 { | |
691 | #clock-cells = <0>; | |
692 | reg = <11>; | |
693 | clocks = <&prog3>; | |
694 | }; | |
695 | ||
360ccb30 JJH |
696 | hclk0: hclk0 { |
697 | #clock-cells = <0>; | |
698 | reg = <16>; | |
699 | clocks = <&mck>; | |
700 | }; | |
701 | ||
702 | hclk1: hclk1 { | |
703 | #clock-cells = <0>; | |
704 | reg = <17>; | |
705 | clocks = <&mck>; | |
706 | }; | |
707 | }; | |
708 | ||
709 | periphck { | |
710 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
711 | #address-cells = <1>; | |
712 | #size-cells = <0>; | |
713 | clocks = <&mck>; | |
714 | ||
715 | pioA_clk: pioA_clk { | |
716 | #clock-cells = <0>; | |
717 | reg = <2>; | |
718 | }; | |
719 | ||
720 | pioB_clk: pioB_clk { | |
721 | #clock-cells = <0>; | |
722 | reg = <3>; | |
723 | }; | |
724 | ||
725 | pioC_clk: pioC_clk { | |
726 | #clock-cells = <0>; | |
727 | reg = <4>; | |
728 | }; | |
729 | ||
730 | usart0_clk: usart0_clk { | |
731 | #clock-cells = <0>; | |
732 | reg = <6>; | |
733 | }; | |
734 | ||
735 | usart1_clk: usart1_clk { | |
736 | #clock-cells = <0>; | |
737 | reg = <7>; | |
738 | }; | |
739 | ||
740 | usart2_clk: usart2_clk { | |
741 | #clock-cells = <0>; | |
742 | reg = <8>; | |
743 | }; | |
744 | ||
745 | mci0_clk: mci0_clk { | |
746 | #clock-cells = <0>; | |
747 | reg = <9>; | |
748 | }; | |
749 | ||
750 | udc_clk: udc_clk { | |
751 | #clock-cells = <0>; | |
752 | reg = <10>; | |
753 | }; | |
754 | ||
755 | twi0_clk: twi0_clk { | |
756 | reg = <11>; | |
757 | #clock-cells = <0>; | |
758 | }; | |
759 | ||
760 | spi0_clk: spi0_clk { | |
761 | #clock-cells = <0>; | |
762 | reg = <12>; | |
763 | }; | |
764 | ||
765 | spi1_clk: spi1_clk { | |
766 | #clock-cells = <0>; | |
767 | reg = <13>; | |
768 | }; | |
769 | ||
32da8c85 AB |
770 | ssc0_clk: ssc0_clk { |
771 | #clock-cells = <0>; | |
772 | reg = <14>; | |
773 | }; | |
774 | ||
775 | ssc1_clk: ssc1_clk { | |
776 | #clock-cells = <0>; | |
777 | reg = <15>; | |
778 | }; | |
779 | ||
780 | ssc2_clk: ssc2_clk { | |
781 | #clock-cells = <0>; | |
782 | reg = <16>; | |
783 | }; | |
784 | ||
360ccb30 JJH |
785 | tc0_clk: tc0_clk { |
786 | #clock-cells = <0>; | |
787 | reg = <17>; | |
788 | }; | |
789 | ||
790 | tc1_clk: tc1_clk { | |
791 | #clock-cells = <0>; | |
792 | reg = <18>; | |
793 | }; | |
794 | ||
795 | tc2_clk: tc2_clk { | |
796 | #clock-cells = <0>; | |
797 | reg = <19>; | |
798 | }; | |
799 | ||
800 | ohci_clk: ohci_clk { | |
801 | #clock-cells = <0>; | |
802 | reg = <20>; | |
803 | }; | |
804 | ||
805 | lcd_clk: lcd_clk { | |
806 | #clock-cells = <0>; | |
807 | reg = <21>; | |
808 | }; | |
809 | }; | |
810 | }; | |
811 | ||
812 | rstc@fffffd00 { | |
813 | compatible = "atmel,at91sam9260-rstc"; | |
814 | reg = <0xfffffd00 0x10>; | |
815 | }; | |
816 | ||
817 | shdwc@fffffd10 { | |
818 | compatible = "atmel,at91sam9260-shdwc"; | |
819 | reg = <0xfffffd10 0x10>; | |
820 | }; | |
821 | ||
822 | pit: timer@fffffd30 { | |
823 | compatible = "atmel,at91sam9260-pit"; | |
824 | reg = <0xfffffd30 0xf>; | |
825 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
826 | clocks = <&mck>; | |
827 | }; | |
828 | ||
829 | watchdog@fffffd40 { | |
830 | compatible = "atmel,at91sam9260-wdt"; | |
831 | reg = <0xfffffd40 0x10>; | |
832 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
833 | status = "disabled"; | |
834 | }; | |
835 | }; | |
836 | }; | |
837 | ||
838 | i2c@0 { | |
839 | compatible = "i2c-gpio"; | |
840 | pinctrl-names = "default"; | |
841 | pinctrl-0 = <&pinctrl_i2c_bitbang>; | |
842 | gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ | |
843 | <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ | |
844 | i2c-gpio,sda-open-drain; | |
845 | i2c-gpio,scl-open-drain; | |
846 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
847 | #address-cells = <1>; | |
848 | #size-cells = <0>; | |
849 | status = "disabled"; | |
850 | }; | |
851 | }; |