ARM: kirkwood: Add support for NETGEAR ReadyNAS NV+ v2
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9263.dtsi
CommitLineData
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1/*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
6db64d29 9#include "skeleton.dtsi"
c9d0f317 10#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 11#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 12#include <dt-bindings/gpio/gpio.h>
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13
14/ {
15 model = "Atmel AT91SAM9263 family SoC";
16 compatible = "atmel,at91sam9263";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 gpio4 = &pioE;
29 tcb0 = &tcb0;
05dcd361 30 i2c0 = &i2c0;
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31 ssc0 = &ssc0;
32 ssc1 = &ssc1;
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33 };
34 cpus {
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LP
35 #address-cells = <0>;
36 #size-cells = <0>;
37
38 cpu {
39 compatible = "arm,arm926ej-s";
40 device_type = "cpu";
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41 };
42 };
43
44 memory {
45 reg = <0x20000000 0x08000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 apb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 aic: interrupt-controller@fffff000 {
f8a073ee 61 #interrupt-cells = <3>;
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62 compatible = "atmel,at91rm9200-aic";
63 interrupt-controller;
64 reg = <0xfffff000 0x200>;
c6573943 65 atmel,external-irqs = <30 31>;
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66 };
67
68 pmc: pmc@fffffc00 {
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
71 };
72
73 ramc: ramc@ffffe200 {
74 compatible = "atmel,at91sam9260-sdramc";
75 reg = <0xffffe200 0x200
76 0xffffe800 0x200>;
77 };
78
79 pit: timer@fffffd30 {
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
5e8b3bc3 82 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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83 };
84
85 tcb0: timer@fff7c000 {
86 compatible = "atmel,at91rm9200-tcb";
87 reg = <0xfff7c000 0x100>;
5e8b3bc3 88 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
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89 };
90
91 rstc@fffffd00 {
92 compatible = "atmel,at91sam9260-rstc";
93 reg = <0xfffffd00 0x10>;
94 };
95
96 shdwc@fffffd10 {
97 compatible = "atmel,at91sam9260-shdwc";
98 reg = <0xfffffd10 0x10>;
99 };
100
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101 pinctrl@fffff200 {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 ranges = <0xfffff200 0xfffff200 0xa00>;
106
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107 atmel,mux-mask = <
108 /* A B */
109 0xfffffffb 0xffffe07f /* pioA */
110 0x0007ffff 0x39072fff /* pioB */
111 0xffffffff 0x3ffffff8 /* pioC */
112 0xfffffbff 0xffffffff /* pioD */
113 0xffe00fff 0xfbfcff00 /* pioE */
114 >;
115
116 /* shared pinctrl settings */
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117 dbgu {
118 pinctrl_dbgu: dbgu-0 {
119 atmel,pins =
c9d0f317
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120 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
121 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
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122 };
123 };
124
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125 usart0 {
126 pinctrl_usart0: usart0-0 {
ec6754a7 127 atmel,pins =
c9d0f317
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128 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
129 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
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130 };
131
c58c0c5a 132 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 133 atmel,pins =
c9d0f317 134 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
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135 };
136
137 pinctrl_usart0_cts: usart0_cts-0 {
138 atmel,pins =
c9d0f317 139 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
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140 };
141 };
142
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143 usart1 {
144 pinctrl_usart1: usart1-0 {
ec6754a7 145 atmel,pins =
c9d0f317
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146 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
147 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
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148 };
149
c58c0c5a 150 pinctrl_usart1_rts: usart1_rts-0 {
ec6754a7 151 atmel,pins =
c9d0f317 152 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
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153 };
154
155 pinctrl_usart1_cts: usart1_cts-0 {
156 atmel,pins =
c9d0f317 157 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
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158 };
159 };
160
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161 usart2 {
162 pinctrl_usart2: usart2-0 {
ec6754a7 163 atmel,pins =
c9d0f317
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164 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
165 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
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166 };
167
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168 pinctrl_usart2_rts: usart2_rts-0 {
169 atmel,pins =
c9d0f317 170 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
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171 };
172
173 pinctrl_usart2_cts: usart2_cts-0 {
ec6754a7 174 atmel,pins =
c9d0f317 175 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
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176 };
177 };
5314ec8e 178
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179 nand {
180 pinctrl_nand: nand-0 {
181 atmel,pins =
c9d0f317
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182 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
183 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
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184 };
185 };
186
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187 macb {
188 pinctrl_macb_rmii: macb_rmii-0 {
189 atmel,pins =
c9d0f317
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190 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
191 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
192 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
193 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
194 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
195 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
196 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
197 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
198 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
199 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
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200 };
201
202 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
203 atmel,pins =
c9d0f317
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204 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
205 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
206 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
207 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
208 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
209 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
210 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
211 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
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212 };
213 };
214
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215 mmc0 {
216 pinctrl_mmc0_clk: mmc0_clk-0 {
217 atmel,pins =
c9d0f317 218 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
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219 };
220
221 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
222 atmel,pins =
c9d0f317
JCPV
223 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
224 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
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225 };
226
227 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
228 atmel,pins =
c9d0f317
JCPV
229 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
230 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
231 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
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232 };
233
234 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
235 atmel,pins =
c9d0f317
JCPV
236 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
237 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
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238 };
239
240 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
241 atmel,pins =
c9d0f317
JCPV
242 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
243 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
244 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
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245 };
246 };
247
248 mmc1 {
249 pinctrl_mmc1_clk: mmc1_clk-0 {
250 atmel,pins =
c9d0f317 251 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
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252 };
253
254 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
255 atmel,pins =
c9d0f317
JCPV
256 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
257 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
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258 };
259
260 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
261 atmel,pins =
c9d0f317
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262 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
263 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
264 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
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265 };
266
267 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
268 atmel,pins =
c9d0f317
JCPV
269 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
270 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
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271 };
272
273 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
274 atmel,pins =
c9d0f317
JCPV
275 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
276 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
277 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
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278 };
279 };
280
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281 ssc0 {
282 pinctrl_ssc0_tx: ssc0_tx-0 {
283 atmel,pins =
c9d0f317
JCPV
284 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
285 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
286 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
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287 };
288
289 pinctrl_ssc0_rx: ssc0_rx-0 {
290 atmel,pins =
c9d0f317
JCPV
291 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
292 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
293 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
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294 };
295 };
296
297 ssc1 {
298 pinctrl_ssc1_tx: ssc1_tx-0 {
299 atmel,pins =
c9d0f317
JCPV
300 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
301 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
302 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
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303 };
304
305 pinctrl_ssc1_rx: ssc1_rx-0 {
306 atmel,pins =
c9d0f317
JCPV
307 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
308 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
309 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
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BS
310 };
311 };
312
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313 spi0 {
314 pinctrl_spi0: spi0-0 {
315 atmel,pins =
c9d0f317
JCPV
316 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
317 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
318 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
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WY
319 };
320 };
321
322 spi1 {
323 pinctrl_spi1: spi1-0 {
324 atmel,pins =
c9d0f317
JCPV
325 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
326 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
327 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
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WY
328 };
329 };
330
028633c2
BB
331 tcb0 {
332 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
333 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
334 };
335
336 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
337 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
341 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
342 };
343
344 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
345 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
346 };
347
348 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
349 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
350 };
351
352 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
353 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
354 };
355
356 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
357 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
358 };
359
360 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
361 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
362 };
363
364 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
365 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367 };
368
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JCPV
369 pioA: gpio@fffff200 {
370 compatible = "atmel,at91rm9200-gpio";
371 reg = <0xfffff200 0x200>;
5e8b3bc3 372 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
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JCPV
373 #gpio-cells = <2>;
374 gpio-controller;
375 interrupt-controller;
376 #interrupt-cells = <2>;
377 };
378
379 pioB: gpio@fffff400 {
380 compatible = "atmel,at91rm9200-gpio";
381 reg = <0xfffff400 0x200>;
5e8b3bc3 382 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
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JCPV
383 #gpio-cells = <2>;
384 gpio-controller;
385 interrupt-controller;
386 #interrupt-cells = <2>;
387 };
388
389 pioC: gpio@fffff600 {
390 compatible = "atmel,at91rm9200-gpio";
391 reg = <0xfffff600 0x200>;
5e8b3bc3 392 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
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JCPV
393 #gpio-cells = <2>;
394 gpio-controller;
395 interrupt-controller;
396 #interrupt-cells = <2>;
397 };
398
399 pioD: gpio@fffff800 {
400 compatible = "atmel,at91rm9200-gpio";
401 reg = <0xfffff800 0x200>;
5e8b3bc3 402 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
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JCPV
403 #gpio-cells = <2>;
404 gpio-controller;
405 interrupt-controller;
406 #interrupt-cells = <2>;
407 };
408
409 pioE: gpio@fffffa00 {
410 compatible = "atmel,at91rm9200-gpio";
411 reg = <0xfffffa00 0x200>;
5e8b3bc3 412 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
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JCPV
413 #gpio-cells = <2>;
414 gpio-controller;
415 interrupt-controller;
416 #interrupt-cells = <2>;
5314ec8e 417 };
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418 };
419
420 dbgu: serial@ffffee00 {
421 compatible = "atmel,at91sam9260-usart";
422 reg = <0xffffee00 0x200>;
5e8b3bc3 423 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_dbgu>;
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426 status = "disabled";
427 };
428
429 usart0: serial@fff8c000 {
430 compatible = "atmel,at91sam9260-usart";
431 reg = <0xfff8c000 0x200>;
5e8b3bc3 432 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
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JCPV
433 atmel,use-dma-rx;
434 atmel,use-dma-tx;
ec6754a7 435 pinctrl-names = "default";
9e3129e9 436 pinctrl-0 = <&pinctrl_usart0>;
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437 status = "disabled";
438 };
439
440 usart1: serial@fff90000 {
441 compatible = "atmel,at91sam9260-usart";
442 reg = <0xfff90000 0x200>;
5e8b3bc3 443 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
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JCPV
444 atmel,use-dma-rx;
445 atmel,use-dma-tx;
ec6754a7 446 pinctrl-names = "default";
9e3129e9 447 pinctrl-0 = <&pinctrl_usart1>;
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448 status = "disabled";
449 };
450
451 usart2: serial@fff94000 {
452 compatible = "atmel,at91sam9260-usart";
453 reg = <0xfff94000 0x200>;
5e8b3bc3 454 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
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JCPV
455 atmel,use-dma-rx;
456 atmel,use-dma-tx;
ec6754a7 457 pinctrl-names = "default";
9e3129e9 458 pinctrl-0 = <&pinctrl_usart2>;
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JCPV
459 status = "disabled";
460 };
461
099343c6
BS
462 ssc0: ssc@fff98000 {
463 compatible = "atmel,at91rm9200-ssc";
464 reg = <0xfff98000 0x4000>;
5e8b3bc3 465 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 468 status = "disabled";
099343c6
BS
469 };
470
471 ssc1: ssc@fff9c000 {
472 compatible = "atmel,at91rm9200-ssc";
473 reg = <0xfff9c000 0x4000>;
5e8b3bc3 474 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS
475 pinctrl-names = "default";
476 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 477 status = "disabled";
099343c6
BS
478 };
479
4abb3677
JCPV
480 macb0: ethernet@fffbc000 {
481 compatible = "cdns,at32ap7000-macb", "cdns,macb";
482 reg = <0xfffbc000 0x100>;
5e8b3bc3 483 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_macb_rmii>;
4abb3677
JCPV
486 status = "disabled";
487 };
488
489 usb1: gadget@fff78000 {
490 compatible = "atmel,at91rm9200-udc";
491 reg = <0xfff78000 0x4000>;
5e8b3bc3 492 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
4abb3677
JCPV
493 status = "disabled";
494 };
05dcd361
LD
495
496 i2c0: i2c@fff88000 {
497 compatible = "atmel,at91sam9263-i2c";
498 reg = <0xfff88000 0x100>;
5e8b3bc3 499 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD
500 #address-cells = <1>;
501 #size-cells = <0>;
502 status = "disabled";
503 };
9873137a
LD
504
505 mmc0: mmc@fff80000 {
506 compatible = "atmel,hsmci";
507 reg = <0xfff80000 0x600>;
5e8b3bc3 508 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a
LD
509 #address-cells = <1>;
510 #size-cells = <0>;
511 status = "disabled";
512 };
513
514 mmc1: mmc@fff84000 {
515 compatible = "atmel,hsmci";
516 reg = <0xfff84000 0x600>;
5e8b3bc3 517 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a
LD
518 #address-cells = <1>;
519 #size-cells = <0>;
520 status = "disabled";
521 };
db5b0ae0 522
7492e7ca
FP
523 watchdog@fffffd40 {
524 compatible = "atmel,at91sam9260-wdt";
525 reg = <0xfffffd40 0x10>;
526 status = "disabled";
527 };
d50f88a0
RG
528
529 spi0: spi@fffa4000 {
530 #address-cells = <1>;
531 #size-cells = <0>;
532 compatible = "atmel,at91rm9200-spi";
533 reg = <0xfffa4000 0x200>;
5e8b3bc3 534 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY
535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG
537 status = "disabled";
538 };
539
540 spi1: spi@fffa8000 {
541 #address-cells = <1>;
542 #size-cells = <0>;
543 compatible = "atmel,at91rm9200-spi";
544 reg = <0xfffa8000 0x200>;
5e8b3bc3 545 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG
548 status = "disabled";
549 };
4abb3677
JCPV
550 };
551
552 nand0: nand@40000000 {
553 compatible = "atmel,at91rm9200-nand";
554 #address-cells = <1>;
555 #size-cells = <1>;
556 reg = <0x40000000 0x10000000
557 0xffffe000 0x200
558 >;
559 atmel,nand-addr-offset = <21>;
560 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV
563 gpios = <&pioA 22 GPIO_ACTIVE_HIGH
564 &pioD 15 GPIO_ACTIVE_HIGH
4abb3677
JCPV
565 0
566 >;
567 status = "disabled";
568 };
569
570 usb0: ohci@00a00000 {
571 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
572 reg = <0x00a00000 0x100000>;
5e8b3bc3 573 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
4abb3677
JCPV
574 status = "disabled";
575 };
576 };
577
578 i2c@0 {
579 compatible = "i2c-gpio";
92f8629b
JCPV
580 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
581 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
4abb3677
JCPV
582 >;
583 i2c-gpio,sda-open-drain;
584 i2c-gpio,scl-open-drain;
585 i2c-gpio,delay-us = <2>; /* ~100 kHz */
586 #address-cells = <1>;
587 #size-cells = <0>;
588 status = "disabled";
589 };
590};
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