[deliverable/linux.git] / arch / arm / boot / dts / at91sam9263.dtsi

/*
 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
 *
 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 only.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9263 family SoC";
	compatible = "atmel,at91sam9263";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <30 31>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			ramc: ramc@ffffe200 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe200 0x200
				       0xffffe800 0x200>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <19 4 0>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

				atmel,mux-mask = <
				      /*    A         B     */
				       0xfffffffb 0xffffe07f  /* pioA */
				       0x0007ffff 0x39072fff  /* pioB */
				       0xffffffff 0x3ffffff8  /* pioC */
				       0xfffffbff 0xffffffff  /* pioD */
				       0xffe00fff 0xfbfcff00  /* pioE */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<2 30 0x1 0x0	/* PC30 periph A */
							 2 31 0x1 0x1>;	/* PC31 periph with pullup */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<0 26 0x1 0x1	/* PA26 periph A with pullup */
							 0 27 0x1 0x0>;	/* PA27 periph A */
					};

					pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
						atmel,pins =
							<0 28 0x1 0x0	/* PA28 periph A */
							 0 29 0x1 0x0>;	/* PA29 periph A */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<3 0 0x1 0x1	/* PD0 periph A with pullup */
							 3 1 0x1 0x0>;	/* PD1 periph A */
					};

					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
						atmel,pins =
							<3 7 0x2 0x0	/* PD7 periph B */
							 3 8 0x2 0x0>;	/* PD8 periph B */
					};
				};

				uart2 {
					pinctrl_uart2: uart2-0 {
						atmel,pins =
							<3 2 0x1 0x1	/* PD2 periph A with pullup */
							 3 3 0x1 0x0>;	/* PD3 periph A */
					};

					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
						atmel,pins =
							<3 5 0x2 0x0	/* PD5 periph B */
							 4 6 0x2 0x0>;	/* PD6 periph B */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<0 22 0x0 0x1	/* PA22 gpio RDY pin pull_up*/
							 3 15 0x0 0x1>;	/* PD15 gpio enable pin pull_up */
					};
				};

				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart0>;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1>;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart2>;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <21 4 3>;
				status = "disabled";
			};

			usb1: gadget@fff78000 {
				compatible = "atmel,at91rm9200-udc";
				reg = <0xfff78000 0x4000>;
				interrupts = <24 4 2>;
				status = "disabled";
			};

			i2c0: i2c@fff88000 {
				compatible = "atmel,at91sam9263-i2c";
				reg = <0xfff88000 0x100>;
				interrupts = <13 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe000 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioA 22 0
				 &pioD 15 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00a00000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00a00000 0x100000>;
			interrupts = <29 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
4abb3677 JCPV	1	/*
	2	* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
	3	*
	4	* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	5	*
	6	* Licensed under GPLv2 only.
	7	*/
	8
	9	/include/ "skeleton.dtsi"
	10
	11	/ {
	12	model = "Atmel AT91SAM9263 family SoC";
	13	compatible = "atmel,at91sam9263";
	14	interrupt-parent = <&aic>;
	15
	16	aliases {
	17	serial0 = &dbgu;
	18	serial1 = &usart0;
	19	serial2 = &usart1;
	20	serial3 = &usart2;
	21	gpio0 = &pioA;
	22	gpio1 = &pioB;
	23	gpio2 = &pioC;
	24	gpio3 = &pioD;
	25	gpio4 = &pioE;
	26	tcb0 = &tcb0;
05dcd361	27	i2c0 = &i2c0;
4abb3677 JCPV	28	};
	29	cpus {
	30	cpu@0 {
	31	compatible = "arm,arm926ejs";
	32	};
	33	};
	34
	35	memory {
	36	reg = <0x20000000 0x08000000>;
	37	};
	38
	39	ahb {
	40	compatible = "simple-bus";
	41	#address-cells = <1>;
	42	#size-cells = <1>;
	43	ranges;
	44
	45	apb {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	ranges;
	50
	51	aic: interrupt-controller@fffff000 {
f8a073ee	52	#interrupt-cells = <3>;
4abb3677 JCPV	53	compatible = "atmel,at91rm9200-aic";
	54	interrupt-controller;
	55	reg = <0xfffff000 0x200>;
c6573943	56	atmel,external-irqs = <30 31>;
4abb3677 JCPV	57	};
	58
	59	pmc: pmc@fffffc00 {
	60	compatible = "atmel,at91rm9200-pmc";
	61	reg = <0xfffffc00 0x100>;
	62	};
	63
	64	ramc: ramc@ffffe200 {
	65	compatible = "atmel,at91sam9260-sdramc";
	66	reg = <0xffffe200 0x200
	67	0xffffe800 0x200>;
	68	};
	69
	70	pit: timer@fffffd30 {
	71	compatible = "atmel,at91sam9260-pit";
	72	reg = <0xfffffd30 0xf>;
f8a073ee	73	interrupts = <1 4 7>;
4abb3677 JCPV	74	};
	75
	76	tcb0: timer@fff7c000 {
	77	compatible = "atmel,at91rm9200-tcb";
	78	reg = <0xfff7c000 0x100>;
f8a073ee	79	interrupts = <19 4 0>;
4abb3677 JCPV	80	};
	81
	82	rstc@fffffd00 {
	83	compatible = "atmel,at91sam9260-rstc";
	84	reg = <0xfffffd00 0x10>;
	85	};
	86
	87	shdwc@fffffd10 {
	88	compatible = "atmel,at91sam9260-shdwc";
	89	reg = <0xfffffd10 0x10>;
	90	};
	91
e4541ff2 JCPV	92	pinctrl@fffff200 {
	93	#address-cells = <1>;
	94	#size-cells = <1>;
	95	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
	96	ranges = <0xfffff200 0xfffff200 0xa00>;
	97
5314ec8e JCPV	98	atmel,mux-mask = <
	99	/* A B */
	100	0xfffffffb 0xffffe07f /* pioA */
	101	0x0007ffff 0x39072fff /* pioB */
	102	0xffffffff 0x3ffffff8 /* pioC */
	103	0xfffffbff 0xffffffff /* pioD */
	104	0xffe00fff 0xfbfcff00 /* pioE */
	105	>;
	106
	107	/* shared pinctrl settings */
ec6754a7 JCPV	108	dbgu {
	109	pinctrl_dbgu: dbgu-0 {
	110	atmel,pins =
	111	<2 30 0x1 0x0 /* PC30 periph A */
	112	2 31 0x1 0x1>; /* PC31 periph with pullup */
	113	};
	114	};
	115
	116	uart0 {
	117	pinctrl_uart0: uart0-0 {
	118	atmel,pins =
	119	<0 26 0x1 0x1 /* PA26 periph A with pullup */
	120	0 27 0x1 0x0>; /* PA27 periph A */
	121	};
	122
	123	pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
	124	atmel,pins =
	125	<0 28 0x1 0x0 /* PA28 periph A */
	126	0 29 0x1 0x0>; /* PA29 periph A */
	127	};
	128	};
	129
	130	uart1 {
	131	pinctrl_uart1: uart1-0 {
	132	atmel,pins =
	133	<3 0 0x1 0x1 /* PD0 periph A with pullup */
	134	3 1 0x1 0x0>; /* PD1 periph A */
	135	};
	136
	137	pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
	138	atmel,pins =
	139	<3 7 0x2 0x0 /* PD7 periph B */
	140	3 8 0x2 0x0>; /* PD8 periph B */
	141	};
	142	};
	143
	144	uart2 {
	145	pinctrl_uart2: uart2-0 {
	146	atmel,pins =
	147	<3 2 0x1 0x1 /* PD2 periph A with pullup */
	148	3 3 0x1 0x0>; /* PD3 periph A */
	149	};
	150
	151	pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
	152	atmel,pins =
	153	<3 5 0x2 0x0 /* PD5 periph B */
	154	4 6 0x2 0x0>; /* PD6 periph B */
	155	};
	156	};
5314ec8e	157
7a38d450 JCPV	158	nand {
	159	pinctrl_nand: nand-0 {
	160	atmel,pins =
	161	<0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
	162	3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
	163	};
	164	};
	165
e4541ff2 JCPV	166	pioA: gpio@fffff200 {
	167	compatible = "atmel,at91rm9200-gpio";
	168	reg = <0xfffff200 0x200>;
	169	interrupts = <2 4 1>;
	170	#gpio-cells = <2>;
	171	gpio-controller;
	172	interrupt-controller;
	173	#interrupt-cells = <2>;
	174	};
	175
	176	pioB: gpio@fffff400 {
	177	compatible = "atmel,at91rm9200-gpio";
	178	reg = <0xfffff400 0x200>;
	179	interrupts = <3 4 1>;
	180	#gpio-cells = <2>;
	181	gpio-controller;
	182	interrupt-controller;
	183	#interrupt-cells = <2>;
	184	};
	185
	186	pioC: gpio@fffff600 {
	187	compatible = "atmel,at91rm9200-gpio";
	188	reg = <0xfffff600 0x200>;
	189	interrupts = <4 4 1>;
	190	#gpio-cells = <2>;
	191	gpio-controller;
	192	interrupt-controller;
	193	#interrupt-cells = <2>;
	194	};
	195
	196	pioD: gpio@fffff800 {
	197	compatible = "atmel,at91rm9200-gpio";
	198	reg = <0xfffff800 0x200>;
	199	interrupts = <4 4 1>;
	200	#gpio-cells = <2>;
	201	gpio-controller;
	202	interrupt-controller;
	203	#interrupt-cells = <2>;
	204	};
	205
	206	pioE: gpio@fffffa00 {
	207	compatible = "atmel,at91rm9200-gpio";
	208	reg = <0xfffffa00 0x200>;
	209	interrupts = <4 4 1>;
	210	#gpio-cells = <2>;
	211	gpio-controller;
	212	interrupt-controller;
	213	#interrupt-cells = <2>;
5314ec8e	214	};
4abb3677 JCPV	215	};
	216
	217	dbgu: serial@ffffee00 {
	218	compatible = "atmel,at91sam9260-usart";
	219	reg = <0xffffee00 0x200>;
f8a073ee	220	interrupts = <1 4 7>;
ec6754a7 JCPV	221	pinctrl-names = "default";
ec6754a7 JCPV	222	pinctrl-0 = <&pinctrl_dbgu>;
4abb3677 JCPV	223	status = "disabled";
	224	};
	225
	226	usart0: serial@fff8c000 {
	227	compatible = "atmel,at91sam9260-usart";
	228	reg = <0xfff8c000 0x200>;
f8a073ee	229	interrupts = <7 4 5>;
4abb3677 JCPV	230	atmel,use-dma-rx;
4abb3677 JCPV	231	atmel,use-dma-tx;
ec6754a7 JCPV	232	pinctrl-names = "default";
ec6754a7 JCPV	233	pinctrl-0 = <&pinctrl_uart0>;
4abb3677 JCPV	234	status = "disabled";
	235	};
	236
	237	usart1: serial@fff90000 {
	238	compatible = "atmel,at91sam9260-usart";
	239	reg = <0xfff90000 0x200>;
f8a073ee	240	interrupts = <8 4 5>;
4abb3677 JCPV	241	atmel,use-dma-rx;
4abb3677 JCPV	242	atmel,use-dma-tx;
ec6754a7 JCPV	243	pinctrl-names = "default";
ec6754a7 JCPV	244	pinctrl-0 = <&pinctrl_uart1>;
4abb3677 JCPV	245	status = "disabled";
	246	};
	247
	248	usart2: serial@fff94000 {
	249	compatible = "atmel,at91sam9260-usart";
	250	reg = <0xfff94000 0x200>;
f8a073ee	251	interrupts = <9 4 5>;
4abb3677 JCPV	252	atmel,use-dma-rx;
4abb3677 JCPV	253	atmel,use-dma-tx;
ec6754a7 JCPV	254	pinctrl-names = "default";
ec6754a7 JCPV	255	pinctrl-0 = <&pinctrl_uart2>;
4abb3677 JCPV	256	status = "disabled";
	257	};
	258
	259	macb0: ethernet@fffbc000 {
	260	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	261	reg = <0xfffbc000 0x100>;
f8a073ee	262	interrupts = <21 4 3>;
4abb3677 JCPV	263	status = "disabled";
	264	};
	265
	266	usb1: gadget@fff78000 {
	267	compatible = "atmel,at91rm9200-udc";
	268	reg = <0xfff78000 0x4000>;
f8a073ee	269	interrupts = <24 4 2>;
4abb3677 JCPV	270	status = "disabled";
4abb3677 JCPV	271	};
05dcd361 LD	272
	273	i2c0: i2c@fff88000 {
	274	compatible = "atmel,at91sam9263-i2c";
	275	reg = <0xfff88000 0x100>;
	276	interrupts = <13 4 6>;
	277	#address-cells = <1>;
	278	#size-cells = <0>;
	279	status = "disabled";
	280	};
4abb3677 JCPV	281	};
	282
	283	nand0: nand@40000000 {
	284	compatible = "atmel,at91rm9200-nand";
	285	#address-cells = <1>;
	286	#size-cells = <1>;
	287	reg = <0x40000000 0x10000000
	288	0xffffe000 0x200
	289	>;
	290	atmel,nand-addr-offset = <21>;
	291	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	292	pinctrl-names = "default";
7a38d450 JCPV	293	pinctrl-0 = <&pinctrl_nand>;
4abb3677 JCPV	294	gpios = <&pioA 22 0
	295	&pioD 15 0
	296	0
	297	>;
	298	status = "disabled";
	299	};
	300
	301	usb0: ohci@00a00000 {
	302	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	303	reg = <0x00a00000 0x100000>;
f8a073ee	304	interrupts = <29 4 2>;
4abb3677 JCPV	305	status = "disabled";
	306	};
	307	};
	308
	309	i2c@0 {
	310	compatible = "i2c-gpio";
	311	gpios = <&pioB 4 0 /* sda */
	312	&pioB 5 0 /* scl */
	313	>;
	314	i2c-gpio,sda-open-drain;
	315	i2c-gpio,scl-open-drain;
	316	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	317	#address-cells = <1>;
	318	#size-cells = <0>;
	319	status = "disabled";
	320	};
	321	};