Commit | Line | Data |
---|---|---|
49fe2ba3 NF |
1 | /* |
2 | * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC | |
3 | * applies to AT91SAM9G45, AT91SAM9M10, | |
4 | * AT91SAM9G46, AT91SAM9M11 SoC | |
5 | * | |
6 | * Copyright (C) 2011 Atmel, | |
7 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> | |
8 | * | |
9 | * Licensed under GPLv2 or later. | |
10 | */ | |
11 | ||
6db64d29 | 12 | #include "skeleton.dtsi" |
d4ae89c8 | 13 | #include <dt-bindings/dma/at91.h> |
c9d0f317 | 14 | #include <dt-bindings/pinctrl/at91.h> |
5e8b3bc3 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
92f8629b | 16 | #include <dt-bindings/gpio/gpio.h> |
49fe2ba3 NF |
17 | |
18 | / { | |
19 | model = "Atmel AT91SAM9G45 family SoC"; | |
20 | compatible = "atmel,at91sam9g45"; | |
21 | interrupt-parent = <&aic>; | |
22 | ||
23 | aliases { | |
24 | serial0 = &dbgu; | |
25 | serial1 = &usart0; | |
26 | serial2 = &usart1; | |
27 | serial3 = &usart2; | |
28 | serial4 = &usart3; | |
21f81872 NF |
29 | gpio0 = &pioA; |
30 | gpio1 = &pioB; | |
31 | gpio2 = &pioC; | |
32 | gpio3 = &pioD; | |
33 | gpio4 = &pioE; | |
3a61a5da NF |
34 | tcb0 = &tcb0; |
35 | tcb1 = &tcb1; | |
05dcd361 LD |
36 | i2c0 = &i2c0; |
37 | i2c1 = &i2c1; | |
099343c6 BS |
38 | ssc0 = &ssc0; |
39 | ssc1 = &ssc1; | |
f3ab0527 | 40 | pwm0 = &pwm0; |
49fe2ba3 NF |
41 | }; |
42 | cpus { | |
e757a6ee LP |
43 | #address-cells = <0>; |
44 | #size-cells = <0>; | |
45 | ||
46 | cpu { | |
47 | compatible = "arm,arm926ej-s"; | |
48 | device_type = "cpu"; | |
49fe2ba3 NF |
49 | }; |
50 | }; | |
51 | ||
dcce6ce8 | 52 | memory { |
49fe2ba3 NF |
53 | reg = <0x70000000 0x10000000>; |
54 | }; | |
55 | ||
56 | ahb { | |
57 | compatible = "simple-bus"; | |
58 | #address-cells = <1>; | |
59 | #size-cells = <1>; | |
60 | ranges; | |
61 | ||
62 | apb { | |
63 | compatible = "simple-bus"; | |
64 | #address-cells = <1>; | |
65 | #size-cells = <1>; | |
66 | ranges; | |
67 | ||
68 | aic: interrupt-controller@fffff000 { | |
f8a073ee | 69 | #interrupt-cells = <3>; |
49fe2ba3 NF |
70 | compatible = "atmel,at91rm9200-aic"; |
71 | interrupt-controller; | |
49fe2ba3 | 72 | reg = <0xfffff000 0x200>; |
c6573943 | 73 | atmel,external-irqs = <31>; |
49fe2ba3 NF |
74 | }; |
75 | ||
a7776ec6 JCPV |
76 | ramc0: ramc@ffffe400 { |
77 | compatible = "atmel,at91sam9g45-ddramc"; | |
78 | reg = <0xffffe400 0x200 | |
79 | 0xffffe600 0x200>; | |
80 | }; | |
81 | ||
eb5e76ff JCPV |
82 | pmc: pmc@fffffc00 { |
83 | compatible = "atmel,at91rm9200-pmc"; | |
84 | reg = <0xfffffc00 0x100>; | |
85 | }; | |
86 | ||
c8082d34 JCPV |
87 | rstc@fffffd00 { |
88 | compatible = "atmel,at91sam9g45-rstc"; | |
89 | reg = <0xfffffd00 0x10>; | |
90 | }; | |
91 | ||
23fa648f JCPV |
92 | pit: timer@fffffd30 { |
93 | compatible = "atmel,at91sam9260-pit"; | |
94 | reg = <0xfffffd30 0xf>; | |
5e8b3bc3 | 95 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
23fa648f JCPV |
96 | }; |
97 | ||
3a61a5da | 98 | |
82015c4e JCPV |
99 | shdwc@fffffd10 { |
100 | compatible = "atmel,at91sam9rl-shdwc"; | |
101 | reg = <0xfffffd10 0x10>; | |
102 | }; | |
103 | ||
3a61a5da NF |
104 | tcb0: timer@fff7c000 { |
105 | compatible = "atmel,at91rm9200-tcb"; | |
106 | reg = <0xfff7c000 0x100>; | |
5e8b3bc3 | 107 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
3a61a5da NF |
108 | }; |
109 | ||
110 | tcb1: timer@fffd4000 { | |
111 | compatible = "atmel,at91rm9200-tcb"; | |
112 | reg = <0xfffd4000 0x100>; | |
5e8b3bc3 | 113 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
3a61a5da NF |
114 | }; |
115 | ||
49fe2ba3 NF |
116 | dma: dma-controller@ffffec00 { |
117 | compatible = "atmel,at91sam9g45-dma"; | |
118 | reg = <0xffffec00 0x200>; | |
5e8b3bc3 | 119 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
980ce7d9 | 120 | #dma-cells = <2>; |
49fe2ba3 NF |
121 | }; |
122 | ||
e4541ff2 JCPV |
123 | pinctrl@fffff200 { |
124 | #address-cells = <1>; | |
125 | #size-cells = <1>; | |
126 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
127 | ranges = <0xfffff200 0xfffff200 0xa00>; | |
128 | ||
5314ec8e JCPV |
129 | atmel,mux-mask = < |
130 | /* A B */ | |
131 | 0xffffffff 0xffc003ff /* pioA */ | |
132 | 0xffffffff 0x800f8f00 /* pioB */ | |
133 | 0xffffffff 0x00000e00 /* pioC */ | |
134 | 0xffffffff 0xff0c1381 /* pioD */ | |
135 | 0xffffffff 0x81ffff81 /* pioE */ | |
136 | >; | |
137 | ||
138 | /* shared pinctrl settings */ | |
ec6754a7 JCPV |
139 | dbgu { |
140 | pinctrl_dbgu: dbgu-0 { | |
141 | atmel,pins = | |
c9d0f317 JCPV |
142 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ |
143 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ | |
ec6754a7 JCPV |
144 | }; |
145 | }; | |
146 | ||
cd127e1d LD |
147 | i2c0 { |
148 | pinctrl_i2c0: i2c0-0 { | |
149 | atmel,pins = | |
150 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */ | |
151 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */ | |
152 | }; | |
153 | }; | |
154 | ||
155 | i2c1 { | |
156 | pinctrl_i2c1: i2c1-0 { | |
157 | atmel,pins = | |
158 | <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */ | |
159 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */ | |
160 | }; | |
161 | }; | |
162 | ||
9e3129e9 JCPV |
163 | usart0 { |
164 | pinctrl_usart0: usart0-0 { | |
ec6754a7 | 165 | atmel,pins = |
c9d0f317 JCPV |
166 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */ |
167 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ | |
ec6754a7 JCPV |
168 | }; |
169 | ||
c58c0c5a | 170 | pinctrl_usart0_rts: usart0_rts-0 { |
ec6754a7 | 171 | atmel,pins = |
c9d0f317 | 172 | <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ |
c58c0c5a JCPV |
173 | }; |
174 | ||
175 | pinctrl_usart0_cts: usart0_cts-0 { | |
176 | atmel,pins = | |
c9d0f317 | 177 | <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ |
ec6754a7 JCPV |
178 | }; |
179 | }; | |
180 | ||
181 | uart1 { | |
9e3129e9 | 182 | pinctrl_usart1: usart1-0 { |
ec6754a7 | 183 | atmel,pins = |
c9d0f317 JCPV |
184 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */ |
185 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ | |
ec6754a7 JCPV |
186 | }; |
187 | ||
c58c0c5a JCPV |
188 | pinctrl_usart1_rts: usart1_rts-0 { |
189 | atmel,pins = | |
c9d0f317 | 190 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ |
c58c0c5a JCPV |
191 | }; |
192 | ||
193 | pinctrl_usart1_cts: usart1_cts-0 { | |
ec6754a7 | 194 | atmel,pins = |
c9d0f317 | 195 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ |
ec6754a7 JCPV |
196 | }; |
197 | }; | |
198 | ||
9e3129e9 JCPV |
199 | usart2 { |
200 | pinctrl_usart2: usart2-0 { | |
ec6754a7 | 201 | atmel,pins = |
c9d0f317 JCPV |
202 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
203 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ | |
ec6754a7 JCPV |
204 | }; |
205 | ||
c58c0c5a | 206 | pinctrl_usart2_rts: usart2_rts-0 { |
ec6754a7 | 207 | atmel,pins = |
c9d0f317 | 208 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ |
c58c0c5a JCPV |
209 | }; |
210 | ||
211 | pinctrl_usart2_cts: usart2_cts-0 { | |
212 | atmel,pins = | |
c9d0f317 | 213 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ |
ec6754a7 JCPV |
214 | }; |
215 | }; | |
216 | ||
9e3129e9 JCPV |
217 | usart3 { |
218 | pinctrl_usart3: usart3-0 { | |
ec6754a7 | 219 | atmel,pins = |
c9d0f317 JCPV |
220 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */ |
221 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ | |
ec6754a7 JCPV |
222 | }; |
223 | ||
c58c0c5a JCPV |
224 | pinctrl_usart3_rts: usart3_rts-0 { |
225 | atmel,pins = | |
c9d0f317 | 226 | <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ |
c58c0c5a JCPV |
227 | }; |
228 | ||
229 | pinctrl_usart3_cts: usart3_cts-0 { | |
ec6754a7 | 230 | atmel,pins = |
c9d0f317 | 231 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ |
ec6754a7 JCPV |
232 | }; |
233 | }; | |
5314ec8e | 234 | |
7a38d450 JCPV |
235 | nand { |
236 | pinctrl_nand: nand-0 { | |
237 | atmel,pins = | |
c9d0f317 JCPV |
238 | <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/ |
239 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ | |
7a38d450 JCPV |
240 | }; |
241 | }; | |
242 | ||
d9b4fe83 JCPV |
243 | macb { |
244 | pinctrl_macb_rmii: macb_rmii-0 { | |
245 | atmel,pins = | |
c9d0f317 JCPV |
246 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ |
247 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ | |
248 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ | |
249 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ | |
250 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ | |
251 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ | |
252 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ | |
253 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ | |
254 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ | |
255 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ | |
d9b4fe83 JCPV |
256 | }; |
257 | ||
258 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | |
259 | atmel,pins = | |
c9d0f317 JCPV |
260 | <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ |
261 | AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ | |
262 | AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ | |
263 | AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ | |
264 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ | |
265 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
266 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ | |
267 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ | |
d9b4fe83 JCPV |
268 | }; |
269 | }; | |
270 | ||
d4fe9ac7 JCPV |
271 | mmc0 { |
272 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | |
273 | atmel,pins = | |
c9d0f317 JCPV |
274 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ |
275 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ | |
276 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ | |
d4fe9ac7 JCPV |
277 | }; |
278 | ||
279 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
280 | atmel,pins = | |
c9d0f317 JCPV |
281 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ |
282 | AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ | |
283 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ | |
d4fe9ac7 JCPV |
284 | }; |
285 | ||
286 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { | |
287 | atmel,pins = | |
c9d0f317 JCPV |
288 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ |
289 | AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ | |
290 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ | |
291 | AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ | |
d4fe9ac7 JCPV |
292 | }; |
293 | }; | |
294 | ||
295 | mmc1 { | |
296 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | |
297 | atmel,pins = | |
c9d0f317 JCPV |
298 | <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ |
299 | AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ | |
300 | AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ | |
d4fe9ac7 JCPV |
301 | }; |
302 | ||
303 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
304 | atmel,pins = | |
c9d0f317 JCPV |
305 | <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ |
306 | AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ | |
307 | AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ | |
d4fe9ac7 JCPV |
308 | }; |
309 | ||
310 | pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { | |
311 | atmel,pins = | |
c9d0f317 JCPV |
312 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ |
313 | AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ | |
314 | AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ | |
315 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ | |
d4fe9ac7 JCPV |
316 | }; |
317 | }; | |
318 | ||
544ae6b2 BS |
319 | ssc0 { |
320 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
321 | atmel,pins = | |
c9d0f317 JCPV |
322 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ |
323 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ | |
324 | AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ | |
544ae6b2 BS |
325 | }; |
326 | ||
327 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
328 | atmel,pins = | |
c9d0f317 JCPV |
329 | <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ |
330 | AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ | |
331 | AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ | |
544ae6b2 BS |
332 | }; |
333 | }; | |
334 | ||
335 | ssc1 { | |
336 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
337 | atmel,pins = | |
c9d0f317 JCPV |
338 | <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ |
339 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ | |
340 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ | |
544ae6b2 BS |
341 | }; |
342 | ||
343 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
344 | atmel,pins = | |
c9d0f317 JCPV |
345 | <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ |
346 | AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ | |
347 | AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ | |
544ae6b2 BS |
348 | }; |
349 | }; | |
350 | ||
a68b728f WY |
351 | spi0 { |
352 | pinctrl_spi0: spi0-0 { | |
353 | atmel,pins = | |
c9d0f317 JCPV |
354 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ |
355 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ | |
356 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ | |
a68b728f WY |
357 | }; |
358 | }; | |
359 | ||
360 | spi1 { | |
361 | pinctrl_spi1: spi1-0 { | |
362 | atmel,pins = | |
c9d0f317 JCPV |
363 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ |
364 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ | |
365 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ | |
a68b728f WY |
366 | }; |
367 | }; | |
368 | ||
028633c2 BB |
369 | tcb0 { |
370 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
371 | atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
372 | }; | |
373 | ||
374 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
375 | atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
376 | }; | |
377 | ||
378 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
379 | atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
380 | }; | |
381 | ||
382 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
383 | atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
384 | }; | |
385 | ||
386 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
387 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
388 | }; | |
389 | ||
390 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
391 | atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
392 | }; | |
393 | ||
394 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
395 | atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
396 | }; | |
397 | ||
398 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
399 | atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
400 | }; | |
401 | ||
402 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
403 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
404 | }; | |
405 | }; | |
406 | ||
407 | tcb1 { | |
408 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | |
409 | atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
410 | }; | |
411 | ||
412 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | |
413 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
414 | }; | |
415 | ||
416 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | |
417 | atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
418 | }; | |
419 | ||
420 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | |
421 | atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
422 | }; | |
423 | ||
424 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | |
425 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
426 | }; | |
427 | ||
428 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | |
429 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
430 | }; | |
431 | ||
432 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | |
433 | atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
434 | }; | |
435 | ||
436 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | |
437 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
438 | }; | |
439 | ||
440 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | |
441 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
442 | }; | |
443 | }; | |
444 | ||
ddee65b3 JCPV |
445 | fb { |
446 | pinctrl_fb: fb-0 { | |
447 | atmel,pins = | |
448 | <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */ | |
449 | AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */ | |
450 | AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */ | |
451 | AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */ | |
452 | AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */ | |
453 | AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */ | |
454 | AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */ | |
455 | AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */ | |
456 | AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */ | |
457 | AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */ | |
458 | AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */ | |
459 | AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */ | |
460 | AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */ | |
461 | AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */ | |
462 | AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */ | |
463 | AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */ | |
464 | AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */ | |
465 | AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */ | |
466 | AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */ | |
467 | AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */ | |
468 | AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ | |
469 | AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */ | |
470 | AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ | |
471 | AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ | |
472 | AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ | |
473 | AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ | |
474 | AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ | |
475 | AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ | |
476 | AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ | |
477 | AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ | |
478 | }; | |
479 | }; | |
480 | ||
e4541ff2 JCPV |
481 | pioA: gpio@fffff200 { |
482 | compatible = "atmel,at91rm9200-gpio"; | |
483 | reg = <0xfffff200 0x200>; | |
5e8b3bc3 | 484 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
485 | #gpio-cells = <2>; |
486 | gpio-controller; | |
487 | interrupt-controller; | |
488 | #interrupt-cells = <2>; | |
489 | }; | |
490 | ||
491 | pioB: gpio@fffff400 { | |
492 | compatible = "atmel,at91rm9200-gpio"; | |
493 | reg = <0xfffff400 0x200>; | |
5e8b3bc3 | 494 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
495 | #gpio-cells = <2>; |
496 | gpio-controller; | |
497 | interrupt-controller; | |
498 | #interrupt-cells = <2>; | |
499 | }; | |
500 | ||
501 | pioC: gpio@fffff600 { | |
502 | compatible = "atmel,at91rm9200-gpio"; | |
503 | reg = <0xfffff600 0x200>; | |
5e8b3bc3 | 504 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
505 | #gpio-cells = <2>; |
506 | gpio-controller; | |
507 | interrupt-controller; | |
508 | #interrupt-cells = <2>; | |
509 | }; | |
510 | ||
511 | pioD: gpio@fffff800 { | |
512 | compatible = "atmel,at91rm9200-gpio"; | |
513 | reg = <0xfffff800 0x200>; | |
5e8b3bc3 | 514 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
515 | #gpio-cells = <2>; |
516 | gpio-controller; | |
517 | interrupt-controller; | |
518 | #interrupt-cells = <2>; | |
519 | }; | |
520 | ||
521 | pioE: gpio@fffffa00 { | |
522 | compatible = "atmel,at91rm9200-gpio"; | |
523 | reg = <0xfffffa00 0x200>; | |
5e8b3bc3 | 524 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
525 | #gpio-cells = <2>; |
526 | gpio-controller; | |
527 | interrupt-controller; | |
528 | #interrupt-cells = <2>; | |
529 | }; | |
21f81872 NF |
530 | }; |
531 | ||
49fe2ba3 NF |
532 | dbgu: serial@ffffee00 { |
533 | compatible = "atmel,at91sam9260-usart"; | |
534 | reg = <0xffffee00 0x200>; | |
5e8b3bc3 | 535 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
ec6754a7 JCPV |
536 | pinctrl-names = "default"; |
537 | pinctrl-0 = <&pinctrl_dbgu>; | |
49fe2ba3 NF |
538 | status = "disabled"; |
539 | }; | |
540 | ||
541 | usart0: serial@fff8c000 { | |
542 | compatible = "atmel,at91sam9260-usart"; | |
543 | reg = <0xfff8c000 0x200>; | |
5e8b3bc3 | 544 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
49fe2ba3 NF |
545 | atmel,use-dma-rx; |
546 | atmel,use-dma-tx; | |
ec6754a7 | 547 | pinctrl-names = "default"; |
9e3129e9 | 548 | pinctrl-0 = <&pinctrl_usart0>; |
49fe2ba3 NF |
549 | status = "disabled"; |
550 | }; | |
551 | ||
552 | usart1: serial@fff90000 { | |
553 | compatible = "atmel,at91sam9260-usart"; | |
554 | reg = <0xfff90000 0x200>; | |
5e8b3bc3 | 555 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
49fe2ba3 NF |
556 | atmel,use-dma-rx; |
557 | atmel,use-dma-tx; | |
ec6754a7 | 558 | pinctrl-names = "default"; |
9e3129e9 | 559 | pinctrl-0 = <&pinctrl_usart1>; |
49fe2ba3 NF |
560 | status = "disabled"; |
561 | }; | |
562 | ||
563 | usart2: serial@fff94000 { | |
564 | compatible = "atmel,at91sam9260-usart"; | |
565 | reg = <0xfff94000 0x200>; | |
5e8b3bc3 | 566 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; |
49fe2ba3 NF |
567 | atmel,use-dma-rx; |
568 | atmel,use-dma-tx; | |
ec6754a7 | 569 | pinctrl-names = "default"; |
9e3129e9 | 570 | pinctrl-0 = <&pinctrl_usart2>; |
49fe2ba3 NF |
571 | status = "disabled"; |
572 | }; | |
573 | ||
574 | usart3: serial@fff98000 { | |
575 | compatible = "atmel,at91sam9260-usart"; | |
576 | reg = <0xfff98000 0x200>; | |
5e8b3bc3 | 577 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; |
49fe2ba3 NF |
578 | atmel,use-dma-rx; |
579 | atmel,use-dma-tx; | |
ec6754a7 | 580 | pinctrl-names = "default"; |
9e3129e9 | 581 | pinctrl-0 = <&pinctrl_usart3>; |
49fe2ba3 NF |
582 | status = "disabled"; |
583 | }; | |
0d4f99d8 NF |
584 | |
585 | macb0: ethernet@fffbc000 { | |
586 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
587 | reg = <0xfffbc000 0x100>; | |
5e8b3bc3 | 588 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; |
d9b4fe83 JCPV |
589 | pinctrl-names = "default"; |
590 | pinctrl-0 = <&pinctrl_macb_rmii>; | |
0d4f99d8 NF |
591 | status = "disabled"; |
592 | }; | |
93b298ba | 593 | |
05dcd361 LD |
594 | i2c0: i2c@fff84000 { |
595 | compatible = "atmel,at91sam9g10-i2c"; | |
596 | reg = <0xfff84000 0x100>; | |
5e8b3bc3 | 597 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; |
cd127e1d LD |
598 | pinctrl-names = "default"; |
599 | pinctrl-0 = <&pinctrl_i2c0>; | |
05dcd361 LD |
600 | #address-cells = <1>; |
601 | #size-cells = <0>; | |
602 | status = "disabled"; | |
603 | }; | |
604 | ||
605 | i2c1: i2c@fff88000 { | |
606 | compatible = "atmel,at91sam9g10-i2c"; | |
607 | reg = <0xfff88000 0x100>; | |
5e8b3bc3 | 608 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; |
cd127e1d LD |
609 | pinctrl-names = "default"; |
610 | pinctrl-0 = <&pinctrl_i2c1>; | |
05dcd361 LD |
611 | #address-cells = <1>; |
612 | #size-cells = <0>; | |
613 | status = "disabled"; | |
614 | }; | |
615 | ||
099343c6 BS |
616 | ssc0: ssc@fff9c000 { |
617 | compatible = "atmel,at91sam9g45-ssc"; | |
618 | reg = <0xfff9c000 0x4000>; | |
5e8b3bc3 | 619 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
544ae6b2 BS |
620 | pinctrl-names = "default"; |
621 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
315656bc | 622 | status = "disabled"; |
099343c6 BS |
623 | }; |
624 | ||
625 | ssc1: ssc@fffa0000 { | |
626 | compatible = "atmel,at91sam9g45-ssc"; | |
627 | reg = <0xfffa0000 0x4000>; | |
5e8b3bc3 | 628 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
544ae6b2 BS |
629 | pinctrl-names = "default"; |
630 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
315656bc | 631 | status = "disabled"; |
099343c6 BS |
632 | }; |
633 | ||
93b298ba | 634 | adc0: adc@fffb0000 { |
e1abeb72 AB |
635 | #address-cells = <1>; |
636 | #size-cells = <0>; | |
93b298ba MR |
637 | compatible = "atmel,at91sam9260-adc"; |
638 | reg = <0xfffb0000 0x100>; | |
5e8b3bc3 | 639 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
93b298ba MR |
640 | atmel,adc-use-external-triggers; |
641 | atmel,adc-channels-used = <0xff>; | |
642 | atmel,adc-vref = <3300>; | |
93b298ba | 643 | atmel,adc-startup-time = <40>; |
4b50da65 LD |
644 | atmel,adc-res = <8 10>; |
645 | atmel,adc-res-names = "lowres", "highres"; | |
646 | atmel,adc-use-res = "highres"; | |
93b298ba MR |
647 | |
648 | trigger@0 { | |
e1abeb72 | 649 | reg = <0>; |
93b298ba MR |
650 | trigger-name = "external-rising"; |
651 | trigger-value = <0x1>; | |
652 | trigger-external; | |
653 | }; | |
654 | trigger@1 { | |
e1abeb72 | 655 | reg = <1>; |
93b298ba MR |
656 | trigger-name = "external-falling"; |
657 | trigger-value = <0x2>; | |
658 | trigger-external; | |
659 | }; | |
660 | ||
661 | trigger@2 { | |
e1abeb72 | 662 | reg = <2>; |
93b298ba MR |
663 | trigger-name = "external-any"; |
664 | trigger-value = <0x3>; | |
665 | trigger-external; | |
666 | }; | |
667 | ||
668 | trigger@3 { | |
e1abeb72 | 669 | reg = <3>; |
93b298ba MR |
670 | trigger-name = "continuous"; |
671 | trigger-value = <0x6>; | |
672 | }; | |
673 | }; | |
9873137a | 674 | |
f3ab0527 BS |
675 | pwm0: pwm@fffb8000 { |
676 | compatible = "atmel,at91sam9rl-pwm"; | |
677 | reg = <0xfffb8000 0x300>; | |
678 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
679 | #pwm-cells = <3>; | |
680 | status = "disabled"; | |
681 | }; | |
682 | ||
9873137a LD |
683 | mmc0: mmc@fff80000 { |
684 | compatible = "atmel,hsmci"; | |
685 | reg = <0xfff80000 0x600>; | |
5e8b3bc3 | 686 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; |
0645b93f | 687 | pinctrl-names = "default"; |
d4ae89c8 | 688 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; |
05c1bc97 | 689 | dma-names = "rxtx"; |
9873137a LD |
690 | #address-cells = <1>; |
691 | #size-cells = <0>; | |
692 | status = "disabled"; | |
693 | }; | |
694 | ||
695 | mmc1: mmc@fffd0000 { | |
696 | compatible = "atmel,hsmci"; | |
697 | reg = <0xfffd0000 0x600>; | |
5e8b3bc3 | 698 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; |
0645b93f | 699 | pinctrl-names = "default"; |
d4ae89c8 | 700 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; |
05c1bc97 | 701 | dma-names = "rxtx"; |
9873137a LD |
702 | #address-cells = <1>; |
703 | #size-cells = <0>; | |
704 | status = "disabled"; | |
db5b0ae0 LT |
705 | }; |
706 | ||
7492e7ca FP |
707 | watchdog@fffffd40 { |
708 | compatible = "atmel,at91sam9260-wdt"; | |
709 | reg = <0xfffffd40 0x10>; | |
fe46aa67 BB |
710 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
711 | atmel,watchdog-type = "hardware"; | |
712 | atmel,reset-type = "all"; | |
713 | atmel,dbg-halt; | |
714 | atmel,idle-halt; | |
7492e7ca | 715 | status = "disabled"; |
d50f88a0 RG |
716 | }; |
717 | ||
718 | spi0: spi@fffa4000 { | |
719 | #address-cells = <1>; | |
720 | #size-cells = <0>; | |
721 | compatible = "atmel,at91rm9200-spi"; | |
722 | reg = <0xfffa4000 0x200>; | |
723 | interrupts = <14 4 3>; | |
a68b728f WY |
724 | pinctrl-names = "default"; |
725 | pinctrl-0 = <&pinctrl_spi0>; | |
d50f88a0 RG |
726 | status = "disabled"; |
727 | }; | |
728 | ||
729 | spi1: spi@fffa8000 { | |
730 | #address-cells = <1>; | |
731 | #size-cells = <0>; | |
732 | compatible = "atmel,at91rm9200-spi"; | |
733 | reg = <0xfffa8000 0x200>; | |
734 | interrupts = <15 4 3>; | |
a68b728f WY |
735 | pinctrl-names = "default"; |
736 | pinctrl-0 = <&pinctrl_spi1>; | |
d50f88a0 | 737 | status = "disabled"; |
9873137a | 738 | }; |
3cba498f JCPV |
739 | |
740 | usb2: gadget@fff78000 { | |
741 | #address-cells = <1>; | |
742 | #size-cells = <0>; | |
743 | compatible = "atmel,at91sam9rl-udc"; | |
744 | reg = <0x00600000 0x80000 | |
745 | 0xfff78000 0x400>; | |
746 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; | |
747 | status = "disabled"; | |
748 | ||
749 | ep0 { | |
750 | reg = <0>; | |
751 | atmel,fifo-size = <64>; | |
752 | atmel,nb-banks = <1>; | |
753 | }; | |
754 | ||
755 | ep1 { | |
756 | reg = <1>; | |
757 | atmel,fifo-size = <1024>; | |
758 | atmel,nb-banks = <2>; | |
759 | atmel,can-dma; | |
760 | atmel,can-isoc; | |
761 | }; | |
762 | ||
763 | ep2 { | |
764 | reg = <2>; | |
765 | atmel,fifo-size = <1024>; | |
766 | atmel,nb-banks = <2>; | |
767 | atmel,can-dma; | |
768 | atmel,can-isoc; | |
769 | }; | |
770 | ||
771 | ep3 { | |
772 | reg = <3>; | |
773 | atmel,fifo-size = <1024>; | |
774 | atmel,nb-banks = <3>; | |
775 | atmel,can-dma; | |
776 | }; | |
777 | ||
778 | ep4 { | |
779 | reg = <4>; | |
780 | atmel,fifo-size = <1024>; | |
781 | atmel,nb-banks = <3>; | |
782 | atmel,can-dma; | |
783 | }; | |
784 | ||
785 | ep5 { | |
786 | reg = <5>; | |
787 | atmel,fifo-size = <1024>; | |
788 | atmel,nb-banks = <3>; | |
789 | atmel,can-dma; | |
790 | atmel,can-isoc; | |
791 | }; | |
792 | ||
793 | ep6 { | |
794 | reg = <6>; | |
795 | atmel,fifo-size = <1024>; | |
796 | atmel,nb-banks = <3>; | |
797 | atmel,can-dma; | |
798 | atmel,can-isoc; | |
799 | }; | |
800 | }; | |
49fe2ba3 | 801 | }; |
d6a01661 | 802 | |
ddee65b3 JCPV |
803 | fb0: fb@0x00500000 { |
804 | compatible = "atmel,at91sam9g45-lcdc"; | |
805 | reg = <0x00500000 0x1000>; | |
806 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
807 | pinctrl-names = "default"; | |
808 | pinctrl-0 = <&pinctrl_fb>; | |
809 | status = "disabled"; | |
810 | }; | |
811 | ||
d6a01661 JCPV |
812 | nand0: nand@40000000 { |
813 | compatible = "atmel,at91rm9200-nand"; | |
814 | #address-cells = <1>; | |
815 | #size-cells = <1>; | |
816 | reg = <0x40000000 0x10000000 | |
817 | 0xffffe200 0x200 | |
818 | >; | |
819 | atmel,nand-addr-offset = <21>; | |
820 | atmel,nand-cmd-offset = <22>; | |
e8b2da6e | 821 | atmel,nand-has-dma; |
7a38d450 JCPV |
822 | pinctrl-names = "default"; |
823 | pinctrl-0 = <&pinctrl_nand>; | |
92f8629b JCPV |
824 | gpios = <&pioC 8 GPIO_ACTIVE_HIGH |
825 | &pioC 14 GPIO_ACTIVE_HIGH | |
d6a01661 JCPV |
826 | 0 |
827 | >; | |
828 | status = "disabled"; | |
829 | }; | |
6a062459 JCPV |
830 | |
831 | usb0: ohci@00700000 { | |
832 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
833 | reg = <0x00700000 0x100000>; | |
5e8b3bc3 | 834 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
6a062459 JCPV |
835 | status = "disabled"; |
836 | }; | |
62c5553a JCPV |
837 | |
838 | usb1: ehci@00800000 { | |
839 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
840 | reg = <0x00800000 0x100000>; | |
5e8b3bc3 | 841 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
62c5553a JCPV |
842 | status = "disabled"; |
843 | }; | |
49fe2ba3 | 844 | }; |
8f24bdaa JCPV |
845 | |
846 | i2c@0 { | |
847 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
848 | gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ |
849 | &pioA 21 GPIO_ACTIVE_HIGH /* scl */ | |
8f24bdaa JCPV |
850 | >; |
851 | i2c-gpio,sda-open-drain; | |
852 | i2c-gpio,scl-open-drain; | |
853 | i2c-gpio,delay-us = <5>; /* ~100 kHz */ | |
854 | #address-cells = <1>; | |
855 | #size-cells = <0>; | |
856 | status = "disabled"; | |
857 | }; | |
49fe2ba3 | 858 | }; |