[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi

/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory@70000000 {
		reg = <0x70000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <2>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				interrupt-parent;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200
				       0xffffe600 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4>;
			};


			shdwc@fffffd10 {
				compatible = "atmel,at91sam9rl-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <18 4>;
			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffd4000 0x100>;
				interrupts = <18 4>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <21 4>;
			};

			pioA: gpio@fffff200 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff200 0x100>;
				interrupts = <2 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioB: gpio@fffff400 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff400 0x100>;
				interrupts = <3 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioC: gpio@fffff600 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff600 0x100>;
				interrupts = <4 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioD: gpio@fffff800 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff800 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioE: gpio@fffffa00 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffffa00 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
				interrupts = <10 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <25 4>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe200 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioC 8 0
				 &pioC 14 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00700000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 20 0 /* sda */
			 &pioA 21 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
49fe2ba3 NF	1	/*
	2	* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
	3	* applies to AT91SAM9G45, AT91SAM9M10,
	4	* AT91SAM9G46, AT91SAM9M11 SoC
	5	*
	6	* Copyright (C) 2011 Atmel,
	7	* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9G45 family SoC";
	16	compatible = "atmel,at91sam9g45";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	serial4 = &usart3;
21f81872 NF	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	gpio3 = &pioD;
	29	gpio4 = &pioE;
3a61a5da NF	30	tcb0 = &tcb0;
3a61a5da NF	31	tcb1 = &tcb1;
49fe2ba3 NF	32	};
	33	cpus {
	34	cpu@0 {
	35	compatible = "arm,arm926ejs";
	36	};
	37	};
	38
	39	memory@70000000 {
	40	reg = <0x70000000 0x10000000>;
	41	};
	42
	43	ahb {
	44	compatible = "simple-bus";
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	ranges;
	48
	49	apb {
	50	compatible = "simple-bus";
	51	#address-cells = <1>;
	52	#size-cells = <1>;
	53	ranges;
	54
	55	aic: interrupt-controller@fffff000 {
e261501d	56	#interrupt-cells = <2>;
49fe2ba3 NF	57	compatible = "atmel,at91rm9200-aic";
	58	interrupt-controller;
	59	interrupt-parent;
	60	reg = <0xfffff000 0x200>;
	61	};
	62
a7776ec6 JCPV	63	ramc0: ramc@ffffe400 {
	64	compatible = "atmel,at91sam9g45-ddramc";
	65	reg = <0xffffe400 0x200
	66	0xffffe600 0x200>;
	67	};
	68
eb5e76ff JCPV	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
c8082d34 JCPV	74	rstc@fffffd00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffd00 0x10>;
	77	};
	78
23fa648f JCPV	79	pit: timer@fffffd30 {
	80	compatible = "atmel,at91sam9260-pit";
	81	reg = <0xfffffd30 0xf>;
	82	interrupts = <1 4>;
	83	};
	84
3a61a5da	85
82015c4e JCPV	86	shdwc@fffffd10 {
	87	compatible = "atmel,at91sam9rl-shdwc";
	88	reg = <0xfffffd10 0x10>;
	89	};
	90
3a61a5da NF	91	tcb0: timer@fff7c000 {
	92	compatible = "atmel,at91rm9200-tcb";
	93	reg = <0xfff7c000 0x100>;
	94	interrupts = <18 4>;
	95	};
	96
	97	tcb1: timer@fffd4000 {
	98	compatible = "atmel,at91rm9200-tcb";
	99	reg = <0xfffd4000 0x100>;
	100	interrupts = <18 4>;
	101	};
	102
49fe2ba3 NF	103	dma: dma-controller@ffffec00 {
	104	compatible = "atmel,at91sam9g45-dma";
	105	reg = <0xffffec00 0x200>;
e261501d	106	interrupts = <21 4>;
49fe2ba3 NF	107	};
49fe2ba3 NF	108
21f81872 NF	109	pioA: gpio@fffff200 {
	110	compatible = "atmel,at91rm9200-gpio";
	111	reg = <0xfffff200 0x100>;
	112	interrupts = <2 4>;
	113	#gpio-cells = <2>;
	114	gpio-controller;
	115	interrupt-controller;
	116	};
	117
	118	pioB: gpio@fffff400 {
	119	compatible = "atmel,at91rm9200-gpio";
	120	reg = <0xfffff400 0x100>;
	121	interrupts = <3 4>;
	122	#gpio-cells = <2>;
	123	gpio-controller;
	124	interrupt-controller;
	125	};
	126
	127	pioC: gpio@fffff600 {
	128	compatible = "atmel,at91rm9200-gpio";
	129	reg = <0xfffff600 0x100>;
	130	interrupts = <4 4>;
	131	#gpio-cells = <2>;
	132	gpio-controller;
	133	interrupt-controller;
	134	};
	135
	136	pioD: gpio@fffff800 {
	137	compatible = "atmel,at91rm9200-gpio";
	138	reg = <0xfffff800 0x100>;
	139	interrupts = <5 4>;
	140	#gpio-cells = <2>;
	141	gpio-controller;
	142	interrupt-controller;
	143	};
	144
	145	pioE: gpio@fffffa00 {
	146	compatible = "atmel,at91rm9200-gpio";
	147	reg = <0xfffffa00 0x100>;
	148	interrupts = <5 4>;
	149	#gpio-cells = <2>;
	150	gpio-controller;
	151	interrupt-controller;
	152	};
	153
49fe2ba3 NF	154	dbgu: serial@ffffee00 {
	155	compatible = "atmel,at91sam9260-usart";
	156	reg = <0xffffee00 0x200>;
e261501d	157	interrupts = <1 4>;
49fe2ba3 NF	158	status = "disabled";
	159	};
	160
	161	usart0: serial@fff8c000 {
	162	compatible = "atmel,at91sam9260-usart";
	163	reg = <0xfff8c000 0x200>;
e261501d	164	interrupts = <7 4>;
49fe2ba3 NF	165	atmel,use-dma-rx;
	166	atmel,use-dma-tx;
	167	status = "disabled";
	168	};
	169
	170	usart1: serial@fff90000 {
	171	compatible = "atmel,at91sam9260-usart";
	172	reg = <0xfff90000 0x200>;
e261501d	173	interrupts = <8 4>;
49fe2ba3 NF	174	atmel,use-dma-rx;
	175	atmel,use-dma-tx;
	176	status = "disabled";
	177	};
	178
	179	usart2: serial@fff94000 {
	180	compatible = "atmel,at91sam9260-usart";
	181	reg = <0xfff94000 0x200>;
e261501d	182	interrupts = <9 4>;
49fe2ba3 NF	183	atmel,use-dma-rx;
	184	atmel,use-dma-tx;
	185	status = "disabled";
	186	};
	187
	188	usart3: serial@fff98000 {
	189	compatible = "atmel,at91sam9260-usart";
	190	reg = <0xfff98000 0x200>;
e261501d	191	interrupts = <10 4>;
49fe2ba3 NF	192	atmel,use-dma-rx;
	193	atmel,use-dma-tx;
	194	status = "disabled";
	195	};
0d4f99d8 NF	196
	197	macb0: ethernet@fffbc000 {
	198	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	199	reg = <0xfffbc000 0x100>;
e261501d	200	interrupts = <25 4>;
0d4f99d8 NF	201	status = "disabled";
0d4f99d8 NF	202	};
49fe2ba3	203	};
d6a01661 JCPV	204
	205	nand0: nand@40000000 {
	206	compatible = "atmel,at91rm9200-nand";
	207	#address-cells = <1>;
	208	#size-cells = <1>;
	209	reg = <0x40000000 0x10000000
	210	0xffffe200 0x200
	211	>;
	212	atmel,nand-addr-offset = <21>;
	213	atmel,nand-cmd-offset = <22>;
	214	gpios = <&pioC 8 0
	215	&pioC 14 0
	216	0
	217	>;
	218	status = "disabled";
	219	};
6a062459 JCPV	220
	221	usb0: ohci@00700000 {
	222	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	223	reg = <0x00700000 0x100000>;
	224	interrupts = <22 4>;
	225	status = "disabled";
	226	};
49fe2ba3	227	};
8f24bdaa JCPV	228
	229	i2c@0 {
	230	compatible = "i2c-gpio";
	231	gpios = <&pioA 20 0 /* sda */
	232	&pioA 21 0 /* scl */
	233	>;
	234	i2c-gpio,sda-open-drain;
	235	i2c-gpio,scl-open-drain;
	236	i2c-gpio,delay-us = <5>; /* ~100 kHz */
	237	#address-cells = <1>;
	238	#size-cells = <0>;
	239	status = "disabled";
	240	};
49fe2ba3	241	};