watchdog: at91sam9_wdt: add device tree support
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
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1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
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25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
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30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
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LD
32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
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34 };
35 cpus {
36 cpu@0 {
37 compatible = "arm,arm926ejs";
38 };
39 };
40
dcce6ce8 41 memory {
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42 reg = <0x70000000 0x10000000>;
43 };
44
45 ahb {
46 compatible = "simple-bus";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
50
51 apb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 aic: interrupt-controller@fffff000 {
f8a073ee 58 #interrupt-cells = <3>;
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59 compatible = "atmel,at91rm9200-aic";
60 interrupt-controller;
49fe2ba3 61 reg = <0xfffff000 0x200>;
c6573943 62 atmel,external-irqs = <31>;
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63 };
64
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JCPV
65 ramc0: ramc@ffffe400 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe400 0x200
68 0xffffe600 0x200>;
69 };
70
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JCPV
71 pmc: pmc@fffffc00 {
72 compatible = "atmel,at91rm9200-pmc";
73 reg = <0xfffffc00 0x100>;
74 };
75
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JCPV
76 rstc@fffffd00 {
77 compatible = "atmel,at91sam9g45-rstc";
78 reg = <0xfffffd00 0x10>;
79 };
80
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JCPV
81 pit: timer@fffffd30 {
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
f8a073ee 84 interrupts = <1 4 7>;
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JCPV
85 };
86
3a61a5da 87
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JCPV
88 shdwc@fffffd10 {
89 compatible = "atmel,at91sam9rl-shdwc";
90 reg = <0xfffffd10 0x10>;
91 };
92
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93 tcb0: timer@fff7c000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfff7c000 0x100>;
f8a073ee 96 interrupts = <18 4 0>;
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97 };
98
99 tcb1: timer@fffd4000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfffd4000 0x100>;
f8a073ee 102 interrupts = <18 4 0>;
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103 };
104
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105 dma: dma-controller@ffffec00 {
106 compatible = "atmel,at91sam9g45-dma";
107 reg = <0xffffec00 0x200>;
f8a073ee 108 interrupts = <21 4 0>;
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109 };
110
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111 pioA: gpio@fffff200 {
112 compatible = "atmel,at91rm9200-gpio";
113 reg = <0xfffff200 0x100>;
f8a073ee 114 interrupts = <2 4 1>;
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115 #gpio-cells = <2>;
116 gpio-controller;
117 interrupt-controller;
51ac51a6 118 #interrupt-cells = <2>;
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119 };
120
121 pioB: gpio@fffff400 {
122 compatible = "atmel,at91rm9200-gpio";
123 reg = <0xfffff400 0x100>;
f8a073ee 124 interrupts = <3 4 1>;
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125 #gpio-cells = <2>;
126 gpio-controller;
127 interrupt-controller;
51ac51a6 128 #interrupt-cells = <2>;
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129 };
130
131 pioC: gpio@fffff600 {
132 compatible = "atmel,at91rm9200-gpio";
133 reg = <0xfffff600 0x100>;
f8a073ee 134 interrupts = <4 4 1>;
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135 #gpio-cells = <2>;
136 gpio-controller;
137 interrupt-controller;
51ac51a6 138 #interrupt-cells = <2>;
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139 };
140
141 pioD: gpio@fffff800 {
142 compatible = "atmel,at91rm9200-gpio";
143 reg = <0xfffff800 0x100>;
f8a073ee 144 interrupts = <5 4 1>;
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145 #gpio-cells = <2>;
146 gpio-controller;
147 interrupt-controller;
51ac51a6 148 #interrupt-cells = <2>;
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149 };
150
151 pioE: gpio@fffffa00 {
152 compatible = "atmel,at91rm9200-gpio";
153 reg = <0xfffffa00 0x100>;
f8a073ee 154 interrupts = <5 4 1>;
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155 #gpio-cells = <2>;
156 gpio-controller;
157 interrupt-controller;
51ac51a6 158 #interrupt-cells = <2>;
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159 };
160
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161 dbgu: serial@ffffee00 {
162 compatible = "atmel,at91sam9260-usart";
163 reg = <0xffffee00 0x200>;
f8a073ee 164 interrupts = <1 4 7>;
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165 status = "disabled";
166 };
167
168 usart0: serial@fff8c000 {
169 compatible = "atmel,at91sam9260-usart";
170 reg = <0xfff8c000 0x200>;
f8a073ee 171 interrupts = <7 4 5>;
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172 atmel,use-dma-rx;
173 atmel,use-dma-tx;
174 status = "disabled";
175 };
176
177 usart1: serial@fff90000 {
178 compatible = "atmel,at91sam9260-usart";
179 reg = <0xfff90000 0x200>;
f8a073ee 180 interrupts = <8 4 5>;
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181 atmel,use-dma-rx;
182 atmel,use-dma-tx;
183 status = "disabled";
184 };
185
186 usart2: serial@fff94000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xfff94000 0x200>;
f8a073ee 189 interrupts = <9 4 5>;
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190 atmel,use-dma-rx;
191 atmel,use-dma-tx;
192 status = "disabled";
193 };
194
195 usart3: serial@fff98000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xfff98000 0x200>;
f8a073ee 198 interrupts = <10 4 5>;
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199 atmel,use-dma-rx;
200 atmel,use-dma-tx;
201 status = "disabled";
202 };
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203
204 macb0: ethernet@fffbc000 {
205 compatible = "cdns,at32ap7000-macb", "cdns,macb";
206 reg = <0xfffbc000 0x100>;
f8a073ee 207 interrupts = <25 4 3>;
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208 status = "disabled";
209 };
93b298ba 210
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211 i2c0: i2c@fff84000 {
212 compatible = "atmel,at91sam9g10-i2c";
213 reg = <0xfff84000 0x100>;
214 interrupts = <12 4 6>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 status = "disabled";
218 };
219
220 i2c1: i2c@fff88000 {
221 compatible = "atmel,at91sam9g10-i2c";
222 reg = <0xfff88000 0x100>;
223 interrupts = <13 4 6>;
224 #address-cells = <1>;
225 #size-cells = <0>;
226 status = "disabled";
227 };
228
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229 adc0: adc@fffb0000 {
230 compatible = "atmel,at91sam9260-adc";
231 reg = <0xfffb0000 0x100>;
f8a073ee 232 interrupts = <20 4 0>;
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233 atmel,adc-use-external-triggers;
234 atmel,adc-channels-used = <0xff>;
235 atmel,adc-vref = <3300>;
236 atmel,adc-num-channels = <8>;
237 atmel,adc-startup-time = <40>;
238 atmel,adc-channel-base = <0x30>;
239 atmel,adc-drdy-mask = <0x10000>;
240 atmel,adc-status-register = <0x1c>;
241 atmel,adc-trigger-register = <0x08>;
242
243 trigger@0 {
244 trigger-name = "external-rising";
245 trigger-value = <0x1>;
246 trigger-external;
247 };
248 trigger@1 {
249 trigger-name = "external-falling";
250 trigger-value = <0x2>;
251 trigger-external;
252 };
253
254 trigger@2 {
255 trigger-name = "external-any";
256 trigger-value = <0x3>;
257 trigger-external;
258 };
259
260 trigger@3 {
261 trigger-name = "continuous";
262 trigger-value = <0x6>;
263 };
264 };
49fe2ba3 265 };
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JCPV
266
267 nand0: nand@40000000 {
268 compatible = "atmel,at91rm9200-nand";
269 #address-cells = <1>;
270 #size-cells = <1>;
271 reg = <0x40000000 0x10000000
272 0xffffe200 0x200
273 >;
274 atmel,nand-addr-offset = <21>;
275 atmel,nand-cmd-offset = <22>;
276 gpios = <&pioC 8 0
277 &pioC 14 0
278 0
279 >;
280 status = "disabled";
281 };
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JCPV
282
283 usb0: ohci@00700000 {
284 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
285 reg = <0x00700000 0x100000>;
f8a073ee 286 interrupts = <22 4 2>;
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JCPV
287 status = "disabled";
288 };
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JCPV
289
290 usb1: ehci@00800000 {
291 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
292 reg = <0x00800000 0x100000>;
f8a073ee 293 interrupts = <22 4 2>;
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JCPV
294 status = "disabled";
295 };
49fe2ba3 296 };
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JCPV
297
298 i2c@0 {
299 compatible = "i2c-gpio";
300 gpios = <&pioA 20 0 /* sda */
301 &pioA 21 0 /* scl */
302 >;
303 i2c-gpio,sda-open-drain;
304 i2c-gpio,scl-open-drain;
305 i2c-gpio,delay-us = <5>; /* ~100 kHz */
306 #address-cells = <1>;
307 #size-cells = <0>;
308 status = "disabled";
309 };
49fe2ba3 310};
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