Commit | Line | Data |
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467f1cf5 NF |
1 | /* |
2 | * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC | |
3 | * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, | |
4 | * AT91SAM9X25, AT91SAM9X35 SoC | |
5 | * | |
6 | * Copyright (C) 2012 Atmel, | |
7 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> | |
8 | * | |
9 | * Licensed under GPLv2 or later. | |
10 | */ | |
11 | ||
6db64d29 | 12 | #include "skeleton.dtsi" |
d4ae89c8 | 13 | #include <dt-bindings/dma/at91.h> |
c9d0f317 | 14 | #include <dt-bindings/pinctrl/at91.h> |
5e8b3bc3 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
92f8629b | 16 | #include <dt-bindings/gpio/gpio.h> |
a80d3ec6 | 17 | #include <dt-bindings/clock/at91.h> |
467f1cf5 NF |
18 | |
19 | / { | |
20 | model = "Atmel AT91SAM9x5 family SoC"; | |
21 | compatible = "atmel,at91sam9x5"; | |
22 | interrupt-parent = <&aic>; | |
23 | ||
24 | aliases { | |
25 | serial0 = &dbgu; | |
26 | serial1 = &usart0; | |
27 | serial2 = &usart1; | |
28 | serial3 = &usart2; | |
29 | gpio0 = &pioA; | |
30 | gpio1 = &pioB; | |
31 | gpio2 = &pioC; | |
32 | gpio3 = &pioD; | |
33 | tcb0 = &tcb0; | |
34 | tcb1 = &tcb1; | |
05dcd361 LD |
35 | i2c0 = &i2c0; |
36 | i2c1 = &i2c1; | |
37 | i2c2 = &i2c2; | |
099343c6 | 38 | ssc0 = &ssc0; |
f3ab0527 | 39 | pwm0 = &pwm0; |
467f1cf5 NF |
40 | }; |
41 | cpus { | |
e757a6ee LP |
42 | #address-cells = <0>; |
43 | #size-cells = <0>; | |
44 | ||
45 | cpu { | |
46 | compatible = "arm,arm926ej-s"; | |
47 | device_type = "cpu"; | |
467f1cf5 NF |
48 | }; |
49 | }; | |
50 | ||
dcce6ce8 | 51 | memory { |
467f1cf5 NF |
52 | reg = <0x20000000 0x10000000>; |
53 | }; | |
54 | ||
12dde449 AB |
55 | clocks { |
56 | slow_xtal: slow_xtal { | |
57 | compatible = "fixed-clock"; | |
58 | #clock-cells = <0>; | |
59 | clock-frequency = <0>; | |
60 | }; | |
a80d3ec6 | 61 | |
12dde449 AB |
62 | main_xtal: main_xtal { |
63 | compatible = "fixed-clock"; | |
64 | #clock-cells = <0>; | |
65 | clock-frequency = <0>; | |
66 | }; | |
a80d3ec6 | 67 | |
12dde449 AB |
68 | adc_op_clk: adc_op_clk{ |
69 | compatible = "fixed-clock"; | |
70 | #clock-cells = <0>; | |
7c08d8cd | 71 | clock-frequency = <1000000>; |
12dde449 | 72 | }; |
a80d3ec6 BB |
73 | }; |
74 | ||
f04660e4 AB |
75 | sram: sram@00300000 { |
76 | compatible = "mmio-sram"; | |
77 | reg = <0x00300000 0x8000>; | |
78 | }; | |
79 | ||
467f1cf5 NF |
80 | ahb { |
81 | compatible = "simple-bus"; | |
82 | #address-cells = <1>; | |
83 | #size-cells = <1>; | |
84 | ranges; | |
85 | ||
86 | apb { | |
87 | compatible = "simple-bus"; | |
88 | #address-cells = <1>; | |
89 | #size-cells = <1>; | |
90 | ranges; | |
91 | ||
92 | aic: interrupt-controller@fffff000 { | |
f8a073ee | 93 | #interrupt-cells = <3>; |
467f1cf5 NF |
94 | compatible = "atmel,at91rm9200-aic"; |
95 | interrupt-controller; | |
467f1cf5 | 96 | reg = <0xfffff000 0x200>; |
c6573943 | 97 | atmel,external-irqs = <31>; |
467f1cf5 NF |
98 | }; |
99 | ||
a7776ec6 JCPV |
100 | ramc0: ramc@ffffe800 { |
101 | compatible = "atmel,at91sam9g45-ddramc"; | |
102 | reg = <0xffffe800 0x200>; | |
7e948346 AB |
103 | clocks = <&ddrck>; |
104 | clock-names = "ddrck"; | |
a7776ec6 JCPV |
105 | }; |
106 | ||
eb5e76ff | 107 | pmc: pmc@fffffc00 { |
620f5033 | 108 | compatible = "atmel,at91sam9x5-pmc", "syscon"; |
aab0a4c8 | 109 | reg = <0xfffffc00 0x200>; |
a80d3ec6 BB |
110 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
111 | interrupt-controller; | |
112 | #address-cells = <1>; | |
113 | #size-cells = <0>; | |
114 | #interrupt-cells = <1>; | |
115 | ||
116 | main_rc_osc: main_rc_osc { | |
117 | compatible = "atmel,at91sam9x5-clk-main-rc-osc"; | |
118 | #clock-cells = <0>; | |
119 | interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; | |
120 | clock-frequency = <12000000>; | |
121 | clock-accuracy = <50000000>; | |
122 | }; | |
123 | ||
124 | main_osc: main_osc { | |
125 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
126 | #clock-cells = <0>; | |
127 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
128 | clocks = <&main_xtal>; | |
129 | }; | |
130 | ||
131 | main: mainck { | |
132 | compatible = "atmel,at91sam9x5-clk-main"; | |
133 | #clock-cells = <0>; | |
134 | interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; | |
135 | clocks = <&main_rc_osc>, <&main_osc>; | |
136 | }; | |
137 | ||
138 | plla: pllack { | |
139 | compatible = "atmel,at91rm9200-clk-pll"; | |
140 | #clock-cells = <0>; | |
141 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
142 | clocks = <&main>; | |
143 | reg = <0>; | |
144 | atmel,clk-input-range = <2000000 32000000>; | |
145 | #atmel,pll-clk-output-range-cells = <4>; | |
146 | atmel,pll-clk-output-ranges = <745000000 800000000 0 0 | |
147 | 695000000 750000000 1 0 | |
148 | 645000000 700000000 2 0 | |
149 | 595000000 650000000 3 0 | |
150 | 545000000 600000000 0 1 | |
151 | 495000000 555000000 1 1 | |
b6616f11 AB |
152 | 445000000 500000000 2 1 |
153 | 400000000 450000000 3 1>; | |
a80d3ec6 BB |
154 | }; |
155 | ||
156 | plladiv: plladivck { | |
157 | compatible = "atmel,at91sam9x5-clk-plldiv"; | |
158 | #clock-cells = <0>; | |
159 | clocks = <&plla>; | |
160 | }; | |
161 | ||
162 | utmi: utmick { | |
163 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
164 | #clock-cells = <0>; | |
165 | interrupts-extended = <&pmc AT91_PMC_LOCKU>; | |
166 | clocks = <&main>; | |
167 | }; | |
168 | ||
169 | mck: masterck { | |
170 | compatible = "atmel,at91sam9x5-clk-master"; | |
171 | #clock-cells = <0>; | |
172 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
173 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; | |
174 | atmel,clk-output-range = <0 133333333>; | |
175 | atmel,clk-divisors = <1 2 4 3>; | |
176 | atmel,master-clk-have-div3-pres; | |
177 | }; | |
178 | ||
179 | usb: usbck { | |
180 | compatible = "atmel,at91sam9x5-clk-usb"; | |
181 | #clock-cells = <0>; | |
182 | clocks = <&plladiv>, <&utmi>; | |
183 | }; | |
184 | ||
185 | prog: progck { | |
186 | compatible = "atmel,at91sam9x5-clk-programmable"; | |
187 | #address-cells = <1>; | |
188 | #size-cells = <0>; | |
189 | interrupt-parent = <&pmc>; | |
190 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; | |
191 | ||
192 | prog0: prog0 { | |
193 | #clock-cells = <0>; | |
194 | reg = <0>; | |
195 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
196 | }; | |
197 | ||
198 | prog1: prog1 { | |
199 | #clock-cells = <0>; | |
200 | reg = <1>; | |
201 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
202 | }; | |
203 | }; | |
204 | ||
205 | smd: smdclk { | |
206 | compatible = "atmel,at91sam9x5-clk-smd"; | |
207 | #clock-cells = <0>; | |
208 | clocks = <&plladiv>, <&utmi>; | |
209 | }; | |
210 | ||
211 | systemck { | |
212 | compatible = "atmel,at91rm9200-clk-system"; | |
213 | #address-cells = <1>; | |
214 | #size-cells = <0>; | |
215 | ||
216 | ddrck: ddrck { | |
217 | #clock-cells = <0>; | |
218 | reg = <2>; | |
219 | clocks = <&mck>; | |
220 | }; | |
221 | ||
222 | smdck: smdck { | |
223 | #clock-cells = <0>; | |
224 | reg = <4>; | |
225 | clocks = <&smd>; | |
226 | }; | |
227 | ||
228 | uhpck: uhpck { | |
229 | #clock-cells = <0>; | |
230 | reg = <6>; | |
231 | clocks = <&usb>; | |
232 | }; | |
233 | ||
234 | udpck: udpck { | |
235 | #clock-cells = <0>; | |
236 | reg = <7>; | |
237 | clocks = <&usb>; | |
238 | }; | |
239 | ||
240 | pck0: pck0 { | |
241 | #clock-cells = <0>; | |
242 | reg = <8>; | |
243 | clocks = <&prog0>; | |
244 | }; | |
245 | ||
246 | pck1: pck1 { | |
247 | #clock-cells = <0>; | |
248 | reg = <9>; | |
249 | clocks = <&prog1>; | |
250 | }; | |
251 | }; | |
252 | ||
253 | periphck { | |
254 | compatible = "atmel,at91sam9x5-clk-peripheral"; | |
255 | #address-cells = <1>; | |
256 | #size-cells = <0>; | |
257 | clocks = <&mck>; | |
258 | ||
259 | pioAB_clk: pioAB_clk { | |
260 | #clock-cells = <0>; | |
261 | reg = <2>; | |
262 | }; | |
263 | ||
264 | pioCD_clk: pioCD_clk { | |
265 | #clock-cells = <0>; | |
266 | reg = <3>; | |
267 | }; | |
268 | ||
269 | smd_clk: smd_clk { | |
270 | #clock-cells = <0>; | |
271 | reg = <4>; | |
272 | }; | |
273 | ||
274 | usart0_clk: usart0_clk { | |
275 | #clock-cells = <0>; | |
276 | reg = <5>; | |
277 | }; | |
278 | ||
279 | usart1_clk: usart1_clk { | |
280 | #clock-cells = <0>; | |
281 | reg = <6>; | |
282 | }; | |
283 | ||
284 | usart2_clk: usart2_clk { | |
285 | #clock-cells = <0>; | |
286 | reg = <7>; | |
287 | }; | |
288 | ||
289 | twi0_clk: twi0_clk { | |
290 | reg = <9>; | |
291 | #clock-cells = <0>; | |
292 | }; | |
293 | ||
294 | twi1_clk: twi1_clk { | |
295 | #clock-cells = <0>; | |
296 | reg = <10>; | |
297 | }; | |
298 | ||
299 | twi2_clk: twi2_clk { | |
300 | #clock-cells = <0>; | |
301 | reg = <11>; | |
302 | }; | |
303 | ||
304 | mci0_clk: mci0_clk { | |
305 | #clock-cells = <0>; | |
306 | reg = <12>; | |
307 | }; | |
308 | ||
309 | spi0_clk: spi0_clk { | |
310 | #clock-cells = <0>; | |
311 | reg = <13>; | |
312 | }; | |
313 | ||
314 | spi1_clk: spi1_clk { | |
315 | #clock-cells = <0>; | |
316 | reg = <14>; | |
317 | }; | |
318 | ||
319 | uart0_clk: uart0_clk { | |
320 | #clock-cells = <0>; | |
321 | reg = <15>; | |
322 | }; | |
323 | ||
324 | uart1_clk: uart1_clk { | |
325 | #clock-cells = <0>; | |
326 | reg = <16>; | |
327 | }; | |
328 | ||
329 | tcb0_clk: tcb0_clk { | |
330 | #clock-cells = <0>; | |
331 | reg = <17>; | |
332 | }; | |
333 | ||
334 | pwm_clk: pwm_clk { | |
335 | #clock-cells = <0>; | |
336 | reg = <18>; | |
337 | }; | |
338 | ||
339 | adc_clk: adc_clk { | |
340 | #clock-cells = <0>; | |
341 | reg = <19>; | |
342 | }; | |
343 | ||
344 | dma0_clk: dma0_clk { | |
345 | #clock-cells = <0>; | |
346 | reg = <20>; | |
347 | }; | |
348 | ||
349 | dma1_clk: dma1_clk { | |
350 | #clock-cells = <0>; | |
351 | reg = <21>; | |
352 | }; | |
353 | ||
354 | uhphs_clk: uhphs_clk { | |
355 | #clock-cells = <0>; | |
356 | reg = <22>; | |
357 | }; | |
358 | ||
359 | udphs_clk: udphs_clk { | |
360 | #clock-cells = <0>; | |
361 | reg = <23>; | |
362 | }; | |
363 | ||
364 | mci1_clk: mci1_clk { | |
365 | #clock-cells = <0>; | |
366 | reg = <26>; | |
367 | }; | |
368 | ||
369 | ssc0_clk: ssc0_clk { | |
370 | #clock-cells = <0>; | |
371 | reg = <28>; | |
372 | }; | |
373 | }; | |
eb5e76ff JCPV |
374 | }; |
375 | ||
c8082d34 JCPV |
376 | rstc@fffffe00 { |
377 | compatible = "atmel,at91sam9g45-rstc"; | |
378 | reg = <0xfffffe00 0x10>; | |
39c64915 | 379 | clocks = <&clk32k>; |
c8082d34 JCPV |
380 | }; |
381 | ||
82015c4e JCPV |
382 | shdwc@fffffe10 { |
383 | compatible = "atmel,at91sam9x5-shdwc"; | |
384 | reg = <0xfffffe10 0x10>; | |
39c64915 | 385 | clocks = <&clk32k>; |
82015c4e JCPV |
386 | }; |
387 | ||
467f1cf5 NF |
388 | pit: timer@fffffe30 { |
389 | compatible = "atmel,at91sam9260-pit"; | |
390 | reg = <0xfffffe30 0xf>; | |
5e8b3bc3 | 391 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
a80d3ec6 BB |
392 | clocks = <&mck>; |
393 | }; | |
394 | ||
395 | sckc@fffffe50 { | |
396 | compatible = "atmel,at91sam9x5-sckc"; | |
397 | reg = <0xfffffe50 0x4>; | |
398 | ||
399 | slow_osc: slow_osc { | |
400 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
401 | #clock-cells = <0>; | |
402 | clocks = <&slow_xtal>; | |
403 | }; | |
404 | ||
405 | slow_rc_osc: slow_rc_osc { | |
406 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
407 | #clock-cells = <0>; | |
408 | clock-frequency = <32768>; | |
409 | clock-accuracy = <50000000>; | |
410 | }; | |
411 | ||
412 | clk32k: slck { | |
413 | compatible = "atmel,at91sam9x5-clk-slow"; | |
414 | #clock-cells = <0>; | |
415 | clocks = <&slow_rc_osc>, <&slow_osc>; | |
416 | }; | |
467f1cf5 NF |
417 | }; |
418 | ||
419 | tcb0: timer@f8008000 { | |
420 | compatible = "atmel,at91sam9x5-tcb"; | |
421 | reg = <0xf8008000 0x100>; | |
5e8b3bc3 | 422 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
39c64915 AB |
423 | clocks = <&tcb0_clk>, <&clk32k>; |
424 | clock-names = "t0_clk", "slow_clk"; | |
467f1cf5 NF |
425 | }; |
426 | ||
427 | tcb1: timer@f800c000 { | |
428 | compatible = "atmel,at91sam9x5-tcb"; | |
429 | reg = <0xf800c000 0x100>; | |
5e8b3bc3 | 430 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
39c64915 AB |
431 | clocks = <&tcb0_clk>, <&clk32k>; |
432 | clock-names = "t0_clk", "slow_clk"; | |
467f1cf5 NF |
433 | }; |
434 | ||
435 | dma0: dma-controller@ffffec00 { | |
436 | compatible = "atmel,at91sam9g45-dma"; | |
437 | reg = <0xffffec00 0x200>; | |
5e8b3bc3 | 438 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
980ce7d9 | 439 | #dma-cells = <2>; |
a80d3ec6 BB |
440 | clocks = <&dma0_clk>; |
441 | clock-names = "dma_clk"; | |
467f1cf5 NF |
442 | }; |
443 | ||
444 | dma1: dma-controller@ffffee00 { | |
445 | compatible = "atmel,at91sam9g45-dma"; | |
446 | reg = <0xffffee00 0x200>; | |
5e8b3bc3 | 447 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
980ce7d9 | 448 | #dma-cells = <2>; |
a80d3ec6 BB |
449 | clocks = <&dma1_clk>; |
450 | clock-names = "dma_clk"; | |
467f1cf5 NF |
451 | }; |
452 | ||
ec6754a7 | 453 | pinctrl@fffff400 { |
e4541ff2 JCPV |
454 | #address-cells = <1>; |
455 | #size-cells = <1>; | |
5314ec8e | 456 | compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; |
e4541ff2 JCPV |
457 | ranges = <0xfffff400 0xfffff400 0x800>; |
458 | ||
5314ec8e | 459 | /* shared pinctrl settings */ |
ec6754a7 JCPV |
460 | dbgu { |
461 | pinctrl_dbgu: dbgu-0 { | |
462 | atmel,pins = | |
c9d0f317 JCPV |
463 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ |
464 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */ | |
ec6754a7 JCPV |
465 | }; |
466 | }; | |
467 | ||
9e3129e9 JCPV |
468 | usart0 { |
469 | pinctrl_usart0: usart0-0 { | |
ec6754a7 | 470 | atmel,pins = |
c9d0f317 JCPV |
471 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */ |
472 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */ | |
ec6754a7 JCPV |
473 | }; |
474 | ||
c58c0c5a | 475 | pinctrl_usart0_rts: usart0_rts-0 { |
ec6754a7 | 476 | atmel,pins = |
c9d0f317 | 477 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ |
c58c0c5a JCPV |
478 | }; |
479 | ||
480 | pinctrl_usart0_cts: usart0_cts-0 { | |
481 | atmel,pins = | |
c9d0f317 | 482 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ |
ec6754a7 | 483 | }; |
1bab02ec RG |
484 | |
485 | pinctrl_usart0_sck: usart0_sck-0 { | |
486 | atmel,pins = | |
c9d0f317 | 487 | <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */ |
1bab02ec | 488 | }; |
ec6754a7 JCPV |
489 | }; |
490 | ||
9e3129e9 JCPV |
491 | usart1 { |
492 | pinctrl_usart1: usart1-0 { | |
ec6754a7 | 493 | atmel,pins = |
c9d0f317 JCPV |
494 | <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */ |
495 | AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ | |
ec6754a7 JCPV |
496 | }; |
497 | ||
c58c0c5a JCPV |
498 | pinctrl_usart1_rts: usart1_rts-0 { |
499 | atmel,pins = | |
c9d0f317 | 500 | <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */ |
c58c0c5a JCPV |
501 | }; |
502 | ||
503 | pinctrl_usart1_cts: usart1_cts-0 { | |
ec6754a7 | 504 | atmel,pins = |
c9d0f317 | 505 | <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */ |
ec6754a7 | 506 | }; |
1bab02ec RG |
507 | |
508 | pinctrl_usart1_sck: usart1_sck-0 { | |
509 | atmel,pins = | |
441cf98a | 510 | <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */ |
1bab02ec | 511 | }; |
ec6754a7 JCPV |
512 | }; |
513 | ||
9e3129e9 JCPV |
514 | usart2 { |
515 | pinctrl_usart2: usart2-0 { | |
ec6754a7 | 516 | atmel,pins = |
c9d0f317 JCPV |
517 | <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ |
518 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ | |
ec6754a7 JCPV |
519 | }; |
520 | ||
df923c15 | 521 | pinctrl_usart2_rts: usart2_rts-0 { |
ec6754a7 | 522 | atmel,pins = |
c9d0f317 | 523 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
c58c0c5a JCPV |
524 | }; |
525 | ||
df923c15 | 526 | pinctrl_usart2_cts: usart2_cts-0 { |
c58c0c5a | 527 | atmel,pins = |
c9d0f317 | 528 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
ec6754a7 | 529 | }; |
1bab02ec RG |
530 | |
531 | pinctrl_usart2_sck: usart2_sck-0 { | |
532 | atmel,pins = | |
c9d0f317 | 533 | <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ |
1bab02ec | 534 | }; |
ec6754a7 JCPV |
535 | }; |
536 | ||
9e3129e9 JCPV |
537 | uart0 { |
538 | pinctrl_uart0: uart0-0 { | |
ec6754a7 | 539 | atmel,pins = |
c9d0f317 JCPV |
540 | <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */ |
541 | AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */ | |
ec6754a7 JCPV |
542 | }; |
543 | }; | |
544 | ||
9e3129e9 JCPV |
545 | uart1 { |
546 | pinctrl_uart1: uart1-0 { | |
ec6754a7 | 547 | atmel,pins = |
c9d0f317 JCPV |
548 | <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */ |
549 | AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */ | |
ec6754a7 JCPV |
550 | }; |
551 | }; | |
5314ec8e | 552 | |
7a38d450 JCPV |
553 | nand { |
554 | pinctrl_nand: nand-0 { | |
555 | atmel,pins = | |
c9d0f317 JCPV |
556 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */ |
557 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */ | |
558 | AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */ | |
559 | AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */ | |
560 | AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */ | |
561 | AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */ | |
562 | AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */ | |
563 | AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */ | |
564 | AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */ | |
565 | AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */ | |
566 | AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */ | |
567 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */ | |
568 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */ | |
569 | AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */ | |
7f06472f RG |
570 | }; |
571 | ||
572 | pinctrl_nand_16bits: nand_16bits-0 { | |
573 | atmel,pins = | |
c9d0f317 JCPV |
574 | <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */ |
575 | AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */ | |
576 | AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */ | |
577 | AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */ | |
578 | AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */ | |
579 | AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */ | |
580 | AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */ | |
581 | AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */ | |
7a38d450 JCPV |
582 | }; |
583 | }; | |
584 | ||
d4fe9ac7 JCPV |
585 | mmc0 { |
586 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | |
587 | atmel,pins = | |
c9d0f317 JCPV |
588 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
589 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ | |
590 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ | |
d4fe9ac7 JCPV |
591 | }; |
592 | ||
593 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
594 | atmel,pins = | |
c9d0f317 JCPV |
595 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ |
596 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ | |
597 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ | |
d4fe9ac7 JCPV |
598 | }; |
599 | }; | |
600 | ||
601 | mmc1 { | |
602 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | |
603 | atmel,pins = | |
c9d0f317 JCPV |
604 | <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */ |
605 | AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ | |
606 | AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */ | |
d4fe9ac7 JCPV |
607 | }; |
608 | ||
609 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
610 | atmel,pins = | |
c9d0f317 JCPV |
611 | <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */ |
612 | AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */ | |
613 | AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */ | |
d4fe9ac7 JCPV |
614 | }; |
615 | }; | |
616 | ||
544ae6b2 BS |
617 | ssc0 { |
618 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
619 | atmel,pins = | |
c9d0f317 JCPV |
620 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
621 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ | |
622 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ | |
544ae6b2 BS |
623 | }; |
624 | ||
625 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
626 | atmel,pins = | |
c9d0f317 JCPV |
627 | <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
628 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
629 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ | |
544ae6b2 BS |
630 | }; |
631 | }; | |
632 | ||
a68b728f WY |
633 | spi0 { |
634 | pinctrl_spi0: spi0-0 { | |
635 | atmel,pins = | |
c9d0f317 JCPV |
636 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ |
637 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ | |
638 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ | |
a68b728f WY |
639 | }; |
640 | }; | |
641 | ||
642 | spi1 { | |
643 | pinctrl_spi1: spi1-0 { | |
644 | atmel,pins = | |
c9d0f317 JCPV |
645 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ |
646 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ | |
647 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ | |
a68b728f WY |
648 | }; |
649 | }; | |
650 | ||
e9a72ee8 RG |
651 | i2c0 { |
652 | pinctrl_i2c0: i2c0-0 { | |
653 | atmel,pins = | |
c9d0f317 JCPV |
654 | <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */ |
655 | AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */ | |
e9a72ee8 RG |
656 | }; |
657 | }; | |
658 | ||
659 | i2c1 { | |
660 | pinctrl_i2c1: i2c1-0 { | |
661 | atmel,pins = | |
c9d0f317 JCPV |
662 | <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */ |
663 | AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */ | |
e9a72ee8 RG |
664 | }; |
665 | }; | |
666 | ||
667 | i2c2 { | |
668 | pinctrl_i2c2: i2c2-0 { | |
669 | atmel,pins = | |
c9d0f317 JCPV |
670 | <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */ |
671 | AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */ | |
e9a72ee8 RG |
672 | }; |
673 | }; | |
674 | ||
463c9c7b RG |
675 | i2c_gpio0 { |
676 | pinctrl_i2c_gpio0: i2c_gpio0-0 { | |
677 | atmel,pins = | |
c9d0f317 JCPV |
678 | <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */ |
679 | AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */ | |
463c9c7b RG |
680 | }; |
681 | }; | |
682 | ||
683 | i2c_gpio1 { | |
684 | pinctrl_i2c_gpio1: i2c_gpio1-0 { | |
685 | atmel,pins = | |
c9d0f317 JCPV |
686 | <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */ |
687 | AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */ | |
463c9c7b RG |
688 | }; |
689 | }; | |
690 | ||
691 | i2c_gpio2 { | |
692 | pinctrl_i2c_gpio2: i2c_gpio2-0 { | |
693 | atmel,pins = | |
c9d0f317 JCPV |
694 | <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */ |
695 | AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */ | |
463c9c7b RG |
696 | }; |
697 | }; | |
698 | ||
b76b7c2c GP |
699 | pwm0 { |
700 | pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { | |
701 | atmel,pins = | |
702 | <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
703 | }; | |
704 | pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { | |
705 | atmel,pins = | |
706 | <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
707 | }; | |
708 | pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { | |
709 | atmel,pins = | |
710 | <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
711 | }; | |
712 | ||
713 | pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { | |
714 | atmel,pins = | |
715 | <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
716 | }; | |
717 | pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { | |
718 | atmel,pins = | |
719 | <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
720 | }; | |
721 | pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { | |
722 | atmel,pins = | |
723 | <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
724 | }; | |
725 | ||
726 | pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { | |
727 | atmel,pins = | |
728 | <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
729 | }; | |
730 | pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { | |
731 | atmel,pins = | |
732 | <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
733 | }; | |
734 | ||
735 | pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { | |
736 | atmel,pins = | |
737 | <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
738 | }; | |
739 | pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { | |
740 | atmel,pins = | |
741 | <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
742 | }; | |
743 | }; | |
744 | ||
028633c2 BB |
745 | tcb0 { |
746 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
747 | atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
748 | }; | |
749 | ||
750 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
751 | atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
752 | }; | |
753 | ||
754 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
755 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
756 | }; | |
757 | ||
758 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
759 | atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
760 | }; | |
761 | ||
762 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
763 | atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
764 | }; | |
765 | ||
766 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
767 | atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
768 | }; | |
769 | ||
770 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
771 | atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
772 | }; | |
773 | ||
774 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
775 | atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
776 | }; | |
777 | ||
778 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
779 | atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
780 | }; | |
781 | }; | |
782 | ||
783 | tcb1 { | |
784 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | |
785 | atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
786 | }; | |
787 | ||
788 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | |
789 | atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
790 | }; | |
791 | ||
792 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | |
793 | atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
794 | }; | |
795 | ||
796 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | |
797 | atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
798 | }; | |
799 | ||
800 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | |
801 | atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
802 | }; | |
803 | ||
804 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | |
805 | atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
806 | }; | |
807 | ||
808 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | |
809 | atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
810 | }; | |
811 | ||
812 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | |
813 | atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
814 | }; | |
815 | ||
816 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | |
817 | atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; | |
818 | }; | |
819 | }; | |
820 | ||
e4541ff2 JCPV |
821 | pioA: gpio@fffff400 { |
822 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
823 | reg = <0xfffff400 0x200>; | |
5e8b3bc3 | 824 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
825 | #gpio-cells = <2>; |
826 | gpio-controller; | |
827 | interrupt-controller; | |
828 | #interrupt-cells = <2>; | |
a80d3ec6 | 829 | clocks = <&pioAB_clk>; |
e4541ff2 JCPV |
830 | }; |
831 | ||
832 | pioB: gpio@fffff600 { | |
833 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
834 | reg = <0xfffff600 0x200>; | |
5e8b3bc3 | 835 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
836 | #gpio-cells = <2>; |
837 | gpio-controller; | |
fc33ff43 | 838 | #gpio-lines = <19>; |
e4541ff2 JCPV |
839 | interrupt-controller; |
840 | #interrupt-cells = <2>; | |
a80d3ec6 | 841 | clocks = <&pioAB_clk>; |
e4541ff2 JCPV |
842 | }; |
843 | ||
844 | pioC: gpio@fffff800 { | |
845 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
846 | reg = <0xfffff800 0x200>; | |
5e8b3bc3 | 847 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
848 | #gpio-cells = <2>; |
849 | gpio-controller; | |
850 | interrupt-controller; | |
851 | #interrupt-cells = <2>; | |
a80d3ec6 | 852 | clocks = <&pioCD_clk>; |
e4541ff2 JCPV |
853 | }; |
854 | ||
855 | pioD: gpio@fffffa00 { | |
856 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | |
857 | reg = <0xfffffa00 0x200>; | |
5e8b3bc3 | 858 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
e4541ff2 JCPV |
859 | #gpio-cells = <2>; |
860 | gpio-controller; | |
fc33ff43 | 861 | #gpio-lines = <22>; |
e4541ff2 JCPV |
862 | interrupt-controller; |
863 | #interrupt-cells = <2>; | |
a80d3ec6 | 864 | clocks = <&pioCD_clk>; |
e4541ff2 | 865 | }; |
467f1cf5 NF |
866 | }; |
867 | ||
544ae6b2 BS |
868 | ssc0: ssc@f0010000 { |
869 | compatible = "atmel,at91sam9g45-ssc"; | |
870 | reg = <0xf0010000 0x4000>; | |
5e8b3bc3 | 871 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; |
7da49ad1 RG |
872 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>, |
873 | <&dma0 1 AT91_DMA_CFG_PER_ID(14)>; | |
874 | dma-names = "tx", "rx"; | |
544ae6b2 BS |
875 | pinctrl-names = "default"; |
876 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
a80d3ec6 BB |
877 | clocks = <&ssc0_clk>; |
878 | clock-names = "pclk"; | |
544ae6b2 BS |
879 | status = "disabled"; |
880 | }; | |
881 | ||
9873137a LD |
882 | mmc0: mmc@f0008000 { |
883 | compatible = "atmel,hsmci"; | |
884 | reg = <0xf0008000 0x600>; | |
5e8b3bc3 | 885 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
d4ae89c8 | 886 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; |
05c1bc97 | 887 | dma-names = "rxtx"; |
e7cca254 | 888 | pinctrl-names = "default"; |
a80d3ec6 BB |
889 | clocks = <&mci0_clk>; |
890 | clock-names = "mci_clk"; | |
9873137a LD |
891 | #address-cells = <1>; |
892 | #size-cells = <0>; | |
893 | status = "disabled"; | |
894 | }; | |
895 | ||
896 | mmc1: mmc@f000c000 { | |
897 | compatible = "atmel,hsmci"; | |
898 | reg = <0xf000c000 0x600>; | |
5e8b3bc3 | 899 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
d4ae89c8 | 900 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; |
05c1bc97 | 901 | dma-names = "rxtx"; |
e7cca254 | 902 | pinctrl-names = "default"; |
a80d3ec6 BB |
903 | clocks = <&mci1_clk>; |
904 | clock-names = "mci_clk"; | |
9873137a LD |
905 | #address-cells = <1>; |
906 | #size-cells = <0>; | |
907 | status = "disabled"; | |
908 | }; | |
909 | ||
467f1cf5 | 910 | dbgu: serial@fffff200 { |
8c07f664 | 911 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
467f1cf5 | 912 | reg = <0xfffff200 0x200>; |
5e8b3bc3 | 913 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
ec6754a7 JCPV |
914 | pinctrl-names = "default"; |
915 | pinctrl-0 = <&pinctrl_dbgu>; | |
dd4f25a3 JP |
916 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>, |
917 | <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
918 | dma-names = "tx", "rx"; | |
a80d3ec6 BB |
919 | clocks = <&mck>; |
920 | clock-names = "usart"; | |
467f1cf5 NF |
921 | status = "disabled"; |
922 | }; | |
923 | ||
924 | usart0: serial@f801c000 { | |
925 | compatible = "atmel,at91sam9260-usart"; | |
926 | reg = <0xf801c000 0x200>; | |
5e8b3bc3 | 927 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 928 | pinctrl-names = "default"; |
9e3129e9 | 929 | pinctrl-0 = <&pinctrl_usart0>; |
dd4f25a3 JP |
930 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>, |
931 | <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
932 | dma-names = "tx", "rx"; | |
a80d3ec6 BB |
933 | clocks = <&usart0_clk>; |
934 | clock-names = "usart"; | |
467f1cf5 NF |
935 | status = "disabled"; |
936 | }; | |
937 | ||
938 | usart1: serial@f8020000 { | |
939 | compatible = "atmel,at91sam9260-usart"; | |
940 | reg = <0xf8020000 0x200>; | |
5e8b3bc3 | 941 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 942 | pinctrl-names = "default"; |
9e3129e9 | 943 | pinctrl-0 = <&pinctrl_usart1>; |
dd4f25a3 JP |
944 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>, |
945 | <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
946 | dma-names = "tx", "rx"; | |
a80d3ec6 BB |
947 | clocks = <&usart1_clk>; |
948 | clock-names = "usart"; | |
467f1cf5 NF |
949 | status = "disabled"; |
950 | }; | |
951 | ||
952 | usart2: serial@f8024000 { | |
953 | compatible = "atmel,at91sam9260-usart"; | |
954 | reg = <0xf8024000 0x200>; | |
5e8b3bc3 | 955 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
ec6754a7 | 956 | pinctrl-names = "default"; |
9e3129e9 | 957 | pinctrl-0 = <&pinctrl_usart2>; |
dd4f25a3 JP |
958 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>, |
959 | <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>; | |
960 | dma-names = "tx", "rx"; | |
a80d3ec6 BB |
961 | clocks = <&usart2_clk>; |
962 | clock-names = "usart"; | |
467f1cf5 NF |
963 | status = "disabled"; |
964 | }; | |
965 | ||
05dcd361 LD |
966 | i2c0: i2c@f8010000 { |
967 | compatible = "atmel,at91sam9x5-i2c"; | |
968 | reg = <0xf8010000 0x100>; | |
5e8b3bc3 | 969 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; |
d4ae89c8 LD |
970 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>, |
971 | <&dma0 1 AT91_DMA_CFG_PER_ID(8)>; | |
d9a63a45 | 972 | dma-names = "tx", "rx"; |
05dcd361 LD |
973 | #address-cells = <1>; |
974 | #size-cells = <0>; | |
e9a72ee8 RG |
975 | pinctrl-names = "default"; |
976 | pinctrl-0 = <&pinctrl_i2c0>; | |
a80d3ec6 | 977 | clocks = <&twi0_clk>; |
05dcd361 LD |
978 | status = "disabled"; |
979 | }; | |
980 | ||
981 | i2c1: i2c@f8014000 { | |
982 | compatible = "atmel,at91sam9x5-i2c"; | |
983 | reg = <0xf8014000 0x100>; | |
5e8b3bc3 | 984 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; |
d4ae89c8 LD |
985 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>, |
986 | <&dma1 1 AT91_DMA_CFG_PER_ID(6)>; | |
d9a63a45 | 987 | dma-names = "tx", "rx"; |
05dcd361 LD |
988 | #address-cells = <1>; |
989 | #size-cells = <0>; | |
e9a72ee8 RG |
990 | pinctrl-names = "default"; |
991 | pinctrl-0 = <&pinctrl_i2c1>; | |
a80d3ec6 | 992 | clocks = <&twi1_clk>; |
05dcd361 LD |
993 | status = "disabled"; |
994 | }; | |
995 | ||
996 | i2c2: i2c@f8018000 { | |
997 | compatible = "atmel,at91sam9x5-i2c"; | |
998 | reg = <0xf8018000 0x100>; | |
5e8b3bc3 | 999 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; |
d4ae89c8 LD |
1000 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>, |
1001 | <&dma0 1 AT91_DMA_CFG_PER_ID(10)>; | |
d9a63a45 | 1002 | dma-names = "tx", "rx"; |
05dcd361 LD |
1003 | #address-cells = <1>; |
1004 | #size-cells = <0>; | |
e9a72ee8 RG |
1005 | pinctrl-names = "default"; |
1006 | pinctrl-0 = <&pinctrl_i2c2>; | |
a80d3ec6 | 1007 | clocks = <&twi2_clk>; |
05dcd361 LD |
1008 | status = "disabled"; |
1009 | }; | |
1010 | ||
06723db5 NF |
1011 | uart0: serial@f8040000 { |
1012 | compatible = "atmel,at91sam9260-usart"; | |
1013 | reg = <0xf8040000 0x200>; | |
1014 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | |
1015 | pinctrl-names = "default"; | |
1016 | pinctrl-0 = <&pinctrl_uart0>; | |
a80d3ec6 BB |
1017 | clocks = <&uart0_clk>; |
1018 | clock-names = "usart"; | |
06723db5 NF |
1019 | status = "disabled"; |
1020 | }; | |
1021 | ||
1022 | uart1: serial@f8044000 { | |
1023 | compatible = "atmel,at91sam9260-usart"; | |
1024 | reg = <0xf8044000 0x200>; | |
1025 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | |
1026 | pinctrl-names = "default"; | |
1027 | pinctrl-0 = <&pinctrl_uart1>; | |
a80d3ec6 BB |
1028 | clocks = <&uart1_clk>; |
1029 | clock-names = "usart"; | |
06723db5 NF |
1030 | status = "disabled"; |
1031 | }; | |
1032 | ||
d029f371 | 1033 | adc0: adc@f804c000 { |
ce1e8d3d AB |
1034 | #address-cells = <1>; |
1035 | #size-cells = <0>; | |
74d90de2 | 1036 | compatible = "atmel,at91sam9x5-adc"; |
d029f371 | 1037 | reg = <0xf804c000 0x100>; |
5e8b3bc3 | 1038 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; |
a80d3ec6 BB |
1039 | clocks = <&adc_clk>, |
1040 | <&adc_op_clk>; | |
1041 | clock-names = "adc_clk", "adc_op_clk"; | |
ce1e8d3d | 1042 | atmel,adc-use-external-triggers; |
d029f371 MR |
1043 | atmel,adc-channels-used = <0xffff>; |
1044 | atmel,adc-vref = <3300>; | |
d029f371 | 1045 | atmel,adc-startup-time = <40>; |
7c08d8cd | 1046 | atmel,adc-sample-hold-time = <11>; |
4b50da65 LD |
1047 | atmel,adc-res = <8 10>; |
1048 | atmel,adc-res-names = "lowres", "highres"; | |
1049 | atmel,adc-use-res = "highres"; | |
d029f371 MR |
1050 | |
1051 | trigger@0 { | |
ce1e8d3d | 1052 | reg = <0>; |
d029f371 MR |
1053 | trigger-name = "external-rising"; |
1054 | trigger-value = <0x1>; | |
1055 | trigger-external; | |
1056 | }; | |
1057 | ||
1058 | trigger@1 { | |
ce1e8d3d | 1059 | reg = <1>; |
d029f371 MR |
1060 | trigger-name = "external-falling"; |
1061 | trigger-value = <0x2>; | |
1062 | trigger-external; | |
1063 | }; | |
1064 | ||
1065 | trigger@2 { | |
ce1e8d3d | 1066 | reg = <2>; |
d029f371 MR |
1067 | trigger-name = "external-any"; |
1068 | trigger-value = <0x3>; | |
1069 | trigger-external; | |
1070 | }; | |
1071 | ||
1072 | trigger@3 { | |
ce1e8d3d | 1073 | reg = <3>; |
d029f371 MR |
1074 | trigger-name = "continuous"; |
1075 | trigger-value = <0x6>; | |
1076 | }; | |
1077 | }; | |
d50f88a0 RG |
1078 | |
1079 | spi0: spi@f0000000 { | |
1080 | #address-cells = <1>; | |
1081 | #size-cells = <0>; | |
1082 | compatible = "atmel,at91rm9200-spi"; | |
1083 | reg = <0xf0000000 0x100>; | |
5e8b3bc3 | 1084 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
6b2a9999 RG |
1085 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>, |
1086 | <&dma0 1 AT91_DMA_CFG_PER_ID(2)>; | |
1087 | dma-names = "tx", "rx"; | |
a68b728f WY |
1088 | pinctrl-names = "default"; |
1089 | pinctrl-0 = <&pinctrl_spi0>; | |
a80d3ec6 BB |
1090 | clocks = <&spi0_clk>; |
1091 | clock-names = "spi_clk"; | |
d50f88a0 RG |
1092 | status = "disabled"; |
1093 | }; | |
1094 | ||
1095 | spi1: spi@f0004000 { | |
1096 | #address-cells = <1>; | |
1097 | #size-cells = <0>; | |
1098 | compatible = "atmel,at91rm9200-spi"; | |
1099 | reg = <0xf0004000 0x100>; | |
5e8b3bc3 | 1100 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; |
6b2a9999 RG |
1101 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>, |
1102 | <&dma1 1 AT91_DMA_CFG_PER_ID(2)>; | |
1103 | dma-names = "tx", "rx"; | |
a68b728f WY |
1104 | pinctrl-names = "default"; |
1105 | pinctrl-0 = <&pinctrl_spi1>; | |
a80d3ec6 BB |
1106 | clocks = <&spi1_clk>; |
1107 | clock-names = "spi_clk"; | |
d50f88a0 RG |
1108 | status = "disabled"; |
1109 | }; | |
dfab34aa | 1110 | |
aecca65c JCPV |
1111 | usb2: gadget@f803c000 { |
1112 | #address-cells = <1>; | |
1113 | #size-cells = <0>; | |
6540165c | 1114 | compatible = "atmel,at91sam9g45-udc"; |
aecca65c JCPV |
1115 | reg = <0x00500000 0x80000 |
1116 | 0xf803c000 0x400>; | |
1117 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; | |
3440ef16 | 1118 | clocks = <&utmi>, <&udphs_clk>; |
363d4ddc | 1119 | clock-names = "hclk", "pclk"; |
aecca65c JCPV |
1120 | status = "disabled"; |
1121 | ||
1122 | ep0 { | |
1123 | reg = <0>; | |
1124 | atmel,fifo-size = <64>; | |
1125 | atmel,nb-banks = <1>; | |
1126 | }; | |
1127 | ||
1128 | ep1 { | |
1129 | reg = <1>; | |
1130 | atmel,fifo-size = <1024>; | |
1131 | atmel,nb-banks = <2>; | |
1132 | atmel,can-dma; | |
1133 | atmel,can-isoc; | |
1134 | }; | |
1135 | ||
1136 | ep2 { | |
1137 | reg = <2>; | |
1138 | atmel,fifo-size = <1024>; | |
1139 | atmel,nb-banks = <2>; | |
1140 | atmel,can-dma; | |
1141 | atmel,can-isoc; | |
1142 | }; | |
1143 | ||
1144 | ep3 { | |
1145 | reg = <3>; | |
1146 | atmel,fifo-size = <1024>; | |
1147 | atmel,nb-banks = <3>; | |
1148 | atmel,can-dma; | |
1149 | }; | |
1150 | ||
1151 | ep4 { | |
1152 | reg = <4>; | |
1153 | atmel,fifo-size = <1024>; | |
1154 | atmel,nb-banks = <3>; | |
1155 | atmel,can-dma; | |
1156 | }; | |
1157 | ||
1158 | ep5 { | |
1159 | reg = <5>; | |
1160 | atmel,fifo-size = <1024>; | |
1161 | atmel,nb-banks = <3>; | |
1162 | atmel,can-dma; | |
1163 | atmel,can-isoc; | |
1164 | }; | |
1165 | ||
1166 | ep6 { | |
1167 | reg = <6>; | |
1168 | atmel,fifo-size = <1024>; | |
1169 | atmel,nb-banks = <3>; | |
1170 | atmel,can-dma; | |
1171 | atmel,can-isoc; | |
1172 | }; | |
1173 | }; | |
1174 | ||
136d3556 WY |
1175 | watchdog@fffffe40 { |
1176 | compatible = "atmel,at91sam9260-wdt"; | |
1177 | reg = <0xfffffe40 0x10>; | |
fe46aa67 | 1178 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
39c64915 | 1179 | clocks = <&clk32k>; |
fe46aa67 BB |
1180 | atmel,watchdog-type = "hardware"; |
1181 | atmel,reset-type = "all"; | |
1182 | atmel,dbg-halt; | |
136d3556 WY |
1183 | status = "disabled"; |
1184 | }; | |
1185 | ||
b909c6c9 | 1186 | rtc@fffffeb0 { |
23fb05c6 | 1187 | compatible = "atmel,at91sam9x5-rtc"; |
b909c6c9 | 1188 | reg = <0xfffffeb0 0x40>; |
5e8b3bc3 | 1189 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
39c64915 | 1190 | clocks = <&clk32k>; |
b909c6c9 NF |
1191 | status = "disabled"; |
1192 | }; | |
f3ab0527 BS |
1193 | |
1194 | pwm0: pwm@f8034000 { | |
1195 | compatible = "atmel,at91sam9rl-pwm"; | |
1196 | reg = <0xf8034000 0x300>; | |
1197 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; | |
e0d69e11 | 1198 | clocks = <&pwm_clk>; |
f3ab0527 BS |
1199 | #pwm-cells = <3>; |
1200 | status = "disabled"; | |
1201 | }; | |
467f1cf5 | 1202 | }; |
86a89f4f JCPV |
1203 | |
1204 | nand0: nand@40000000 { | |
1205 | compatible = "atmel,at91rm9200-nand"; | |
1206 | #address-cells = <1>; | |
1207 | #size-cells = <1>; | |
1208 | reg = <0x40000000 0x10000000 | |
5314bc2d JW |
1209 | 0xffffe000 0x600 /* PMECC Registers */ |
1210 | 0xffffe600 0x200 /* PMECC Error Location Registers */ | |
1211 | 0x00108000 0x18000 /* PMECC looup table in ROM code */ | |
86a89f4f | 1212 | >; |
5314bc2d | 1213 | atmel,pmecc-lookup-table-offset = <0x0 0x8000>; |
86a89f4f JCPV |
1214 | atmel,nand-addr-offset = <21>; |
1215 | atmel,nand-cmd-offset = <22>; | |
e8b2da6e | 1216 | atmel,nand-has-dma; |
7a38d450 JCPV |
1217 | pinctrl-names = "default"; |
1218 | pinctrl-0 = <&pinctrl_nand>; | |
92f8629b JCPV |
1219 | gpios = <&pioD 5 GPIO_ACTIVE_HIGH |
1220 | &pioD 4 GPIO_ACTIVE_HIGH | |
86a89f4f JCPV |
1221 | 0 |
1222 | >; | |
1223 | status = "disabled"; | |
1224 | }; | |
6a062459 JCPV |
1225 | |
1226 | usb0: ohci@00600000 { | |
1227 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
1228 | reg = <0x00600000 0x100000>; | |
5e8b3bc3 | 1229 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
f8073708 BB |
1230 | clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; |
1231 | clock-names = "ohci_clk", "hclk", "uhpck"; | |
6a062459 JCPV |
1232 | status = "disabled"; |
1233 | }; | |
62c5553a JCPV |
1234 | |
1235 | usb1: ehci@00700000 { | |
1236 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
1237 | reg = <0x00700000 0x100000>; | |
5e8b3bc3 | 1238 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
855868a5 BB |
1239 | clocks = <&utmi>, <&uhphs_clk>; |
1240 | clock-names = "usb_clk", "ehci_clk"; | |
62c5553a JCPV |
1241 | status = "disabled"; |
1242 | }; | |
467f1cf5 | 1243 | }; |
10f71c28 JCPV |
1244 | |
1245 | i2c@0 { | |
1246 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
1247 | gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ |
1248 | &pioA 31 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
1249 | >; |
1250 | i2c-gpio,sda-open-drain; | |
1251 | i2c-gpio,scl-open-drain; | |
1252 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1253 | #address-cells = <1>; | |
1254 | #size-cells = <0>; | |
463c9c7b RG |
1255 | pinctrl-names = "default"; |
1256 | pinctrl-0 = <&pinctrl_i2c_gpio0>; | |
10f71c28 JCPV |
1257 | status = "disabled"; |
1258 | }; | |
1259 | ||
1260 | i2c@1 { | |
1261 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
1262 | gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */ |
1263 | &pioC 1 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
1264 | >; |
1265 | i2c-gpio,sda-open-drain; | |
1266 | i2c-gpio,scl-open-drain; | |
1267 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1268 | #address-cells = <1>; | |
1269 | #size-cells = <0>; | |
463c9c7b RG |
1270 | pinctrl-names = "default"; |
1271 | pinctrl-0 = <&pinctrl_i2c_gpio1>; | |
10f71c28 JCPV |
1272 | status = "disabled"; |
1273 | }; | |
1274 | ||
1275 | i2c@2 { | |
1276 | compatible = "i2c-gpio"; | |
92f8629b JCPV |
1277 | gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ |
1278 | &pioB 5 GPIO_ACTIVE_HIGH /* scl */ | |
10f71c28 JCPV |
1279 | >; |
1280 | i2c-gpio,sda-open-drain; | |
1281 | i2c-gpio,scl-open-drain; | |
1282 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | |
1283 | #address-cells = <1>; | |
1284 | #size-cells = <0>; | |
463c9c7b RG |
1285 | pinctrl-names = "default"; |
1286 | pinctrl-0 = <&pinctrl_i2c_gpio2>; | |
10f71c28 JCPV |
1287 | status = "disabled"; |
1288 | }; | |
467f1cf5 | 1289 | }; |